PI6C3622-1 PERICOM | Alldatasheet

Document overview

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Technical content

Features

  • 20 to 40MHz input frequency range
  • 1x frequency multiplication
  • Operating voltages of 2.5 V or 3.3V
  • Selectable Spreading Ratio: ±0.30%, ±0.50%, ±0.70% and 0% typical at 27MHz input
  • Modulation Rate: Fin /640(20 MHz ≤ Fin ≤40 MHz)
  • Spread Spectrum feature can be enabled/disabled at run-time and glitch-free
  • Low power dissipation
  • Low jitter
  • 8-pin TSSOP Package

Applications

The PI6C3622-1 can be used in most multimedia applications and embedded systems including but not limited to the following: PDAs DSCs Printers/ MFPs Media players Portable-TVs Embedded digital video devices CD-ROM, VCD and DVD players LCD Panel Modules Automotive components Networking devices

Description

The PI6C3622-1 is a Low Power Spread Spectrum Frequency Multiplier and part of the Pericom SSCG-GP family. The part generates one 1x modulated output from a single clock source or a crystal, and is designed to reduce electromagnetic interference (EMI) by spreading the clock. This reduction in EMI can result in signifi cant system cost saving and less design complexity by reducing the number of circuit board layers ferrite beads and shielding. In the absence of a spread spectrum clock, other EMI-reducing components are required in order to comply with regulatory agency requirements. The Spreading Ratio is selectable using the selection pins. The PI6C3622-1 provides ±0.30%, ±0.50%, ±0.70% diversifi ed and 0% spread modulation through external logic stage setting. The Spread Spectrum feature can be enabled and disabled at run- time by setting the SSON pin. Other pins should be properly set before the system is initialized. The chip is packaged in the 8-pin TSSOP. The reduced size of the package outlines can save precious board space and make layout easier. PI6C3622-1 is one of the clock products provided by Pericom. If your application needs a clock product with a different specifi cation not currently provided, please contact us for further information or custom design. Pin Confi guration S1 S0 SSON X’TALOSC 1/M PFD /CP LPF VCO CLKOUT 1/K Modulation 1/N X1/CLKIN Benefi ts Reduction in EMI System cost saving Reduced system complexity Faster time to market VDD GND CLKOUT /CLKIN

8 Pin

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08 Pin Description Pin Name Pin No. IO Type Description X1/CLKIN 1 I Crystal connection or reference frequency input. This pin has multiple functions. It can be connected either to an external crystal or an external reference clock. GND 2 GND Ground. S1 3 I Spreading Ratio Selection (0, 1); Default = 1; Internal 60K Ω pull–up included. SSON 4 I This pin enables/disables the Spread Spectrum feature; Default= 1 (enabled); Internal 60KΩ pull-up included CLKOUT 5 O Spread spectrum clock output. S0 6 I Frequecy Range Selection (0, 1); Default = 0; Internal 60K Ω pull-DOWN included VDD 7 PWR Power Supply X2 8 O Crystal connection. If using an external reference, this pin must be left unconnected. Note: All pins must be properly set before the system is initialized, except the SSON pin, which can be set at run-time. Spreading Ratio Confi guration VDD = 2.5V ±5% / 3.3V ±10%, Ambient Temperature 25°C Fin (MHz) S1,S0 = (0,0) SSON=1 S1,S0 = (0,1) SSON=1 S1,S0 = (1,0) SSON=1 S1,S0 = (1,1) SSON=1 S1,S0 = 0/1 SSON=0 Modulation Rate (KHz) Reserved Center (%) Center (%) Center No Spread 31.25~62.5 20 - ±0.35 ±0.55 ±0.80 0 F in /640 24 - ±0.30 ±0.50 ±0.70 0 F in /640 27 - ±0.30 ±0.50 ±0.70 0 F in /640 32 - ±0.25 ±0.40 ±0.60 0 F in /640 36 - ±0.20 ±0.35 ±0.55 0 F in /640 40 - ±0.20 ±0.35 ±0.50 0 F in /640

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08 Figure 3 Zoomed-in view of frequency trend

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08 Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifi cation is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability. Maximum Ratings DC Characteristics VDD = 2.5V ±5%, Ambient Temperature 0 to +70°C Symbol Parameter Conditions Min. Typ. Max Unit VDD Operating voltage 2.375 2.5 2.625 V VIH Input high voltage 2.0 – – V VIL Input low voltage – – 0.8 V VOH Output high voltage I OH=-8mA 1.8 – – V VOL Output low voltage I OL= 8mA – – 0.6 V IDD Supply current 27MHz input and no load – – 3.6 mA ZOUT_DOWN Nominal output impedance Down side buffer – 50 – Ω ZOUT_UP Nominal output impedance Up side buffer – 50 – Ω CIN Input capacitance X1 input pin – 5 – pF Electrical Specifi cation AC Characteristics VDD = 2.5V ±5%, Ambient Temperature 0 to +70°C , Fin=27MHz Symbol Parameter Conditions Min. Typ. Max Unit CLKIN Input Frequency 20 MHz≤ Fin ≤40 MHz 20 27 40 MHz CLKOUT Output Frequency (1X) 20 MHz ≤ Fin ≤40 MHz 20 27 40 MHz SRatio Spreading Ratio (SSON=1) (S1,S0)=(0,1) ±0.30 SRatio Spreading ratio (SSON=0) (S1,S0)=(0/1, 0/1) 0 tRise Output rise time Measured from 20% to 80% VDD, 15pF load. – 2.1 – ns tFall Output fall time Measured from 80% to 20% VDD, 15pF load – 1.9 – ns tJ_Short Short term cycle to cycle jitter – 200 300 ps TSSON Spreading on/off settle time 30 μs TDCIN Input duty cycle 40 50 60 % TDCOUT Output duty cycle 45 50 55 %

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08 DC Characteristics VDD = 3.3V ±10%, Ambient Temperature 0 to +70°C Symbol Parameter Conditions Min. Typ. Max Unit VDD Operating voltage 3.0 3.3 3.6 V VIH Input high voltage 2.0 – – V VIL Input low voltage – – 0.8 V VOH Output high voltage I OH=-8 mA 2.5 – – V VOL Output low voltage I OL = 8mA – – 0.5 V IDD Supply current 27MHz input and no load – – 5.3 mA ZOUT_DOWN Nominal output impedance Down side buffer – 45 – Ω ZOUT_UP Nominal output impedance Up side buffer – 45 – Ω CIN Input capacitance X1 input pins – 5 – pF AC Characteristics VDD = 3.3V ±10%, Ambient Temperature 0 to +70°C , Fin=27MHz Symbol Parameter Conditions Min. Typ. Max Unit CLKIN Input Frequency 20 MHz≤ Fin ≤40 MHz 20 27 40 MHz CLKOUT Output Frequency (1X) 20 MHz ≤ Fin ≤40 MHz 20 27 40 MHz SRatio Spreading Ratio (SSON=1) (S1,S0)=(0,1) ±0.30 Spreading Ratio (SSON=0) (S1,S0)=(0/1, 0/1) 0 % tRise Output rise time Measured from 20% to 80% VDD, 15pF load. – 1.7 – ns tFall Output fall time Measured from 80% to 20% VDD, 15pF load – 1.7 – ns tJ_Short Short term cycle to cycle jitter – 180 250 ps TSSON Spreading on/off settle time – 30 – μs TDCIN Input duty cycle 40 50 60 % TDCOUT Output duty cycle 45 50 55 %

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08

Application Information

Two decoupling capacitors of 0.1uF and 1nF must be connected in parallel between VDD and GND. To opti- mize device performance and to lower output noise, the coupling capacitors should be placed on the compo- nent side of the board as close to these pins as possible. There should be no vias placed between the decou- pling capacitors and VDD pin. The PCB trace to VDD pin should be as short as possible, and no vias should be placed between VDD and the capacitors in the decoupling circuit. VDD Strapping to high S0,S1, SSON VDD 0.1uF 1nF VDD Strapping to low S0,S1, SSON 0.1uF 1nF Crystal Load Capacitor If a crystal is used with the device, two external trim capacitors, CLtrim, are used to adjust the effective capac- itance to match the required crystal load capacitance. The CLtrim value can be derived from formula CLtrim = 2*CL – (Cs + Ci). The typical CLtrim = 28pF when crystal load = 18pF, stray capacitance Cs = 3pF and XTAL pins capacitance = 5pF. Crystal CLtrim CLtrim

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08 PCB Layout Recommendation To optimize device performance, all components should be placed on the same side of the board and, therefore, no vias are used through other signal layers. The part should be kept away from other signal traces including ones just underneath the part or on layers adjacent to the ground plane layer used by the part. The PCB trace from the part to the ground via should be kept as short as possible. Packaging Mechanical: 8-pin, TSSOP Physical Dimensions

Ordering Information

Ordering Code Package Code Package Description PI6C3622-1LE L Pb-Free & Green, 8-Pin TSSOP Notes: 1. Thermal characteristics and package top marking information can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green Package 3. Adding an X suffi x = Tape/Reel DESCRIPTION: 8-Pin, 173-Mil Wide, TSSOP PACKAGE CODE: L DOCUMENT CONTROL NO. PD - 1308 REVISION: E DATE: 11/15/05 Note: 1. Package Outline Exclusive of Mold Flash and Metal Burr 2. Controlling dimentions in millimeters 3. Ref: JEDEC MO-153F/AA Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335

  • www.pericom.com

Low Power Spread Spectrum Frequency Multiplier SSCG-GP Family PS8944A 01/30/08 Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com Disclaimer The information contained herein is subject to change without notice. While the information presented herein has been checked for both accuracy and reliability, Pericom Semiconductor Corporation (PSC) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. PSC products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with PSC. Furthermore, PSC does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in signifi cant injury to the user. The inclusion of PSC products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifi es PSC against all charges.