WPMD2010

WPMD2010 WILLSEMI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 8

Technical content

Features

V (BR)DSS R DS(on) Typ 75mΩ@ −4.5V −20 V 101mΩ@ −2.5V PIN CONNECTIONS z Lower RDS(on) Solution in 2x2 mm Package z 1.8 V RDS(on) Rating for Operation at Low Voltage Gate Drive Logic Level z Low Profile (< 0.8 mm) for Ea sy Fit in Thin Environments z Bidirectional Current Flow with Common Source Configuration z Thermal Conduction Application z Optimized for Battery and Load Management Applications in MARKING DIAGRAM Portable Equipment z Li −Ion Battery Charging and Protection Circuits W L S I FYWW z High Power Management in Portable, Battery Powered Products z High Side Load Switch F = Specific Device Code Y W W = D a t e C o d e Order information Part Number Package Shipping WPMD2010-6/TR DFN 6 3000Tape&Reel z Http://www.sh-willsemi.com Will Semiconductor Ltd. 1 2015/08/25 – Rev. 1.2

T A = 25 °C, unless otherwise noted Parameter Symbol 10 S Steady State Unit Drain-Source Voltage V DS -20 Gate-Source Voltage V GS ±12 V T A =25°C 3.6 3.1 Continuous Drain Current J = 150 °C) a T A =70°C I D 2.9 2.7 A T A =25°C 2.0 1.5 Maximum Power Dissipation a T A =70°C P D 1.3 1.0 W T A =25°C 2.3 2.1 Continuous Drain Current J = 150 °C) b T A =70°C I D 1.8 1.7 A T A =25°C 0.8 0.7 Maximum Power Dissipation b T A =70°C P D 0.5 0.4 W Pulsed Drain Current c I DM -18 A Operating Junction and Storage Temperature Range T J , T stg -55 to 150 °C THERMAL RESISTANCE RATINGS Single Operation Parameter Symbol Typical Maximum Unit t ≤ 10 s 50 62 Junction-to-Ambient Thermal Resistance a Steady State R θJA 65 82 t ≤ 10 s 125 150 Junction-to-Ambient Thermal Resistance b Steady State R θJA 145 175 Junction-to-Case Thermal Resistance Steady State R θJC 30 38 °C/W Dual operation t ≤ 10 s 40 50 Junction-to-Ambient Thermal Resistance a Steady State R θJA 52 65 t ≤ 10 s 100 120 Junction-to-Ambient Thermal Resistance b Steady State R θJA 116 140 Junction-to-Case Thermal Resistance Steady State R θJC 25 30 °C/W Surface mounted on FR4 Board using 1 in sq pad size, 1oz Cu. Surface mounted on FR4 board using the minimum recommended pad size, 1oz Cu. Repetitive rating, pulse width limited by junction temperature, t p =10µs, Duty Cycle=1% − − − − − − − − Will Semiconductor Ltd. 2 2015/08/25 – Rev. 1.2

Electrical Characteristics

MOSFET ELECTRICAL CHARACTERISTICS J = 25 C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Uni t OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage BV DSS V GS = 0 V, I D = −250 uA −20 V T J = 25°C −0.1 Zero Gate Voltage Drain Current I DSS V DS = −16 V, V GS = 0 V T J = 85°C −1 uA Gate−to−source Leakage Current I GSS V DS = 0 V, V GS = ±12 V ±100 nA ON CHARACTERISTICS Gate Threshold Voltage V GS(TH) V GS = V DS , I D V GS = −4.5V, I D = −3.1 A 75 120 Drain−to−source On−resistance R DS(on) V GS = −2.5, I D = −2.5 A 101 150 mΩ Forward Transconductance g FS V DS = −5 V, I D = −3.1A 12 S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance C ISS 400 470 550 Output Capacitance C OSS 45 55 65 Reverse Transfer Capacitance C RSS V GS = 0 V, f = 1.0 MHz,V DS = −10 V 40 50 60 pF Total Gate Charge Q G(TOT) 4 6 8 Threshold Gate Charge Q G(TH) 0.3 0.34 0.4 Gate−to−Source Charge Q GS 0.5 0.75 1 Gate−to−Drain Charge Q GD V GS = −4.5 V, V DS = −10 V, I D = −2.7 A 1.0 1.2 1.5 nC Gate Resistance R G 8.8 Ω SWITCHING CHARACTERISTICS Turn−On Delay Time td(ON) 6 9 12 Rise Time tr 5 7 10 Turn−Off Delay Time td(OFF) 30 40 60 Fall Time tf V GS = −4.5 V, V DS = −10 V, R L R G Ω 5 7 10 ns DRAIN−SOURCE DIODE CHARACTERISTICS Forward Recovery Voltage VSD VGS = 0 V, IS = −1.6 A T J = 25°C -0.7 -0.85 -1.5 V Will Semiconductor Ltd. 3 2015/08/25 – Rev. 1.2

Typical Performance Characteristis Will Semiconductor Ltd. 4 2015/08/25 – Rev. 1.2

Will Semiconductor Ltd. 5 2015/08/25 – Rev. 1.2

Will Semiconductor Ltd. 6 2015/08/25 – Rev. 1.2

Power Dissipation Characteristics 1. The package of WPMD2010 is DFN2x2-6L, surface mounted on FR4 Board using 1 in sq pad size，2 oz Cu， R θJA is 82 ℃/W, surface mounted on FR4 Board using minimum pad size，2 oz Cu，R θJA is 175℃ /W. 2. The power dissipation PD is based on TJ (MAX) = 150°C, and the relation between TJ and Pd is TJ = Ta + R θJA* PD, the maximum power dissipation is determined by R θJA . 3. The R θJA is the thermal impedance from junction to ambient; using larger PCB pad size can get smaller R θJA and result in larger maximum power dissipation. Will Semiconductor Ltd. 7 2015/08/25 – Rev. 1.2

g in g Information Will Semiconductor Ltd. 8 2015/08/25 – Rev. 1.2