VN0655 NJSEMI | Alldatasheet

Document overview

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Technical content

Features

Li Free from secondary breakdown L i Low power drive requirement i ] Ease of paralleling Low C,ss and fast switching speeds ill Excellent thermal stability Integral Source-Drain diode 1 i High input impedance and high gain

Applications

[ ] Switches I Power supply circuits : j Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Absolute Maximum Ratings Drain-to-Source Voltage BV I)!;:; Drain-to-Gate Voltage BV DCS Gate-to-Source Voltage ±20V Operating and Storage Temperature -55°Cto+150°C Soldering Temperature* 300°C Distance of 1.6 mm from case for 10 seconds. Ounllfv Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Package Options SG D TO-92 TO-220 TAB: DRAIN Note: See Package Outline section for dimensions.

ID (continuous)* 0.1 5A 0.75A ID (pulsed) 0.5A 1.5A Power Dissipation @ Tc = 25°C 45W «ic °c/w 125 «ia °c/w 170 'DR* 0.1 5A 0.75A 'DRM 0.5A 1.5A ID (continuous) is limited by max rated Tr Electrical Characteristics (@ 25°C unless otherwise specified) Symbol BVDSS ^GS(th) A^GS(th) 'GSS bss 'o(ON) ^DS(ON) ARoS(ON) GFS C|SS C-OSS CRSS ^d(ON) tr 'd(OFF) VSD trr Parameter Drain-to-Source VN0660 Breakdown Voltage VN0655 Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current ON-State Drain Current Static Drain-to-Source ON-State Resistance Change in RDs(ON> w'tn Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time Min 600 550 0.25 Typ 0.8 1.0 300 Max -4.5 100 0.75 130 1.8 Unit V V mV/°C nA liA mA A %/°C my PF ns V ns Conditions V - 0V I - 2mA VGS = VDS, ID = 2mA VGs=VDs,lD = 2mA VGS = ±20V, VDS = 0V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating TA=125°C VGS = 5V, VDS = 25V VGS=10V,VDS = 25V VGS=5V, ID = 100mA VGS= 10V, ID= 100mA VGS= 10V, ID= 100mA V1)S = 25V, ID = 100mA V n\\ v o^v GS - UV, VDS - dSV f - 1 MHz VDD = 25V, n 9^A FWW - 25£2 VGS = OV, ISD = 100mA VGS = OV, ISD = 100mA Notes: 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 10V INPUT ov OUTPUT OV 10%, '(ON) 'd(ON) 'r 1 '!" ^0%\\% ' 1C 90% PULSE < \\R , Rgen | / | 1 '(°FFi . . A A A, 1 1 1. td(OFF) tF ^90° i v U- © i ^ ho% 1 _L i -4 i / i. i OUTPUT D.U.T.