VCXO STATEK | Alldatasheet
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STATEK CORPORATION 512 N. MAIN ST., ORANGE, CA 92868 714-639-7810 FAX: 714-997-1256 www.statek.com
10197 REV B
16.384 MHz to 130 MHz
Voltage-Controlled Crystal Oscillator
DESCRIPTION
Statek’s 5 mm x 7 mm surface mount Voltage-Controlled Crystal Oscillator is designed for applications requiring a highly- pullable 3.3 V CMOS-output VCXO with a small footprint. Offered at frequencies from 16.384 MHz to 130 MHz with operation over wide temperature ranges (up to -40°C to +105°C), these VCXOs offer exceptional performance in a small package.
FEATURES
High Absolute Pull Range (APR) Low phase noise - Low phase jitter Wide frequency range Non-standard frequencies supported Extended Industrial temperature range -55ºC option available
APPLICATIONS
Military & Aerospace Avionics Communications Projectiles PACKAGE DIMENSIONS Dimension Minimum Typical Maximum mm mm mm A 6.86 7.00 7.16 B 4.85 5.00 5.16 C (SM1) 1.55 1.75 1.95 C (SM3/SM5) 1.65 1.85 2.05 D 1.19 1.40 1.41 E 1.07 1.27 1.47 TERMINATIONS Designation Termination SM1 Gold Plated (Pb Free) SM3 Solder Dipped SM5 Solder Dipped (Pb Free) Enable (PIN 1 High*) Disable (PIN 1 Low) Output Frequency Output High Z State Oscillator Oscillates Oscillates Current Normal Lower than normal ENABLE/DISABLE OPTIONS (T/N) Statek offers two enable/disable options: T and N. The T-version has a Tri-State output and continues to oscillate internally when the output is put into the high Z state. As a result, when re-enabled, the oscillator does not have to restart and an output with a stable frequency resumes almost immediately. The N-version does not have PIN 2 connected internally and so has no enable/disable capability. The following table describes the Enable/Disable option T. * When PIN 1 is allowed to float, it is held high by an internal pull-up resistor. ENABLE/DISABLE OPTION T FUNCTION TABLE DIMENSIONS 0.070 (1.80) 0.077 (1.96) 0.100 (2.54) 0.200 (5.08) 0.144 (3.65) inches (mm) SUGGESTED LAND PATTERN PIN CONNECTIONS 1. Control Voltage (Vc) 2. Enable/Disable (T) or not connected (N) 3. Ground 4. Output 5. Not connected (N) 6. Supply Voltage (VDD) Low Profile 5mm x 7mm
Parameter Symbol Units Minimum Typical Maximum Conditions / Comments Nominal Frequency F MHz 16.384 130 -40 +85 -40 +105 Supply Voltage VDD V 3.0 3.3 3.6
5 F ≤ 20 MHz
Current IDD mA 8 20 MHz < F ≤ 50 MHz 14 50 MHz < F ≤ 130 MHz Output Loading 15 F ≤ 100 MHz. 10 F > 100 MHz. Control Voltage VC V 0.3 3.0 Linearity 5 10 Start Up Time ms 5 Duty Cycle % 40 60 45/55 available Rise Time tr ns 5 Fall Time tf ns 5 Logic Low VOL V 0.1 VDD Logic High VOH V 0.9 VDD Period Jitter (rms) J ps 2.5 3.5 Phase Jitter (rms) JΦ ps 0.5 50 MHz (BW = 12 kHz - 20 MHz) Phase Noise L dBc/Hz See graph below. Aging ppm -5 +5 First year, F ≤ 50 MHz STATEK CORPORATION 512 N. MAIN ST., ORANGE, CA 92868 714-639-7810 FAX: 714-997-1256 www.statek.com VCXO A 4 T SM3 130.0M , 75 / I Supply Voltage 3 = 3.0 V 4 = 3.3 V Terminations Blank = SM1 = Gold Plated (Pb Free) SM3 = Solder Dipped SM5 = Solder Dipped (Pb Free) Frequency M = MHz APR Temp. Range: C = -10OC to +70OC I = -40OC to +85OC E = -40OC to +105OC S = Customer Specified Enable/Disable Option T or N PACKAGING OPTIONS VCXO - Tray Pack - Tape and reel Per EIA 481 (see Tape and Reel data sheet 10109) ABSOLUTE MAXIMUM RATINGS Supply Voltage VDD -0.5 V to 4.6 V Storage Temperature -55OC to +125OC Maximum Process Temperature 260OC for 10 seconds T °C SPECIFICATIONS TABLE Parameters listed are at 25°C unless otherwise noted. 1. Contact Factory for -55ºC operation. 2. Higher CL available. Contact factory. 3. The Absolute Pull Range (APR) is the range of frequencies to which the VCXO can be tuned over the operational temperature range. Expressed in parts- per-million (ppm), the reference is the nominal (absolute) frequency F. 4. Tighter aging available. Contact factory. Absolute Pull Range (APR) HOW TO ORDER VCXO SURFACE MOUNT CRYSTAL OSCILLATORS Package Size A = 5 mm x 7 mm Note: a 0.1µF bypass capacitor between VDD and GND pins as close as possible is recommended to minimize power supply line noise. CL pF Test CircuitTypical Phase Noise Density L -160 -140 -120 -100 -80 -60 -40 -20
10 Hz 100 Hz 1 kHz 10 kHz 100 kHz 1 MHz
Phase Noise Density L [dBc/Hz] 20 MHz