V4070 EMMICRO | Alldatasheet
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Technical content
EM MICROELECTRONIC-MARIN SA Parameter Symb. Min. Max. Unit Supply voltage V DD -0.3 9.5 V Voltage at remaining pins V pin VSS - 0.3 VDD + 0.3 V Storage temp. T store -55 125 °C Operating temp. T op -40 85 °C Maximum AC peak Current induced on COIL1 and COIL2 I COIL -30 30 mA Absolute Maximum Ratings Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precau- tions should be taken as for any other CMOS compo- nent. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the supply voltage range. Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified electrical characteristics may affect device reliability or cause malfunction. Table 1 System Principle Figure 3 V4070 Coil 1 Coil 2 Oscillator Antenna Driver Modulator DemodulatorFilter & Gain Data Decoder Data to be sent to transponder Data received from transponder Transceiver Transponde r Signal on Transponder coil Signal on Transceiver coil DataRF C arrier READ MODE Signal on Transponder coil Signal on Transceiver coil DataRF C arrier RECEIVE MODE
EM MICROELECTRONIC-MARIN SA Parameter Symbol Conditions Min. Typ. Max. Unit Supply voltage V DD Read Mode 2 1) V EEPROM write voltage V EE 3V Supply current/read I rd Read Mode VDD =2.0V 5 mA Supply current/read/H I rdH Read Mode VDD =5.0V 10 mA Supply current/write I wr Write Mode VDD =3.0V -40°C<T<85°C 50 mA Supply current/write/H I wrH Write Mode VDD =5.0V 80 mA Modulator voltage drop V ON V(Coil1-VSS) & V(Coil2-VSS) Icoil = 100mA 0.5 V V(Coil1-VSS) & V(Coil2-VSS) Icoil = 5mA 2.5 V Resonance capacitor C r 170 200 230 pF Capacitor temp. coeff TK Cr -40°C to 85°C -75 75 ppm/K Capacitor tolerance/wafer TOL Cr -2 2 % POR level high V prh Rising supply 2.2 2.8 V Clock extractor input min. V clkmin Min for clock extraction 1 Vpp Clock extractor input max. V clkmax Max for clock extraction 50 mVpp MONOFLOP delay T mono 40 80 ms EEPROM data endurance N cy Erase all / Write all 1000 cycles EEPROM retention T ret Top = 55°C after 1000 cycles 10 years 1) Maximum voltage is defined by forcing 10mA on Coil1-Coil2
Electrical Characteristics
VDD = 2.5V VSS = 0V f coil = 125 kHz Sine wave V coil = 1Vpp T op = 25°C Parameter Symbol Conditions Value Unit Power on Reset Time t por 600 ms Read Bit Period t rdb RF periods 32 periods LIW/ACK/NACK pattern Duration t patt RF periods 160 periods Duration of ID t rID RF periods 1024 periods Divergence-Time T div RF periods 224 periods Authentication-Time t auth RF periods 3744 periods WRITE Access Time t wa RF periods 128 periods EEPROM write Time t wee RF periods, VDD = 3V 3072 periods Timing Characteristics Table 2 Table 3 RF periods respresent periods of the carrier frequency emitted by the transceiver unit. For example, if 125 kHz is used, the Read bit period would be: 1/125’000*32 = 256µs.
EM MICROELECTRONIC-MARIN SA Control Logic Modulator Encoder Power Control Clock Extractor Sequencer Data Extractor Command Decoder EEPROM G ND Coil 1 Coil 2 Serial Data Reset Wr ite Enable C sC r AC/DC converter Crypto- Algorithm Block Diagram Functional Description General The V4070 is supplied by means of an electromag- netic field induced on the attached coil. The AC volt- age is rectified in order to provide a DC internal supply voltage. When the DC voltage crosses the Power-On level, the chip will enter the Standby Mode and expect commands. In Standby Mode a continuous sequence of Listen Windows (LIW) is generated. During this time, the crypto-Chip will turn to the Receive Mode (RM) if it receives a valid RM pattern. The chip then expects a command to enter the desired mode of operation. Memory Organisation The 160 bits EEPROM are organised in 10 words of 16 bits. Words 0 and 1 contain the USER_MEMORY and the Lock-Bits LB1 and LB0. Write-Mode can only be entered if LB1=’1' and LB0=’0'. Words 2 and 3 con- tain the ID that can never be modified. Words 4 through 9 contain the 96 bits of secret key. These bits influ- ence the crypto-algorithm but cannot be read directly. Figure 4 Pad Description Pad Name Description COIL2 VSS TST1 TST2 TST3 VDD COIL1 Coil Terminal 2 Negative DC Supply Test 1 connection Test 2 connection Test 3 connection Positive DC Supply Coil Terminal 1
EM MICROELECTRONIC-MARIN SA Standby Mode After a Power-On Reset and upon completion of a command, the chip will execute the Standby Mode, in which it will continuously send LIWs to allow the reader to issue commands. As every LIW has a duration of 160 periods of the RF field the reader can turn to Re- ceive mode every 1.3ms at 125kHz. Receive Mode To change from Standby Mode to another operation the chip has to be brought into Receive Mode. To do this the Transceiver sends to the chip the RM pattern during the 32 clocks of modulated phase in a Listen Window (LIW). The V4070 will stop sending data upon reception of a valid RM. The RM pattern consists of 2 bits “0” sent by the transceiver. The first “0” is to be detected during the 32 periods when the modulation is “ON” in the LIW. Next the V4070 expects a command to specify the operation to be executed. Commands The commands are composed of 4 bits, divided into 3 data bits and 1 even parity bit (total amount of “1’s” is even including the parity bit). There exist 4 different commands. Upon reception of an unknown command or a command with wrong parity the chip will immedi- ately return into Standby Mode. COMMAND BIT S FUNCTIO N WRITE WORD1 0 1 0 Parity bitFirst bit Recieved AUTHENTICATION0 1 1 0 ID-MODE0 0 1 1 UM-MODE0 1 0 1 Commands Figure 7 UM-MODE In UM-MODE the chip sends LB1 and LB0 followed by the 30 Bits of UM starting with the MSB following the same procedure as in ID-MODE. After completion the chip returns to Standby Mode. Figure 6 ID Mode After reception of the command including the parity the chip sends a header consisting of 12 manchester coded ‘1’s followed by 4 manchester coded ‘0’s. Then the chip sends the 32 Bits of ID contained in words 3 and 2 of the EEPROM once, without parity, starting with the MSB of word 3. After completion the chip returns to Standby-Mode. Figure 5 OUTPUT Coded Data Data 1 bit - 32 T0 periods T0 = Period of RF carrier frequency D31-D t rID 11111111111100 Header LIWLIW CommanRMINPUT ID Mode Memory Map
0 UM 15 UM 0
word 9 Crypt Key 95 Crypt Key 80