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UT01VS33D V oltage Supervisor Data Sheet July 28, 2014 www.aeroflex.com/voltsupv
FEATURES
3.15V to 3.6V Operating voltage range Power supply (VDD) monitor set by the internal voltage reference at 3.08V Precision Input V oltage Monitor using an internal 0.6V voltage reference Watchdog Timer Circuit monitoring activity on WDI input - Nominal timeout 1.6s RESET_OD output responding to the VDD monitor and the manual reset input MR - Nominal RESET_OD pulse width 200ms RESET_OD level valid for VDD>=1.2V Operating Temperature Range -55oC to +125oC Low Power, Typical 400uA Operational environment: - Total dose: 300 krad(Si) - SEL Immune: <110 MeV-cm2/mg @125oC - SET Immune: <80 MeV-cm2/mg Packaging options: - 8-lead dual-in-line flatpack Standard Microelectronics Drawing 5962-11213 - QML Q and V INTRODUCTION The UT01VS33D’s function is to monitor vital supply and signal voltages in microprocessor systems. It provides for safe reset during power up, power down and brownout conditions by using an internal precision voltage reference. The UT01VS33D monitors activity at an independent watchdog input by employing an internal timer and a watchdog output that goes low if the input is not toggled within 1.6s. It provides for precision voltage threshold detection on an independent voltage input which could be used for battery or supply-low monitoring of a supply voltage other than V DD. The UT01VS33D includes an active low manual reset with an open drain output.
APPLICATIONS
V oltage Supervisor function for various systems including microprocessors, microcontrollers, DSPs and FPGAs Critical battery and power supply monitoring Replacement of older discrete solutions to improve reliability, accuracy and reduce complexity of the systems Figure 1. UT01VS33D Functional Block Diagram
Number Pins Type Description 1M R Digital Input Manual Reset Input with an internal pull-up. Active low. MR low forces the reset output RESET_OD low. Required minimum MR pulse width is 150ns. RESET_OD is held low for duration of the reset timer. 2V D DS u p p l y Power supply. Operating voltage range is 3.15V to 3.6V . VDD level is monitored internally by a dedicated comparator circuit, which employs an internal bandgap voltage reference nominally equal to 1.25V . Every time VDD falls below the threshold voltage, nominally 3.08V , RESET_OD and WDO outputs are forced low. (See WDO and RESET_OD descriptions.) (Figure 4.) 3G N DS u p p l y Ground. This pin should be tied to ground and establishes the reference for voltage detection. 4 PFI Analog Input Threshold detector input. V oltage on this input is fed directly to an internal comparator where it is compared to the voltage reference of 0.6V . It can be used for detection of low battery or power failure of voltage supplies other than VDD. When voltage at PFI input drops below its threshold value of 0.6V , PFO output is forced low, otherwise, stays high. 5P F O Digital Output Threshold detector output. Active low. It responds directly to PFI input. If PFI voltage is below the bandgap reference voltage, PFO is low. If PFI is above the reference voltage, PFO output is high. 6 WDI Digital Input Watchdog timer input pin. This pin is typically used to monitor microprocessor activity. It can assume three states: low, high and float. If WDI is floating or connected to a high impedance three state buffer, the watchdog timer is not active, and the corresponding watchdog output WDO is high. Watchdog timer is also not active any time RESET_OD is low. Providing that RESET_OD is not asserted, any change of state at WDI that is longer than 100ns will start the timer, or restart it, if the timer is already running (Figure 3.). If there is no activity within the timeout period, nominally 1.6sec, the timer will stop running and WDO output will go low (Figure 3).
7 RESET_OD Open Drain
Reset output. Active low open drain output. This pin is pulled up with a resistor consistant with the sink and voltage current as specified in the electrical characteristics table. This output responds to both: VDD monitoring circuits and the manual reset input MR. On power up, RESET_OD is guaranteed to be logic low for all VDD values from 1.2V up to the reset threshold, nominally 3.08V . Once this threshold is reached, an internal RESET_OD timer is activated. During the countdown RESET_OD output is kept low. It is raised high upon completion of countdown, typically after 200ms. If a brown out condition occurs during the reset timer countdown, the reset timer would be reset and another countdown would start after V DD levels were restored above the reset threshold. On power down, when VDD falls below the threshold voltage, RESET_OD goes low and is guaranteed to stay low until VDD drops below 1.2V . If MR is asserted low, RESET_OD is forced low and the reset timer is kept reset. When MR is released high, the timer is activated and RESET_OD is kept low until completion of the reset timeout, when it is raised high.
simultaneously which prevents an interrupt. Figure 2. UT01VS33D Pin Configuration
ABSOLUTE MAXIMUM RATINGS 1 (Referenced to GND) Notes: 1. Stresses outside the listed absolute maximu m ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS PARAMETER LIMIT UNITS Total Ionizing Dose (TID) 300 krad(Si) Single Event Latchup Immune (SEL) <110 MeV-cm2/mg Single Event Transient Immune (SET) <80 MeV-cm2/mg SYMBOL PARAMETER LIMITS UNITS VDD V oltage supply 7.2 V TJ Maximum junction temperature 175 C T Storage temperature -65 to +150 C PD Power dissipation 2.5 W Vin Input voltages -0.3V to (VDD+0.3V) V Tiead Lead Temperature (soldering, 10 seconds) +300 C JC Thermal resistance, junction-to-case 15 C/W VESD ESDHBM 1000 V SYMBOL PARAMETER LIMITS UNITS VDD Positive supply voltage 3.15 to 3.6 V TC Case temperature range -55 to +125 C GND Negative supply voltage 0.0 V
ELECTRICAL CHARACTERISTICS 1,2 (VDD = 3.15V to 3.6V: -55°C < TC < +125°C) SYMBOL PARAMETER CONDITION MIN MAX UNIT Power Supply IDD VDD supply current V DD=3.6V 450 A Digital Inputs and Outputs (MR, RESET_OD, WDI, WDO, PFO) VIL_WDI Digital input low V DD=3.15V 0.6 V VIH_WDI Digital input high V DD=3.6V 0.7xV DD V VIL_MR Manual reset input low V DD=3.15V 0.6 V VIH_MR Manual reset input high V DD=3.6V 0.7xV DD V VOL_WDO Digital output low V DD=3.15V , ISINK= 500A0 . 3 V VOL_RESET_OD RESET_OD digital output low V DD=3.15V , ISINK=1.2mA 0.3 V VOL_PFOP F O digital output low V DD=3.15V , ISINK=1.2mA 0.3 VOH 3 Digital output high V DD=3.15V , ISOURCE =500A 0.8xV DD V Timing and Threshold Voltages tRST-ASSRT 4 VDD falling reset assertion V DD < 3.0V 0.7 1.8 s tRS Reset pulse width V DD=3.15V 140 280 ms tWD Watchdog time-out period V DD=3.6V 1.0 2.25 s tWP Watchdog input pulse width V DD=3.15V 100 ns VRT Reset threshold voltage V DD=3.15V 3.0 3.15 V VRTHYS Reset threshold voltage hysteresis 20 mV tMR Manual reset (MR) input pulse width VDD=3.15V 150 ns tMD Manual reset (MR) to reset out delay VDD=3.15V 100 ns Analog Input PFI IPFI
4 Threshold detector input (PFI)
VDD=3.6V -20 -20 nA VPFI Threshold detector input (PFI) threshold voltage VDD=3.3V 0.576 0.624 V IMR Manual reset pull-up current V DD=3.6V , MR=0.0V -250 -25 A tRPFI PFI rising threshold crossing to PFO delay 20 s tFPFI PFI falling threshold crossing to PFO delay 40 s ILEAK Reset output leakage current V OUT = VDD 1 A IWDI Watchdog input current WDI pin = V DD = 3.6V WDI pin = 0V , VDD = 3.6V -20 20 A
Notes: 1. For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance at 25oC per MIL-STD-883 Method 1019, Condition A, up to the maximum TID level procured (see ordering information). operating supply voltage. 3. VOH characterization applies to WDO, and PFO. VOH for RESET_OD is within 10mV of VDD. 4. Guaranteed by design, not tested.
causing the RESET_OD output to be asserted low indicating an under voltage condition. asserted when a brown out occurs on either the 1.8V or 1.2V regulated supplies. Figure 5. UT01VS33D Under Voltage Monitor and Detection
2 VDD
Figure 6. Under Voltage Monitoring and sequencing of 1.8V and 1.2V Power Supplies
4 PFO 5
Figure 7. UT01VS33D Over Voltage Power Supply Monitoring and Reset
Voltage Supervisor monitors the over voltage of the same 3.3V power supply. voltage monitoring can be set to accommodate a range of power supply voltages. Figure 8. UT01VS33D Under Voltage and Over Voltage Power Supply Monitoring and Reset
Table 1. Under Voltage Over Voltage Truth Table
Figure 9. 8-pin Dual-In-Line Flatpack
ORDERING INFORMATION
UT01VS33D VOLTAGE SUPERVISOR Lead Finish: (Notes: 1) (C) = Gold Screening Level: (Notes: 2 and 3) (P) = Prototype Flow (C) = HiRel Flow (Temperature range -55 oC to +125oC) Case Outline: (X) = 8-lead Ceramic Flat Package TID Tolerance: (-) = None Device Type (D) = Active low open drain RESET_OD Generic part number: (01VS33) Notes: 1. Lead finish is "C" (Gold) only. 2. Prototype flow per Aeroflex Manufacturing Flows Document. Devices are tested at 25C only. Lead finish is Gold "C" only. Radiation neither tested nor guaranteed. 3. HiRel Flow per Aeroflex Manufacturing Flows Do cument. Radiation neither tested nor guaranteed.
UT01VS33D VOLTAGE SUPERVISOR Lead Finish: (NOTE: 1) (C) = Gold Case Outline: (X) = 8-Lead Ceramic Flatpack Screening Level: (Q) = QML Class Q (V) = QML Class V Device Type: (16) = UT01VS33D (Temperature Range: -55 oC to +125oC) Drawing Number: 11213 = 3.3V Single Channel V oltage Supervisor Total Dose: (R) = 100 krad(Si) (F) = 300 krad(Si) Federal Stock Class Number: No Options Notes: 1. Lead finish is “C” (gold) only.
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