UP8807 UPI | Alldatasheet
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Technical content
Features
SOT23-5L (PMA5) GND VOUT VIN SOT89-3L (BKA3) VIN SOT23-3L (AMA3) GND VOUT VIN3 VOUT VIN GND SOT89-3L (AKA3) GND VOUT VIN GND SOT223-3L (AJA3) GND GND VOUT VIN SOT223-3L (BJA3) VIN Pin Configuration GNDNC FB VOUT NC EN VIN VIN GND PSOP-8L (QSU8) NC GND EN FB VIN VIN VOUT VOUT GND WDFN3x3-8L (PDD8) ENVIN NC GND FB VIN VOUT VOUT GND PSOP-8L (PSU8) NC GND EN FB VIN VIN VOUT VOUT GND VDFN6x5-8L (PDC8) NCNC EN GND VIN WDFN2x2-6L (PDE6) FB VOUT
2 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com Typical Application Circuit VOUT EN VIN uP8807M5-00 GND Enable Disable VIN VOUT = 1.2V FB 100K 200K 22pF 1uF/300mA 2.2uF/500mA 1uF/300mA 2.2uF/500mA VOUTVIN uP8807M3-12 GND VIN 1.2V 1uF/300mA 2.2uF/500mA 1uF/300mA 2.2uF/500mA rebmuNredrOe gakcaPg nikraMpoTk rameR XX-3AMA7088PuL 3-32TOSX XA4AS snoitpOegatloV:XX ;egatloVtuptuOelbatsujdA:00 )segakcapdael-3rofelbaliavatonsinoisrev00( edoCtcudorP:DD XX-5AMP7088PuL 5-32TOSX XP5AS XX-3AJA7088Pu L3-322TOS XXA6AS XX-3AJB7088PuX XB6AS XX-3AKA7088Pu L3-98TOS XXA7AS XX-3AKB7088PuX XB7AS XX-8USP7088Pu L8-POSP XXP7088Pu XX-8USQ7088PuX XQ7088Pu XX-8CDP7088PuL 8-5x6NFDVX XP7088Pu XX-8DDP7088Pu L8-3x3NFDW XXP7088 00-8DDP7088PuP 7088Pu XX-6EDP7088Pu L6-2x2NFDW DD 00-6EDP7088PuL F Note: (1) Please check the sample/production availability with uPI representatives. (2) uPI products are compatible with the current IPC/JEDEC J-STD-020 requirement. They are halogen-free, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes.
Ordering Information
3uP8807-DS-F0002, Jun. 2016 www.upi-semi.com Functional Block Diagram Current Sense Power On Reset Band Gap Thermal Shutdown MOSFET Driver VIN VOUT GND EN Error Amp. VREF Fixed Adjustable FB emaNn oitcnuFniP NIV .egatloVtupnI ehtottnerrucseilppustahtrotsisnartssaplanretniehtfoecruosehtotstcennocnipsihT roticapacgnilpuocedehtecalP.roticapaccimarecFu1muminimahtiwDNGotNIVssapyB.niptuptuo .ecivedehtotelbissopsaesolcsayllacisyhp DNG .dnuorG NE .tupnIelbanE aottnerructnecseiuqehtgnicuder,fforotalugerehtsnrutV53.0wolebnipsihtgnilluP .segakcapnip-3rofelbaliavatonsinipsihT.eulavgnitarepostifonoitcarf BF .)noisreVelbatsujdA(niPkcabdeeF BFehT.reifilpmarorreehtfotupnignitrevni-nonehtsinipsihT VotgnidroccaegatlovtuptuoehtteS.egatlovecnereferV8.0otdetalugersiegatlovnip TUO 1R(x8.0= .noisrevtuptuodexifehtrofdetcennocyllanretnitonsinipsihT.)V(1R/)2R+ TUOV .egatloVtuptuO siecivedehtnehwstsixeecnatsiserwolllupA.ecivedehtfotuptuorewopsinipsihT a,egnahcdaolegralotesnopsertneisnartetauqedaniatniamoT.nipNEehtwolgnillupybdelbasid .TUOVnostneisnarttnerrucfostceffeehtecuderotderiuqersiroticapaccimarecFu1muminim Functional Pin Description
4 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com Functional Description Definitions Some important terminologies for LDO are specified below. Dropout Voltage The input/output Voltage differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 2% below its nominal value, dropout voltage is affected by junction temperature, load current and minimum input supply requirements. Line Regulation The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that average chip temperature is not significantly affected. Load Regulation The change in output voltage for a change in load current at constant chip temperature. The measurement is made under conditions of low dissipation or by using pulse techniques such that average chip temperature is not significantly affected. Maximum Power Dissipation The maximum total device dissipation for which the regulator will operate within specifications. Quiescent Bias Current Current which is used to operate the regulator chip and is not delivered to the load. The quiescent current I Q is defined as the supply current used by the regulator itself that does not pass into the load. It typically includes all bias currents required by the LDO and any drive current for the pass transistor. The uP8807 is a compact fast transient response low dropout regulator specifically designed to continuously deliver up to 600mA output current for space-limited applications. Designed with a P-channel MOSFET series pass transistor, the uP8807 yields extremely low dropout voltage (e.g. 300mV at 600mA) and maintain very low quiescent current (70uA). The uP8807 does not require a bypass capacitor, hence achieving the smallest PCB area. The uP8807 is designed and optimized to work with low- value, low-cost ceramic capacitors. Only a 1uF ceramic output capacitor is required for stable operation for any load conditions. Other features include foldback overcurrent protection, quick soft start, and overtemperature protec tion. The uP8807 is available in fixed output voltages from 0.8V to 3.3V with 0.1V increments. As shown in the Functional Block Diagram, the uP8807 consists of a bandgap for reference voltage, error amplifier, P-channel MOSFET pass transistor and internal feedback connected to the inverting input of error amplifier. The error amplifier compares this reference voltage with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output. The output voltage is fed back through an internal or external resistor voltage- divider connected to the VOUT pin. Additional blocks include a current limiter, thermal sensor, and shutdown logic. Supply Input Power On Reset The input voltage supplies current to the output voltage and supplies current for control circuit. The input voltage is monitored for power on reset (POR) to ensure the regulator is not enabled until the input voltage is high enough for normal operation. The POR threshold level is typical 2.1V at V IN rising. Enable/Shutdown The uP8807 features an active-high enable pin that allows the regulator to be disabled. Forcing the enable pin lower than 0.35V shuts down the regulator and reduces its quiescent current less than 1uA. The voltage reference, error amplifier, gate-driver circuit and pass transistor are disabled in the shutdown state. When the regulator is in shutdown mode, an internal 600 Ω resistor is connected between VOUT and GND. This is intended to discharge C OUT when the LDO regulator is disabled. The internal 600Ω has no adverse effect on device turn-on time. Forcing the enable pin higher than 1.2V enables the output voltage (once the input voltage is higher than its POR threshold level). If the enable function is not needed in a specific application, it may be tied to VIN to keep the regulator in an always on state. The enable pin uses CMOS technology and cannot be left floating, as this may cause an indeterminate state on the output. Current Limit and Short-Circuit Protection The uP8807 includes a current limiter that monitors and controls the gate voltage of pass transistor to limit the output current to 1200mA typically. A short circuit protector monitors the output voltage and asserts output short circuit if V OUT is lower than 40% of V NOM. The current limiting level is reduced to 800mA. The output voltage is rebuilt after short circuit is removed. Over Temperature Protection The overtemperature protection limits total power dissipation in the uP8807. When the junction temperature exceeds T J = 170 oC, the thermal sensor signal the shutdowns logic, turning off the pass transistor and allows the device to cool down. The thermal sensor turns on the pass transistor again after the device junction temperature drops by 40 oC, resulting in a pulsed output during continuous during continuous thermal-overload conditions. The over
5uP8807-DS-F0002, Jun. 2016 www.upi-semi.com temperature protection is designed to protect the device in the event of a fault condition. For continual operation, do not exceed the recommended temperature of T J = 125 oC for maximum reliability. Functional Description
6 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com (Note 1) ESD Rating (Note 2) Package Thermal Resistance (Note 3) Power Dissipation, PD @ TA = 25OC (Note 4) Absolute Maximum Rating Thermal Information Recommended Operation Conditions
7uP8807-DS-F0002, Jun. 2016 www.upi-semi.com
Electrical Characteristics
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8 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. θJA is measured in the natural convection at TA = 25OC on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 4. The device is not guaranteed to function outside its operating conditions. retemaraPl obmySs noitidnoCtseTn iMp yTx aMt inU noitcetorP dlohserhTtimiLtnerruCI MIL 9.02 .16 .1A tnerruCtiucriCtrohS 6.0- -1 A nwodtuhSlamrehT erutarepmeT T DS I TUO V,Am0= NI V= NE V5.5= , --0 71- - OC nwodtuhSlamrehT siseretsyH T SYHDS I TUO V,Am0= NI V= NE V5.5=- -0 4- - OC
9uP8807-DS-F0002, Jun. 2016 www.upi-semi.com 100 200 300 400 500 300 350 400 450 500 550 600 650 700 750 800 -50 -25 0 25 50 75 100 125 150 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 -50 -25 0 25 50 75 100 125 150 Disable Enable -50 -25 0 25 50 75 100 125 150 0.00 0.01 0.02 0.03 0.04 0.05 -50 -25 0 25 50 75 100 125 150 -0.8 -0.6 -0.4 -0.2 0.2 0.4 - 5 0 - 2 50 2 55 07 5 1 0 0 1 2 5 1 5 0 Typical Operation Characteristics Output Voltage vs. Temperature Temperature (OC) Output Voltage Varuation (%) Shutdown Current vs. Temperature Temperature (OC) Shutdown Current (uA) Quiescent Current vs. Temperature Temperature (OC) Quiescent Current (uA) Pull Low Resistance vs. Input Voltage Input Voltage (V) EN = 0V, VOUT = 1V, Pull Low Resistance at VOUT Pull Low Resistance (Ω) On Resistance vs. Temperature Temperature (OC) VIN = 3V On Resistance (mΩ) Enable/ Disable vs. Temperature Temperature (OC) Enable/ Disable Threshold (V)
10 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com Enable (2V/Div) Disable (2V/Div) IIN (200mA/Div) VIN (2V/Div) VOUT (1V/Div) IIN (200mA/Div) 0.5 0.6 0.7 0.8 0.9 1.0 Disable Enable 100 150 200 250 300 350 400 450 0 100 200 300 400 500 600 TJ = -25OC TJ = 25OC TJ = 125OC -0.06 -0.04 -0.02 0.00 0.02 0.04 0.06 100 Typical Operation Characteristics Quiescent Current vs. Input Voltage Input Voltage (V) VOUT = 3.3V Quiescent Current (uA) Output Voltage Line Regulation Input Voltage (V) For VIN > VOUT + 1V Output Voltage Variation (%) Output Current vs. Dropout Voltage Output Current (mA) VIN = VOUT = 3.3V Dropout Voltage (mV) Enable/ Disable vs. Input Voltage Input Voltage (V) Enable/ Disable Threshold (V) Turn On Waveforms Time (40us/Div) CIN = COUT = 1uF, VOUT = 3.3V, ROUT = 15Ω Power On Waveforms Time (2ms/Div) CIN = COUT = 1uF, VOUT = 3.3V, ROUT = 15Ω
11uP8807-DS-F0002, Jun. 2016 www.upi-semi.com IOUT (500mV/Div) VOUT (100mV/Div) Enable (2V/Div) Disable (2V/Div) IIN (200mA/Div) VIN (2V/Div) VOUT (1V/Div) IIN (200mA/Div) Typical Operation Characteristics Power Off Waveforms Time (40us/Div) CIN = COUT = 1uF, VOUT = 3.3V, ROUT = 15Ω Power Off Waveforms Time (2ms/Div) CIN = COUT = 1uF, VOUT = 3.3V, ROUT = 15Ω Load Transient Response Time (20us/Div) CIN = COUT = 1uF, VOUT = 3.3V, IOUT = 10 to 660mA
12 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com The uP8807 is specially designed to provide low-noise, high PSRR output voltage without a bypassing capacitor on its reference voltage. However, input and output capacitor should be well considered for optimal performance. Input Capacitors The uP8807 requires well-decoupled supply input for optimal performance. A minimum 1uF capacitor is required from-input-to-ground to provide stability. Input capacitors greater than 1uF offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection ratio (PSRR). Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for CIN. However, low-ESR ceramic capacitors provide optimal performance at a minimum of space and are highly recommended due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices. Additional high frequency capacitors, such as small-valued NPO dielectric type capacitors, help filter out high-frequency noise and are good design practice in any RF-based circuit. Place the capacitors physically as close as possible to the device with wide and direct PCB traces. Output Capacitors and Stability For proper load voltage regulation and operational stability, a capacitor is required between VOUT and GND pins. The uP8807 is designed and optimized to work with low-value, low-cost ceramic capacitors in space saving and performance consideration. Typical output capacitor values for maximum output current conditions range from 1uF to 10uF. Larger capacitors are recommended for applications expecting low output noise and optimum power supply ripple rejection characteristics. Place the capacitors physically as close as possible to the device with wide and direct PCB traces. X7R/X5R dielectric-type ceramic capacitors are recommended because of their temperature performance. X7R type capacitors loss capacitance by 15% over their operating temperature rand and are the most stable type of ceramic capacitors. Z5U or Y5V dielectric capacitors loss their capacitance by 50% and 60% respectively over their operating temperature ranges. If Y5V or Z5U capacitors are used as output capacitors, the capacitance must be much higher than that of X7R capacitors to ensure the same minimum capacitance over the operating temperature range. ESR of output capacitors should be well considered to ensure stable operation of the device. High ESR capacitors may cause high frequency oscillation. No Load Stability The uP8807 is designed to maintain output voltage regulation and stability under operational no load conditions. This is important characteristic for CMOS RAM keep-alive applications where the output current may drop to zero.
Application Information
13uP8807-DS-F0002, Jun. 2016 www.upi-semi.com
Package Information
0.30 - 0.50 2.80 - 3.00 2.60 - 3.00
1.90 BSC
0.00 - 0.15 1.50 - 1.70 0.08 - 0.22 0.30 - 0.60
0.95 BSC
1.45 MAX
0.30 - 0.50 2.80 - 3.00 2.60 - 3.00 0.00 - 0.15 1.50 - 1.70 0.08 - 0.22 0.30 - 0.60
14 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com 0.66 - 0.84 2.90 - 3.10 6.70 - 7.30
2.30 BSC
3.30 - 3.70 0.23 - 0.35
0.75 MIN
0.02 - 0.10
1.80 MAX
6.20 - 6.70
4.60 BSC
0.36 - 0.48 1.35 - 1.83
1.50 BSC
0.35 - 0.44 0.36 - 0.56 12 30.80 - 1.20 2.29 - 2.60 3.94 - 4.25
15uP8807-DS-F0002, Jun. 2016 www.upi-semi.com 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm. 0.31 - 0.51 4.80 - 5.00 5.79 - 6.20 0.10 - 0.25 0.40 - 1.27
1.27 BSC
3.80 - 4.00 1.80 - 2.40 1.80 - 2.40 0.00 - 0.15
1.7 MAX
16 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com WDFN2x2 - 6L 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm. 4 6 0.20 - 0.350.65 BSC 1.90 - 2.10 1.90 - 2.10 0.55 - 1.05 0.00 - 0.050.20 REF 0.70 - 0.80
17uP8807-DS-F0002, Jun. 2016 www.upi-semi.com WDFN3x3 - 8L 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm. 0.70 - 0.80 0.18 - 0.400.65 BSC 2.90 - 3.10 2.90 - 3.10 1.40 - 1.80 0.00 - 0.050.203 REF
18 uP8807-DS-F0002, Jun. 2016 www.upi-semi.com VDFN6x5 - 8L 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm. 0.80 - 0.90 0.35 - 0.481.27 BSC 5.90 - 6.10 4.90 - 5.10 3.30 - 3.50 0.50 - 0.75 3.90 - 4.10 0.00 - 0.050.20 REF
19uP8807-DS-F0002, Jun. 2016 www.upi-semi.com Important Notice uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. uPI products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment. However, no responsibility is assumed by uPI or its subsidiaries for its use or application of any product or circuit; nor for any infringements of patents or other rights of third parties which may result from its use or application, including but not limited to any consequential or incidental damages. No uPI components are designed, intended or authorized for use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No license is granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries. COPYRIGHT ( C) 2015, UPI SEMICONDUCTOR CORP. uPI Semiconductor Corp. Headquarter 9F.,No.5, Taiyuan 1st St. Zhubei City, Hsinchu Taiwan, R.O.C. uPI Semiconductor Corp. Sales Branch Office 12F-5, No. 408, Ruiguang Rd. Neihu District, Taipei Taiwan, R.O.C.