UP1537PDDA

UP1537 UPI | Alldatasheet

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Features

The uP1537 is a high-efficiency, single synchronous buck controller suitable for low output voltage point-of-load applications in notebook computers and similar digital consumer applications. The proprietary RCOT TM technology provides fast transient response and high noise immunity. It supports ceramic output capacitors. An advantage of this control scheme is that it does not require an external phase compensation network, helping the designer with ease-of-use and realizing low external component count configuration. This combination is ideal for building modern low duty ratio, ultra-fast load step response DC-DC converters. The output voltage ranges from 0.7 V to 2.6V, and the conversion input voltage range is from 3 V to 26V. The switching frequency is selectable from four preset values using a resistor connected from the RF pin to ground. RCOT TM control tracks the preset switching frequency over a wide range of input and output voltages, while it increases the switching frequency at step- up of load. The RF pin also serves in selecting between auto-skip mode and forced continuous conduction mode for light load conditions. The strong gate drivers of the uP1537 allow low RDS(ON) FETs for high current applications. Note: uPI products are compatible with the current IPC/ JEDEC J-STD-020 requirement. They are halogen-free, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes. High Performance, Single Synchronous Step-Down Controller for Notebook Power Supply Pin Configuration PHAS E BOOT VCC5 GND POK CS VFB WDFN3x3-10L RF 5 LGATE6 EN UGAT E GND LGATE 101112 BOOT VF B NC UGATE RF VCC5 5 64 GN D EN POK PHASE CS WQFN2x2-12L

2 uP1537-DS-F0000, Feb. 2018 www.upi-semi.com Functional Pin Description . o Nn i P e m a Nn iPn o i t c n u F n i P P 7 3 5 1 PuR 7 3 5 1 P u 16 K O P . r o t a c i d n I K O r e w o P. t u p t u o n i a r d - n e p o n a s i n i p s i h T 27 S C . g n i t t e Sn o i t c e t o r P t n e r r u C r e v O o t D N Go t n i p s i h t m o r f r o t s i s e r a t c e n n o C . l e v e l n o i t c e t o r p t n e r r u c r e v o e h t t e s 38 N E . e l b a n E p i h C . e c i v e d e h t e l b a s i d o t D N Go t t r o h S 49 B F V . t u p n I k c a b d e e F ro t s i s e r A . r e i f i l p m a r o r r e e h t o t t u p n i g n i t r e v n i e h t s i n i p si h T . e g a t l o v r o t a l u g e r t e s o t d e s u s i D N Go t t u p t u om o r f r e d i v i d 50 1F R . g n i mm a r g o r P y c n e u q e r F g n i h c t i w Sro e d o mp i k s - o t u A s l o r t n o c o s l a n i p s i h T .e d o Mp i k S - o t u A : D N G o t n i p s i h t m o r f r o t s i s e r a t c e n n o C . n o i t c e l es M C C d e c r o f .h g i h s e m o c e b K O P r e t f aM C C d e c r o F : K O P o t n i p s i h t m o r f r o t s i s e r a t c e n n o C --2 1D N G . d n u o r G

61 E T A G L

. t u p t u O r e v i r De t a GT E F S O M r e w o L re w o l f o e t a g e h t o t n i p s i h t t c e n n o C yr t i u c r i c n o i t c e t o r p h g u o r h t - t o o h s e v i t p a d a e h t y b d e r o t i no m s i n i p s i h T . T E F S O M . f f o d e n r u t s a h T E F S O M r e w o l e h t n e h w e n i m r e t e d o t 72 5 C C V . C I e h t r o f e g a t l o V y l p p u Stc e n n o C . C I e h t r o f e g a t l o v s a i b s e d i v o r p n i p s i h T . r e t l i f C / R a h t i w t i s s a p y b d n a e c r u o s e g a t l o v V 5 o t n i p s i h t

83 E S A H P

. e d o N h c t i w S ni a r d e h t d n a T E F S O M r e p p u e h t f o e c r u o s e h t o t n i p s i h t t c e n n o C ni p s i h T . r e v i r d E T A G U e h t r o f k n i s e h t s a d e s u s i n i p s i h T . T E F SO M r e w o l e h t f o e n i m r e t e d o t y r t i u c r i c n o i t c e t o r p h g u o r h t - t o o h s e v i t p a d ae h t y b d e r o t i n o mo s l a s i dn a n i p s i h t n e e w t e b e d o i d y k t t o h c S A . f f o d e n r u t s a h T E F S O M r ep p u e h t n e h w no mm o c s i h c i h w e g a t l o v t n e i s n a r t e v i t a g e n e c u d e r o t d e d n e mm o c e r s i d n u o r g . m e t s y s y l p p u s r e w o p a n i

94 E T A G U

. t u p t u O r e v i r De t a GT E F S O M r e p p U re p p u f o e t a g e h t o t n i p s i h t t c e n n o C yr t i u c r i c n o i t c e t o r p h g u o r h t - t o o h s e v i t p a d a e h t y b d e r o t i no m s i n i p s i h T . T E F S O M . f f o d e n r u t s a h T E F S O M r e p p u e h t n e h w e n i m r e t e d o t

015 T O O B

. r e v i r D e t a GT E F S O M r e p p U g n i t a o l F e h t r o f y l p p u S p a r t s t o o Be h t t c e n n o C C r o t i c a p a c p a r t s t o o bT O O B am r o f o t n i pE S A H Pe h t d n a n i p T O O B n e e w t e b re p p u e h t n o n r u t o t e g r a h c e h t s e d i v o r p r o t i c a p a c p a r t s t o o b eh T . t i u c r i c p a r t s t o o b C t a h t e r u s n E . T E F S O MT O O B . C I e h t r a e n d e c a l p s i --1 1C N . d e t c e n n o C y l l a n r e t n I t o N d a P d e s o p x E. d n u o r G l le w e b d l u o h s d n a h t a p n o i t c u d n o c t a e h s e t a n i m o d d a p d e s o p x e eh T . e c n a m r o f r e p l a m r e h t l a m i t p o r o f B C P o t d e r e d l o s

3uP1537-DS-F0000, Feb. 2018 www.upi-semi.com Typical Application Circuit Functional Block Diagram x(-1/8) Auto-skip / FCCM Frequency Setting Detector 10µA On-Time Calculator Ramp 0.7V EN / SS Control 0.7V x 125% 0.7V x 55% Control Logic TON One-shot XCON 0.7V x 90% Delay POK VCC5 Fault EN UV OV EA PWM VFB CS OCP ZC RF BOOT UGAT E PHAS E LGATE GND LGATE POK UGATE PHASE VIN VCC5 RF BOOT CS EN VFB VOU T POK EN

input and output voltages into its on-time one-shot timer. Table 1. Leaving the RF pin open sets the switching resistances on the table in any application designs. Table 1. Resistor and Switching Frequency continuous conduction mode (CCM) in light load condition.

5uP1537-DS-F0000, Feb. 2018 www.upi-semi.com Functional Description POK The uP1537 has POK output that indicates high when switcher output is within the target. The POK function is activated after soft-start has finished. If the output voltage becomes within 90% of the target value, internal comparators detect POK state and the POK signal becomes high after a 1ms internal delay. If the output voltage goes outside of 55% of the target value, the POK signal becomes low. The POK output is an open-drain output and should be pulled up externally if used. Output Discharge Control When EN is low, the uP1537 discharges the output capacitor using internal MOSFET connected between PHASE and GND while high side and low side MOSFETs are kept off. The current capability of this MOSFET is limited to discharge slowly. Over Current Limit The uP1537 monitors the inductor valley current by low side MOSFET RDS(ON) when it turns on. The over current limit is triggered once the sensing current level is higher than VOCSET . When triggered, the over current limit will keep high side MOSFET off even the voltage loop commands it to turn on. The output voltage will decrease if the load continuously demands more current than current limit level. The current limit level is set at ILIM/2 if the output voltage is lower than 90% of its target level, letting VOUT decrease faster until UVP occurs and shuts down the uP1537. The current limit threshold is set by connecting a resistor from CS to GND. The CS pin will sink a 10µA current source and create a voltage drop across RCS as the VOCSET . VOCSET = 10µA x RCS . When the voltage drop across the low side MOSFET equals the voltage across the setting resistor, the current limit will be activated. The voltage across PHASE and GND pins is compared with VOCSET for current limit. The current limit level is calculated as: I VI RIPPLE )ON(DS OCSET LIM +×= where IRIPPLE is the peak-to-peak inductor ripple current at steady state. Over Voltage/Under Voltage Protection The uP1537 monitors feedback voltage to detect overvoltage and undervoltage. When the feedback voltage becomes higher than 125% of the target voltage, the OVP is triggered, high side MOSFET is off and low side MOSFET is on. When the feedback voltage is lower than 55% of the target voltage, the UVP is triggered, then high side MOSFET and low side MOSFET are latched. This function is enabled after 1ms following EN has becomes high. VCC5 UVLO The uP1537 has VCC5 under voltage lockout protection (UVLO) that inhibits switching and resets the protection faults. When the VCC5 voltage is lower than UVLO threshold voltage, all functions are turned off. This is the non-latch protection. Over Temperature Protection The uP1537 monitors the temperature of itself. If the temperature exceeds typical 150O C, the uP1537 will be turned off. This is the non-latch protection. It will be recovered once temperature is lower than 130O C.

6 uP1537-DS-F0000, Feb. 2018 www.upi-semi.com Package Thermal Resistance (Note 3) Power Dissipation, PD @ TA = 25°C (Note 4) Absolute Maximum Rating Thermal Information Recommended Operation Conditions (Note 1) BOOT to GND BOOT to PHASE PHASE to GND UGATE to GND UGATE to PHASE LGATE to GND Storage Temperature Range ESD Rating (Note 2) Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 4. The device is not guaranteed to function outside its operating conditions.

7uP1537-DS-F0000, Feb. 2018 www.upi-semi.com r e t e m a r aPl o b m ySs n o i t i d n o C t s eTn iMp yTx a M ti n U t n e r r u C y l p p u S t n e r r u C y l p p u S 5 C CVI 5 C C VV N E d a o L o N , V 5=- -0 230 0 5 µA t n e r r u C n w o d t u h S 5 C CVI D S _ 5 C C VV N E d a o L o N , V 0=- -- -1 µA e g a t l o V e c n e r e f e R l a n r e t n I e g a t l o V n o i t a l u g e RB FVV B F n o i t i d n o c M CC- -4 0 7 .0- -V e c n a r e l oT0 . 1-- -0 . 1+% t n e r r u C t u p n I B FVI B F V B F e d o mp i k s , V 5 3 7 . 0=- -1 0 .02 . 0 µA e g r a h c s i D t u p t u O m o r f t n e r r u C e g r a h c s i D t u p t u O n i PE S A H P I S I D V N E V , V 0 =E S A H PV 5 . 0=5 31- -A m s r e v i r D t u p t u O e c n a t s i s e RE T A GUR E T A G U I , e c r u o SE T A G U A m 0 5 1 -=- -2- - Ω I , k n i SE T A G U A m 0 5 1=- -1 - - e c n a t s i s e RE T A GLR E T A G L I , e c r u o SE T A G L A m 0 5 1 -=- -1 - - Ω I , k n i SE T A G L A m 0 5 1=- -7 .0- - e m i T d a eDT D n o - E T A G L o t f f o - E T A GU- -7 1- - s n n o - E T A G U o t f f o - E T A GL- -2 2- - h c t i w S p a r t s t o o B l a n r e t n I e c n a t s i s e R l a n r e t nIR F _ T S BIF A m 0 1=- -0 8- - Ω t n e r r u C e g a k a e L e s r e v eRI K L _ T S BV T O O B V 6 2=- -1 0 .05 . 1 µA l o r t n o C y c n e u q e r F d n a y t u D e m i T - f f Om u m i n iMT N I M _ F F O --0 04- - s n e m i T - n Om u m i n iMT N I M _ N OV N I V , V 6 2 =T U O R , V 7 . 0 =F R k 9 3 =Ω --0 8- - t r a t S t f o S e m i T S S l a n r e t nIT S S Vm o r FN E V o t h g i h =T U O % 0 9=- -1 - -s m r o t a r a p m o CK O P d l o h s e r h T K OPV K O P T V , r e w o l m o r f n i K O PB F o t t c e p s e r h t i w . d a o l o N , e c n e r e f e r780 93 9% t n e r r u C k n i SK OPI X A M _ K O PV K O P V 5 . 0=- -0 5- -A m e m i T y a l e DK OPT L E D _ K O P V f o% 0 9m o r f y a l e DB F h g i h o g K O P ot8 .01 2 .1s m

Electrical Characteristics

(VIN = 12V, VVCC5 = 5.0V, VOUT = 1.05V, TA = 25O C, unless otherwise specified)

8 uP1537-DS-F0000, Feb. 2018 www.upi-semi.com r e t e m a r aPl o b m ySs n o i t i d n o C t s eTn iMp yTx a M ti n U s n o i t i d n o Cg n i t t e S d n a d l o h s e r h T c i g o L d l o h s e r h T e g a t l o VNEV N E e l b a nE8 .1- -- - V e l b a s iD- -- -5 . 0 t n e r r u C t u p n I NEI N E V N E V 5=- -- -1 µA e m i T - nOT N O R F R k 0 7 4 =Ω F r o fW S z H k 0 9 2=- -2 03- - s n R F R k 0 0 2 =Ω F r o fW S z H k 0 4 3=- -7 52- - R F R k 0 0 1 =Ω F r o fW S z H k 0 8 3=- -0 32- - R F R k 9 3 =Ω F r o fW S z H k 0 3 4=- -3 02- - e g a t l o V g n i t t e SM CCV F R M CC8 .1- -- - V p i k S - o t uA- -- -5 . 0 e s n e S t n e r r u C : n o i t c e t o r P t n e r r u C e c r u o SSCI S C 90 11 1 µA t e s f f O r o t a r a p m o CP COV S F O _ C O 0 1-0 0 1V m t e s f f O r o t a r a p m o C g n i s s o r C o r eZV F O _ C Z 4-2 -0 V m P V Od n a P V U : n o i t c e t o r P d l o h s e r h T p i r T e g a t l o V r e v O e g a t l o V V P V O V f o e g a t n e c r e PF E R 0 215 210 31% e m i T y a l e D n o i t a g a p o r PP VOT L E D P V O --5- - µs d l o h s e r h T p i r T e g a t l o V r e d n U e g a t l o V V P V U V f o e g a t n e c r e PF E R 055 50 6% e m i T y a l e D e l b a n EP V U t u p t uOT N E P V U e l b a k r o wP V U o t e l b a n Em o rF1 --- -s m O L V U d l o h s e r h T R O P 5 C CVV 5 C C V O L V U g n i s iR8 .342 .4V s i s e r e t s yH- -3 .0- -V n w o d t u h S l a m r e h T d l o h s e r h T n w o d t u h S l a m r e hTT N D S e r u t a r e p m e t n w o d t u hS- -0 51- - O C s i s e r e t s yH- -0 2- - O C

9uP1537-DS-F0000, Feb. 2018 www.upi-semi.com POK (5V/Div) PHASE (10V/Div) EN (5V/Div) VOUT (500mV/Div) POK (5V/Div) PHASE (10V/Div) EN (5V/Div) VOUT (500mV/Div) POK (5V/Div) PHASE (10V/Div) EN (5V/Div) VOUT (500mV/Div) POK (5V/Div) PHASE (10V/Div) EN (5V/Div) VOUT (500mV/Div) POK (5V/Div) PHASE (10V/Div) EN (5V/Div) VOUT (500mV/Div) POK (5V/Div) PHASE (10V/Div) EN (5V/Div) VOUT (500mV/Div) Typical Operation Characteristics PSM, Power On from EN 400us/Div VIN = 12V, VOUT = 1.05V, no load CCM, Power On from EN 400us/Div VIN = 12V, VOUT = 1.05V, no load PSM, Power On from EN 400us/Div VIN = 12V, VOUT = 1.05V, Load = 0.05Ω CCM, Power On from EN 400us/Div VIN = 12V, VOUT = 1.05V, Load = 0.05Ω PSM, Power Off from EN 20us/Div VIN = 12V, VOUT = 1.05V, Load = 2Ω CCM, Power Off from EN 10us/Div VIN = 12V, VOUT = 1.05V, Load = 0.05Ω

10 uP1537-DS-F0000, Feb. 2018 www.upi-semi.com 1.030 1.035 1.040 1.045 1.050 1.055 1.060 1.065 1.070 01 0 2 0 3 0 IOUT = 0A IOUT = 20A POK (5V/Div) PHASE (10V/Div) IL (10A/Div) VOUT (500mV/Div) LGATE (5V/Div) IOUT (20A/Div) UGATE (10V/Div) VOUT (50mV/Div) LGATE (5V/Div) IOUT (20A/Div) UGATE (10V/Div) VOUT (50mV/Div) LGATE (5V/Div) IOUT (20A/Div) UGATE (10V/Div) VOUT (50mV/Div) LGATE (5V/Div) IOUT (20A/Div) UGATE (10V/Div) VOUT (50mV/Div) Typical Operation Characteristics CCM Undershoot: 0A to 20A 10us/Div VIN = 12V, VOUT = 1.05V, L = 1uH, COUT = 330uF CCM Overshoot: 20A to 0A 10us/Div VIN = 12V, VOUT = 1.05V, L = 1uH, COUT = 330uF PSM Undershoot: 0.1A to 20A 10us/Div VIN = 12V, VOUT = 1.05V, L = 1uH, COUT = 330uF PSM Overshoot: 20A to 0.1A 10us/Div VIN = 12V, VOUT = 1.05V, L = 1uH, COUT = 330uF Current Limit 20us/Div VIN = 12V, VOUT = 1.05V, RCS = 62kΩ, Lower MOSFET = QM3006M5*2 Line Regulation VIN (V) VCC = 5V VOUT (V)

11uP1537-DS-F0000, Feb. 2018 www.upi-semi.com 1.045 1.047 1.049 1.051 1.053 1.055 0 5 10 15 20 25 VIN = 8V VIN = 20V VIN = 12V 100 200 300 400 500 600 700 800 900 1000 -50 0 50 100 150 -50 0 50 100 150 -50 0 50 100 150 Typical Operation Characteristics ICS vs. Temperature Temperature (O C) VCC = 5V, RCS = 62K ICS (uA) Load Regulation IOUT (A) VCC = 5V VOUT (V) Shutdown Current vs. Temperature Temperature (O C) VCC = 5V, RCS = Open Shutdown Current (uA) Quiescent Current vs. Temperature Temperature (O C) VCC = 5V, RCS = Open Quiescent Current (uA)

12 uP1537-DS-F0000, Feb. 2018 www.upi-semi.com

Application Information

The inductor plays an important role in step-down converters because it stores the energy from the input power rail and then releases the energy to the load. From the viewpoint of efficiency, the dc resistance (DCR) of the inductor should be as small as possible to minimize the conduction loss. In addition, the inductor covers a significant proportion of the board space, so its size is also important. Low profile inductors can save board space especially when the height has a limitation. However, low DCR and low profile inductors usually cost ineffective. Additionally, larger inductance results in lower ripple current which translates into the lower power loss. However, the inductor current rising time increases with inductance value. This means the transient response will be slower. Therefore, the inductor design is a trade-off between performance, size and cost. In general, the switching frequency (on-time) and operating point (% ripple or LIR) determine the inductor value as shown in the following equation: )MAX(LOAD OUTINON ILIR )VV (tL × −×= where LIR is the ratio of the peak to peak ripple current to the average inductor current. Find a low loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choices because powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK ): )MAX(LOAD)MAX(LOADPEAK I2 LIRII ×+= The calculation above shall serve as a general reference. To further improve the transient response, the output inductance can be reduced even further. This needs to be considered along with the selection of the output capacitor. Output Capacitor Selection The capacitor value and ESR determine the amount of output voltage ripple and load transient response. Thus, the capacitor value must be greater than the largest value calculated from below equations: OUTOUT LOAD SOAR VC2 LIV ×× ×∆= )fC8 1ESR(ILIRV SWOUT where VSOAR are the allowable amount of undershoot voltage and overshoot voltage in the load transient, VP-P is the output ripple voltage. MOSFET Selection The majority of power loss in the step-down power converter is the loss in the power MOSFETs. For low voltage high current applications, the duty cycle of the upper MOSFET is small. Therefore, the switching loss of the upper MOSFET is of concern. Power MOSFETs with lower total gate charge are preferred in such kind of application. However, the small duty cycle means the lower MOSFET is on for most of the switching cycle. Therefore, the conduction loss tends to dominate the total power loss of the converter. To improve the overall efficiency, MOSFETs with low RDS(ON) are preferred in the circuit design. In some cases, more than one MOSFET are connected in parallel to further decrease the on-state resistance. However, this depends on the MOSFET driver capability and the budget. Layout Considerations Layout is very important in high frequency switching converter designs, the PCB could radiate excessive noise and contribute to the converter instability with improper layout. Certain points must be considered before starting a layout. 1 Place the filter capacitor close to the IC.

2 Keep current limit setting network as close as possible

to the IC. Routing of the network should avoid coupling to high voltage switching node.

3 Connections from the drivers to the respective gate of

the both MOSFETs should be as short as possible to reduce stray inductance.

4 All sensitive analog traces and components such as

VFB, GND, EN, POK, and RF should be placed away from high voltage switching nodes such as PHASE, LGATE, UGATE, or BOOT nodes to avoid coupling. Use internal layer(s) as ground plane(s) and shield the feedback trace from power traces and components.

5 Place the ground terminals of VIN capacitor(s), VOUT

capacitor(s), and source of lower MOSFETs as close as possible. The PCB trace defined as PHASE node, which connects to source of upper MOSFET, drain of lower MOSFET and high voltage side of the inductor, should be as short and wide as possible.

13uP1537-DS-F0000, Feb. 2018 www.upi-semi.com

Package Information

1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm. 6 10 Recommended Solder Pitch and Dimensions 0.18 - 0.300.50 BSC 2.90 - 3.10 2.90 - 3.10 1.40 - 1.80 0.00 - 0.050.20 REF 2.20 - 2.70 1.40 - 1.75 2.10 - 2.20 3.45 - 3.55 0.18 - 0.300.50 BSC 0.70 - 0.80

14 uP1537-DS-F0000, Feb. 2018 www.upi-semi.com WQFN2x2 - 12L 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.

2 BSC

Pin 1 mark Bottom View - Exposed Pad 0.85 -0.95 0.60 - 1.00 0.15 - 0.25

0.20 REF

Recommended Solder Pad Pitch and Dimensions 0.15 - 0.25 1.25 -1.35 2.45 -2.55

15uP1537-DS-F0000, Feb. 2018 www.upi-semi.com Important Notice uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. uPI products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment. However, no responsibility is assumed by uPI or its subsidiaries for its use or application of any product or circuit; nor for any infringements of patents or other rights of third parties which may result from its use or application, including but not limited to any consequential or incidental damages. No uPI components are designed, intended or authorized for use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No license is granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries. COPYRIGHT ( C ) 2011, UPI SEMICONDUCTOR CORP. uPI Semiconductor Corp. Headquarter 9F.,No.5, Taiyuan 1st St. Zhubei City, Hsinchu Taiwan, R.O.C. uPI Semiconductor Corp. Sales Branch Office 12F-5, No. 408, Ruiguang Rd. Neihu District, Taipei Taiwan, R.O.C.