UP0111

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Technical content

Features

Note: The figures are not to scale Note: uPI products are compatible with the current IPC/ JEDEC J-STD-020 requirement. They are halogen-free, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes. GND FB VOUT EN VIN 1 SOT23-5L (AMA5) GND VOUT VIN SOT89-3L (BKA3) VIN GNDNC FB VOUT NC EN VIN VIN GND PSOP-8L (QSU8) SOT23-3L (AMA3) GND VOUT VIN3 VOUT VIN GND SOT89-3L (AKA3) GND VOUT VIN GND SOT223-3L (AJA3) GND GND VOUT VIN SOT223-3L (BJA3) VIN NC GND EN FB VIN VIN VOUT VOUT GND DFN 3x3 (ADD8) ENVIN NC GND FB VIN VOUT VOUT GND PSOP-8L (PSU8) NC GND EN FB VIN VIN VOUT VOUT GND DFN 6x5 (ADC8)

2uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 .oNniPe maNniPn oitcnuFniP 1N IV .egatloVtupnI seilppustahtrotsisnartssaplanretniehtfoecruosehtotstcennocnipsihT ecalP.roticapaccimarecFu1muminimahtiwDNGotNIVssapyB.niptuptuoehtottnerruc .ecivedehtotelbissopsaesolcsayllacisyhproticapacgnilpuocedeht 2D NG .dnuorG 3N E .tupnIelbanE tnecseiuqehtgnicuder,fforotalugerehtsnrutV53.0wolebnipsihtgnilluP .segakcapnip-3rofelbaliavatonsinipsihT.eulavgnitarepostifonoitcarfaottnerruc 4B F .)noisreVelbatsujdA(niPkcabdeeF .reifilpmarorreehtfotupnignitrevni-nonehtsinipsihT gnidroccaegatlovtuptuoehtteS.egatlovecnereferV8.0otdetalugersiegatlovnipBFehT Vot TUO .noisrevtuptuodexifehtrofdetcennocyllanretnitonsinipsihT.)V(1R/)2R+1R(x8.0= 5T UOV .egatloVtuptuO ehtnehwstsixeecnatsiserwolllupA.ecivedehtfotuptuorewopsinipsihT egralotesnopsertneisnartetauqedaniatniamoT.nipNEehtwolgnillupybdelbasidsiecived tnerrucfostceffeehtecuderotderiuqersiroticapaccimarecFu1muminima,egnahcdaol .TUOVnostneisnart Functional Pin Description Typical Application Circuit VOUT EN VIN 1 uP0111AMA5-00 GND Enable Disable VIN VOUT = 1.2V FB 100K 100K 22pF 1uF/300mA 2.2uF/500mA VOUTVIN uP0111AMA3-12 GND VIN 1.2V 1uF/300mA 2.2uF/500mA 1uF/300mA 2.2uF/500mA 1uF/300mA 2.2uF/500mA

3uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 Functional Block Diagram Current Sense Power On Reset Band Gap Thermal Shutdown MOSFET Driver VIN VOUT GND EN Error Amp. VREF Fixed Adjustable FB Functional Description Definitions Some important terminologies for LDO are specified below. Dropout Voltage The input/output Voltage differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 2% below its nominal value, dropout voltage is affected by junction temperature, load current and minimum input supply requirements. Line Regulation The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that average chip temperature is not significantly affected. Load Regulation The change in output voltage for a change in load current at constant chip temperature. The measurement is made under conditions of low dissipation or by using pulse techniques such that average chip temperature is not significantly affected. Maximum Power Dissipation The maximum total device dissipation for which the regulator will operate within specifications. Quiescent Bias Current Current which is used to operate the regulator chip and is not delivered to the load. The quiescent current I Q is defined as the supply current used by the regulator itself that does not pass into the load. It typically includes all bias currents required by the LDO and any drive current for the pass transistor. The uP0111 is a compact fast transient response low dropout regulator specifically designed to continuously deliver up to 600mA output current for space-limited applications. Designed with a P-channel MOSFET series pass transistor, the uP0111 yields extremely low dropout voltage (e.g. 300mV at 600mA) and maintain very low ground current (70uA). The uP0111 does not require a bypass capacitor, hence achieving the smallest PCB area. The uP0111 is designed and optimized to work with low- value, low-cost ceramic capacitors. Only a 1uF ceramic output capacitor is required for stable operation for any load conditions. Other features include foldback overcurrent protection, quick soft start, and overtemperature protec tion. The uP0111 is available in fixed output voltages from 0.8V to 3.3V with 0.1V increments. As shown in the Functional Block Diagram, the uP0111 consists of a bandgap for reference voltage, error amplifier, P-channel MOSFET pass transistor and internal feedback

4uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 connected to the inverting input of error amplifier. The error amplifier compares this reference voltage with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output. The output voltage is fed back through an internal or external resistor voltage-divider connected to the VOUT pin. Additional blocks include a current limiter, thermal sensor, and shutdown logic. Supply Input Power On Reset The input voltage supplies current to the output voltage and supplies current for control circuit. The input voltage is monitored for power on reset (POR) to ensure the regulator is not enabled until the input voltage is high enough for normal operation. The POR threshold level is typical 2.1V at V IN rising. Enable/Shutdown The uP0111 features an active-high enable pin that allows the regulator to be disabled. Forcing the enable pin lower than 0.35V shuts down the regulator and reduces its quiescent current less than 1uA. The voltage reference, error amplifier, gate-driver circuit and pass transistor are disabled in the shutdown state. When the regulator is in shutdown mode, an internal 600 Ω resistor is connected between VOUT and GND. This is intended to discharge C OUT when the LDO regulator is disabled. The internal 600Ω has no adverse effect on device turn-on time. Forcing the enable pin higher than 1.2V enables the output voltage (once the input voltage is higher than its POR threshold level). If the enable function is not needed in a specific application, it may be tied to VIN to keep the regulator in an always on state. The enable pin uses CMOS technology and cannot be left floating, as this may cause an indeterminate state on the output. Current Limit and Short-Circuit Protection The uP0111 includes a current limiter that monitors and controls the gate voltage of pass transistor to limit the output current to 1500mA typically. A short circuit protector monitors the output voltage and asserts output short circuit if V OUT is lower than 40% of VNOM. The current limiting level is reduced to 800mA. The output voltage is rebuilt after short circuit is removed. Overtemperature Protection The overtemperature protection limits total power dissipation in the uP0111. When the junction temperature exceeds T J = 170 O C, the thermal sensor signal the shutdowns logic, turning off the pass transistor and allows the device to cool down. The thermal sensor turns on the pass transistor again after the device junction temperature drops by 40 OC, resulting in a pulsed output during continuous during continuous thermal-overload conditions. The over temperature protection is designed to protect the device in the event of a fault condition. For continual operation, do not exceed the recommended temperature of T J = 125 OC for maximum reliability. Functional Description

5uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 ESD Rating (Note 2) Package Thermal Resistance (Note 3) Power Dissipation, PD @ TA = 25°C Absolute Maximum Rating Thermal Information Recommended Operation Conditions

6uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101

Electrical Characteristics

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7uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 4. The device is not guaranteed to function outside its operating conditions. retemaraPl obmySs noitidnoCtseTn iMp yTx aMt inU noitcetorP dlohserhTtimiLtnerruCI MIL 9.02 .1- -A tnerruCtiucriCtrohS 6.0- -- -A nwodtuhSlamrehT erutarepmeT T DS I TUO V,Am0= NI V= NE V5.5= , --0 71- - OC nwodtuhSlamrehT siseretsyH T SYHDS I TUO V,Am0= NI V= NE V5.5=- -0 4- - OC

8uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 Typical Operation Characteristics This page is intentionally left blank and will be updated later.

9uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 The uP0111 is specially designed to provide low-noise, high PSRR output voltage without a bypassing capacitor on its reference voltage. However, input and output capacitor should be well considered for optimal performance. Input Capacitors The uP0111 requires well-decoupled supply input for optimal performance. A minimum 1uF capacitor is required from- input-to-ground to provide stability. Input capacitors greater than 1uF offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection ratio (PSRR). Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for C IN. However, l ow-ESR ceramic capacitors provide optimal performance at a minimum of space and are highly recommended due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices. Additional high frequency capacitors, such as small-valued NPO dielectric type capacitors, help filter out high-frequency noise and are good design practice in any RF-based circuit. Place the capacitors physically as close as possible to the device with wide and direct PCB traces. Output Capacitors and Stability For proper load voltage regulation and operational stability, a capacitor is required between VOUT and GND pins. The uP0111 is designed and optimized to work with low-value, low-cost ceramic capacitors in space saving and performance consideration. Typical output capacitor values for maximum output current conditions range from 1uF to 10uF. Larger capacitors are recommended for applications expecting low output noise and optimum power supply ripple rejection characteristics. Place the capacitors physically as close as possible to the device with wide and direct PCB traces. X7R/X5R dielectric-type ceramic capacitors are recommended because of their temperature performance. X7R type capacitors loss capacitance by 15% over their operating temperature rand and are the most stable type of ceramic capacitors. Z5U or Y5V dielectric capacitors loss their capacitance by 50% and 60% respectively over their operating temperature ranges. If Y5V or Z5U capacitors are used as output capacitors, the capacitance must be much higher than that of X7R capacitors to ensure the same minimum capacitance over the operating temperature range. ESR of output capacitors should be well considered to ensure stable operation of the device. High ESR capacitors may cause high frequency oscillation. Figure 1 shows the acceptable ESR range of output capacitor for stability. No Load Stability The uP0111 is designed to maintain output voltage regulation and stability under operational no load conditions. This is important characteristic for CMOS RAM keep-alive applications where the output current may drop to zero.

Application Information

10uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101

Package Information

0.37 - 0.50

2.90 BSC

2.80 BSC

1.90 BSC

0.00 - 0.15

3.60 REF

1.00 REF

0.60 MAX

1.60 BSC

2.60 REF

1.60 REF

Recommended Solder Pad Layout 0.90 - 1.30

1.45 MAX

0.08 - 0.22 0.30 - 0.60

1.90 REF

0.37 - 0.50 0.00 - 0.15 0.60 MAX 0.95 REF

0.95 BSC

Recommended Solder Pad Layout 0.90 - 1.30 0.08 - 0.22 0.30 - 0.60 SOT23-3L SOT23-5L

11uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 0.66 - 0.84

3.00 BSC

7.00 BSC

2.30 BSC

3.30 - 3.70

7.80 MAX

1.50 MAX

6.30 REF

4.80 MIN

Recommended Solder Pad Layout 0.23 - 0.35 0.75 MIN 0.00 - 0.10 1.50 - 1.701.80 MAX

6.50 BSC

3.3 MAX

1.00 MAX2.30 BSC

4.60 BSC

0.36 - 0.48 1.35 - 1.83 0.89 - 1.20

1.50 BSC

3.00 MAX

5.20 REF

Recommended Solder Pad Layout 0.35 - 0.44

1.60 MAX

4.40 - 4.602.00 MAX 1.00 MAX1.50 BSC 0.44 - 0.56 22.9 - 2.60 3.94 - 4.25

0.70 MIN

12uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 0.32 - 0.52 4.80 - 5.00 5.80 - 6.20

3.81 BSC

0.10 - 0.25 0.18 - 0.25 0.41 - 0.89

0.20 BSC

8.00 MIN

1.85 REF

0.76 REF 1.27 REF

1.27 BSC

3.80 - 4.00

6.15 REF

4.00 MIN

Recommended Solder Pad Layout

1.75 MAX

1.45 - 1.60

2.29 BSC

2.39 REF

1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm.

13uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 DFN3x3 - 8L 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm. Recommended Solder Pitch and Dimensions0.80 MAX 0.18 - 0.350.65 BSC 2.90 - 3.10 2.90 - 3.10 1.55 - 1.75 0.00 - 0.050.20 REF 2.10 - 2.20 1.60 - 1.70 2.00 - 2.10 3.55- 3.65 0.18 - 0.350.65 BSC

14uPI Semiconductor Corp., http://www.upi-semi.com Rev. C01, File Name: uP0111-DS-C0101 DFN6x5 - 8L 1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm. Recommended Solder Pitch and Dimensions

1.00 MAX

0.35 - 0.481.27 BSC 5.90 - 6.10 4.90 - 5.10 3.35 - 3.45 0.55 - 0.65 4.25 - 4.35 0.00 - 0.050.20 REF 3.80 - 4.80 2.90 - 3.90 4.10 - 5.10 6.10 - 7.10 0.35 - 0.481.27 BSC