UG3105

UG3105 UPI | Alldatasheet

Document overview

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Technical content

Features

o oo oo e-Readers, ePAD, Netbook, Notebook o oo oo Digital Cameras o oo oo Smart Phone uG3105 monitors the battery parameters including voltage, current, intern al te mperature a nd provide s coulomb counter feature for mobile device s to be a ble to obtain battery remain capacity information in order to well control the usage of the battery. uG3105 also supports extern al te mperature a nd gpio control. uG3105 embeds a 16-bit ADC. With typical 20 milliohms external re sistor sen sor, UG3105 ca n provide current measurement up to 12.5A a nd supports the ca pacity accumulation up to +/-7000mAh with a re solution of 0.4mAh. The external resistor sensor range can be from 5 milliohms to 20 milliohms de pending on require ment. Related parameters can be easily defined by firmware change. System ca n re ad a nd write uG3105 through the I 2C interface. uG3105 provide s I2C normal, fa st speed a nd high speed modes.

Ordering Information

EXT_TEMP

9 GND

13 VIN2/RID

Note: (1) Please check the sample/production availability with uPI representatives. (2) uPI products are compatible with the current IPC/ JEDEC J-STD-020 requirement. They are halogen-free, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes.

2 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Typical Application Circuit m h o m h o m 1 R 0 1 1 C F u 1 . 0 e s n e S - R 0 2 2 R K 2 . 2 2 C F u 1 . 0 D I R K 0 2 4 ~ k 7 1 3 R K 2 . 2

4 R K 0 0 1

5 R K 0 1

7 R K 0 0 1

Battery Side Battery Monitor Application Circuit: 1. 1-cell Gas Gauge Application Circuit System R-Sense CPU Pack+ Battery Pack- I2C Pullup Voltage CGGND EXT_TEMP GPIO1 SCL VIN3 VIN2/RID VBAT1 SDA VPROG VREF250 VCC VCC BAT1+ Pack+ Pack- GPIO3 VCC R11 GPIO2 VCC R10 R5 250mV NTC RID 250mV

3uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Typical Application Circuit m h o m h o m 1 R 0 1 1 C F u 1 . 0 e s n e S - R 0 2 2 R K 2 . 2 2 C F u 1 . 0 3 R K 2 . 2 System Side Battery Monitor Application Circuit: 1. 1-cell Gas Gauge Application Circuit System R-Sense CPU Pack+ Battery Pack- I2C Pullup Voltage CGGND EXT_TEMP SCL VIN3 VBAT1 SDA VPROG VREF250 VCC VCC Vref250 NTC +BAT1+ Pack+ Pack- VCC R11 VCC R10 VIN2/RID GPIO1 GPIO3 GPIO2

4 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Functional Block Diagram . o N e m a N O / I n o i t c n u F n i P 1 P M E T _ T X E A _ I . t u p n I e r u t a r e p m e T l a n r e t x E 2 0 5 2 F E R V A _ O . t u p t u OV m 0 5 2 p a g d n a B 3 1 O I P G D O / O I 1 O I e s o p r u P l a r e n e G . t u p t u O 4 3 O I P G D O / O I I e s o p r u P l a r e n e G . t u p t u O3 O 5 G O R P V A _ I . t u p n I e g a t l o Vm a r g o r PP T O 6 A D S D O / I I2 . t u p t u O / t u p n I a t a D l a i r e SC 7 L C S D _ I I2 . t u p n I k c o l C l a i r e SC 8 2 O I P G D O / O I O I e s o p r u P l a r e n e G . t u p t u O2 9 D N G d n u o r G . d n u o r G r e w o P 0 1 G C A _ I . t u p n I e s n e S t n e r r u C 1 1 C C V r e w o P . y l p p u S r e w o P 2 1 1 T A B V A _ I . t u p n I e s n e S e g a t l o V 1 l l e C y r e t t a B 3 1 D I R / 2 N I V A _ I . t u p n I D I R / 2 t u p n I e s n e S e g a t l o V 4 1 3 N I V A _ I . 3 t u p n I e s n e S e g a t l o V Functional Pin Description Note: IO: I:Input O: Output A: Analog OD: Open-Drain D: Digital Register OscillatorRegulator POR/LVD OTP Internal Temp BandGap I2C VPROG SDA SCL 14bit ADC VBAT1 VCC CG GND 16bit ADC VREF250 EXT_ TEMP VIN3 GPIO1 VIN2/RID GPIO3 GPIO2

5uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 I2C Interface

Description

The I2C interface is used to read and write registers in uG3105. It is compatible with Phillips I2C protocol v2.1. uG3105 supports I2C high-speed, fast-speed and normal speed mode protocols to meet variable possible host requirements and to shorten I 2C bus transition time. A filter should be used to prevent potenti al noise on the I 2C bus in order to guarantee I2C data integrity. I2C Device Address Programming and Register Format The default device address value is 1110_000X (ADDR3 = ADDR2 = ADDR1 = 0). And the addresses from 1110_000X to 1110_111X, which bits DevAddr2, DevAddr1 and DevAddr0 are factory-programmable. The X indicates that the next action is data read (X = 1) from slave or data write (X = 0) to slave till transaction stop. Device Address Format

7 T I B 6 T I B 5 T I B 4 T I B 3 T I B 2 T I B 1 T I B 0 T I B

1 1 1 0 2 r d d A v e D 1 r d d A v e D 0 r d d A v e D W / R s s e r d d A X 1 1 1 _ 0 1 1 1 ~ X 0 0 0 _ 0 1 1 1 ) d a e R / e t i r W ( ) h F E / h E E ( ~ ) h 1 E / h 0 E ( Register Address Format: 7 r d d A 6 r d d A 5 r d d A 4 r d d A 3 r d d A 2 r d d A 1 r d d A 0 r d d A Register Data Format: 7 a t a D 6 a t a D 5 a t a D 4 a t a D 3 a t a D 2 a t a D 1 a t a D 0 a t a D I2C Read/Write Operation I2C Read Operation:

1 Byte Read

s s e r d d AA t r a t s e R e c i v e D s s e r d d AR A r e t s i g e R a t a DA N p o t S s t i b 7 s t i b 8 s t i b 7 s t i b 8 Incremental Read t r a t S e c i v e D s s e r d d A W A r e t s i g e R s s e r d d A A t r a t s e R e c i v e D s s e r d d A R A r e t s i g e R a t a D A r e t s i g e R a t a D A r e t s i g e R a t a D A r e t s i g e R a t a D A N p o t S s t i b 7 s t i b 8 s t i b 7 s t i b 8 s t i b 8 1 + r d d A - R s t i b 8 I2C Write Operation:

1 Byte Write

s t i b 7 s t i b 8 s t i b 8 Functional Description

6 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Coulomb Counter Measurement The coulomb counter fe ature is used to calculate the charge or discharge battery re maining ca pacity. The current ADC will monitor a nd convert the voltage drop across the external R-sense resistor. At every end of ADC conversion, the converted current value is added into the 28-bit accumulator. If the battery is charged by charger , the coulomb counter count is incre ased. If the battery is discharged, the coulomb counter is de creased. The coulomb counter is a 28-bit accumulator and the maximum capacity to be accumulated is +/-7000mAh when the R- sense resistor is 20 milliohm. The converted value of coulomb counter is in 2’s complement format. The recent converted value ca n be read in: Register Address{7, 6} = {REG_AVE_CURRENT_HIGH, REG_AVE_CURRENT_LOW}. System ca n re ad the coulomb counter value vi a I 2C interface. The accumulated coulomb counter for mAh unit is the upper 16bits or the a ccumulator. The coulomb counter value can be read in: Register Addre ss {3, 2} = {REG_CHAR GE_HIGH, REG_CHARGE_LOW} System should re ad and clear the coulomb counter not longer than 400 seconds to prevent accumulated coulomb overflow. Cell 1 Voltage Measurement The battery voltage can be measured via VBAT1 pin with a 14 bit ADC. System can read the voltage value via I2C interface. The voltage value ca n be re ad in: Register Addre ss {0x09, 0x08} = {REG_A VE_VBA T1_HIGH, REG_AVE_VBAT1_LOW} Voltage 2 Measurement The voltage 2 can be measured via VIN2 pin with a 14 bit ADC. Functional Description System can read the voltage value via I2C interface. The voltage value can be read in: Register Address {0x47, 0x46} = {REG_VIN2_AVE_HIGH, REG_VIN2_AVE_LOW} Voltage 3 Measurement The voltage 3 can be measured via VIN3 pin with a 14 bit ADC. System can read the voltage value via I2C interface. The voltage value can be read in: Register Address {0x49, 0x48} = {REG_VIN3_AVE_HIGH, REG_VIN3_AVE_LOW} Internal Temperature Measurement uG3105 embeds internal temperature sensor inside the IC. The internal temperature value can be used for system reference. The internal temperature can be measured by a 16 bit ADC. The 16 bit ADC has a MUX to switch the current input, internal temperature, external temperature and external RID input. System can read the intern al temperature value vi a I2C interface. The internal temperature value can be read in: Register Address{0x0B, 0x0A} = {REG_A VE_IT_HIGH, REG_AVE_IT_LOW} External Temperature Me asurement - Extern al NTC Measurement support uG3105 is capable of measuring external NTC sensor for application exten sion. NTC sensor can be atta ched on battery cell in order to get more precise capacity estimation result. The external NTC sensor can be measured by the 16 bit ADC. The 16 bit ADC has a MUX to switch the current input, internal temperature, external temperature and external RID input. System can read the external temperature value via I2C interface. The external temperature value can be read in: Register Address {0x0F, 0x0E} = {REG_AVE_ET_HIGH, REG_AVE_ET_LOW} Incremental Write t r a t S e c i v e D s s e r d d A W A r e t s i g e R s s e r d d A A r e t s i g e R a t a D A r e t s i g e R a t a D A r e t s i g e R a t a D A r e t s i g e R a t a D A p o t S s t i b 7 s t i b 8 s t i b 8 s t i b 8 1 + r d d A - R s t i b 8 Start bit: SDA falling when SCL=1 Stop bit: SDA rising when SCL=1 Restart bit: Same as start bit R-Addr: Register Address A bit: Acknowledge bit NA: No Acknowledge W: Write bit R: Read bit

7uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Functional Description General Purpose IO - 1/2/3 A general-purpose I/O line is availa ble. The output is an open drain, and an external pull-up resistor may be needed in the a pplication. Writing the IO1DA TA/IO2DA TA/ IO3DATA bit to 0 forces the GPIO output low; writing the IO1DATA/IO2DATA/IO3DATA bit to 1 le aves the GPIO output in a high impedance state. Reading the IO1DATA/ IO2DATA/IO3DATA bit gives the state of the GPIO pin. In standby (GG_RUN=0), re set (PORDET set to 1) a nd power-down (Vcc<UVLOth) state s, the GPIO output is open and the input is read as zero whatever is the actual state of the GPIO pin.

8 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Power Mode Functional Description Hard Reset Power Down Active Soft Reset StandBy Vcc > 2.0V Write GG_RUN=0 Vcc < 2.0V Vcc > UVLOth Vcc < UVLOth Current < UC Wake-up = 1 Write PORDET=1 Write PORDET=0 Write GG_RUN=1 Write PORDET=1 Write PORDET=0 Read PORDET=0 Read PORDET=1 Read PORDET=0 Auto Sleep

9uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Functional Description . g e R . r d d A - E H ( ) X e m a N r e t s i g e R s s e c c A a t a D 7 t i B 6 t i B 5 t i B 4 t i B 3 t i B 2 t i B 1 t i B 0 t i B 0 0 x 0 E D O M _ G E R W / R d e v r e s e R N U R _ G G d e v r e s e R 1 0 x 0 1 L R T C _ G E R W / R d e v r e s e R W / R _ T E D R O P ) R ( C O E _ M T V ) R ( C O E _ G G T S R _ G G A T A D 1 O I W / R _ 2 0 x 0 G E R W O L _ E G R A H C _R ] 0 : 7 [ W O L _ E G R A H C _ G E R 3 0 x 0 G E R H G I H _ E G R A H C _R ] 0 : 7 [ H G I H _ E G R A H C _ G E R 4 0 x 0 G E R W O L _ R E T N U O C _R ] 0 : 7 [ W O L _ R E T N U O C _ G E R 5 0 x 0 G E R H G I H _ R E T N U O C _R ] 0 : 7 [ H G I H _ R E T N U O C _ G E R 6 0 x 0 E V A _ G E R W O L _ T N E R R U C _R ] 0 : 7 [ W O L _ T N E R R U C _ E V A _ G E R 7 0 x 0 E V A _ G E R H G I H _ T N E R R U C _R ] 0 : 7 [ H G I H _ T N E R R U C _ E V A _ G E R 8 0 x 0 G E R W O L _ 1 T A B V _ E V A _R ] 0 : 7 [ W O L _ 1 T A B V _ E V A _ G E R 9 0 x 0 G E R H G I H _ 1 T A B V _ E V A _R ] 0 : 7 [ H G I H _ 1 T A B V _ E V A _ G E R A 0 x 0 W O L _ T I _ E V A _ G E R R ] 0 : 7 [ W O L _ T I _ E V A _ G E R B 0 x 0 H G I H _ T I _ E V A _ G E R R ] 0 : 7 [ H G I H _ T I _ E V A _ G E R C 0 x 0 S F O _ E V A _ G E R W O L _ T N E R R U C _R ] 0 : 7 [ W O L _ T N E R R U C _ T E S F F O _ E V A _ G E R D 0 x 0 S F O _ E V A _ G E R H G I H _ T N E R R U C _R ] 0 : 7 [ H G I H _ T N E R R U C _ T E S F F O _ E V A _ G E R E 0 x 0 G E R W O L _ T E _ E V A _R ] 0 : 7 [ W O L _ T E _ E V A _ G E R F 0 x 0 G E R H G I H _ T E _ E V A _R ] 0 : 7 [ H G I H _ T E _ E V A _ G E R 0 1 x 0 G E R W O L _ D I R _ E V A _R ] 0 : 7 [ W O L _ D I R _ E V A _ G E R 1 1 x 0 G E R H G I H _ D I R _ E V A _R ] 0 : 7 [ H G I H _ D I R _ E V A _ G E R 4 1 x 0 G E R S U T A T S _ R T N I _R d e v r e s e R S T S _ B T S S T S _ T E S T S _ T I S T S _ D I R S T S _ D V L S T S _ L A 6 1 x 0 2 L R T C _ G E R W / R d e v r e s e R _ A T A D 4 O I W / R A T A D 3 O I W / R _ A T A D 2 O I W / R _ Register Map

10 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Functional Description Register Map . g e R . r d d A ) X E H ( e m a N r e t s i g e R s s e c c A a t a D 7 t i B 6 t i B 5 t i B 4 t i B 3 t i B 2 t i B 1 t i B 0 t i B 0 4 x 0 W O L _ 2 N I V _ G E R R ] 0 : 7 [ W O L _ 2 N I V _ G E R 1 4 x 0 H G I H _ 2 N I V _ G E R R ] 0 : 7 [ H G I H _ 2 N I V _ G E R 2 4 x 0 W O L _ 3 N I V _ G E R R ] 0 : 7 [ W O L _ 3 N I V _ G E R 3 4 x 0 H G I H _ 3 N I V _ G E R R ] 0 : 7 [ H G I H _ 3 N I V _ G E R 4 4 x 0 W O L _ 1 T A B V _ G E R R ] 0 : 7 [ W O L _ 1 T A B V _ G E R 5 4 x 0 H G I H _ 1 T A B V _ G E R R ] 0 : 7 [ H G I H _ 1 T A B V _ G E R 6 4 x 0 W O L _ E V A _ 2 N I V _ G E R R ] 0 : 7 [ W O L _ E V A _ 2 N I V _ G E R 7 4 x 0 H G I H _ E V A _ 2 N I V _ G E R R ] 0 : 7 [ H G I H _ E V A _ 2 N I V _ G E R 8 4 x 0 W O L _ E V A _ 3 N I V _ G E R R ] 0 : 7 [ W O L _ E V A _ 3 N I V _ G E R 9 4 x 0 H G I H _ E V A _ 3 N I V _ G E R R ] 0 : 7 [ H G I H _ E V A _ 3 N I V _ G E R A 4 x 0 W O L _ 1 V _ G E R R ] 0 : 7 [ W O L _ 1 V _ G E R B 4 x 0 H G I H _ 1 V _ G E R R ] 0 : 7 [ H G I H _ 1 V _ G E R C 4 x 0 W O L _ 2 V _ G E R R ] 0 : 7 [ W O L _ 2 V _ G E R D 4 x 0 H G I H _ 2 V _ G E R R ] 0 : 7 [ H G I H _ 2 V _ G E R E 4 x 0 W O L _ 3 V _ G E R R ] 0 : 7 [ W O L _ 3 V _ G E R F 4 x 0 H G I H _ 3 V _ G E R R ] 0 : 7 [ H G I H _ 3 V _ G E R 0 5 x 0 W O L _ R E P M E T _ R T N I _ G E R R ] 0 : 7 [ W O L _ R E P M E T _ R E T N I _ G E R 1 5 x 0 H G I H _ R E P M E T _ R T N I _ G E R R ] 0 : 7 [ H G I H _ R E P M E T _ R E T N I _ G E R 2 5 x 0 W O L _ R E P M E T _ R T X E _ G E R R ] 0 : 7 [ W O L _ R E P M E T _ R T X E _ G E R 3 5 x 0 H G I H _ R E P M E T _ R T X E _ G E R R ] 0 : 7 [ H G I H _ R E P M E T _ R T X E _ G E R 4 5 x 0 W O L _ D I R _ G E R R ] 7 [ W O L _ D I R _ G E R 5 5 x 0 H G I H _ D I R _ G E R R ] 7 [ H G I H _ D I R _ G E R 6 5 x 0 W O L _ T N E R R U C _ G E R W / R ] 7 [ W O L _ T N E R R U C _ G E R 7 5 x 0 H G I H _ T N E R R U C _ G E R R ] 7 [ H G I H _ T N E R R U C _ G E R 8 5 x 0 W O L _ T E S F F O _ 1 C D A _ G E R W / R ] 0 : 7 [ W O L _ T E S F F O _ 1 C D A _ G E R 9 5 x 0 H G I H _ T E S F F O _ 1 C D A _ G E R W / R ] 0 : 7 [ H G I H _ T E S F F O _ 1 C D A _ G E R

11uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Functional Description . r d d A . g e R e m a N . g e R n o i t i s o P l o b m y S t i B n o i t p i r c s e D 0 0 x 0 E D O M _ G E R ] 5 : 7 [ E D O M _ G E R d e v r e s e R ] 4 [ E D O M _ G E R N U R _ G G g n i t t e SN U R _ G G e d o M y b d n a t S : 0 d n a e g u a g s a g , n e z o r f e r a r e t n u o C& r o t a l u m c c A ( ) y b d n a t s n i e r a n o i t c n u f r o t i n o m y r e t t a b e d o Mn o i t a r e p o : 1 ] 0 : 3 [ E D O M _ G E R d e v r e s e R . r d d A . g e R e m a N . g e R n o i t i s o P l o b m y S t i B s s e c c A n o i t p i r c s e D 1 0 x 0 1 L R T C _ G E R ] 5 : 7 [ L R T C _ G E R d e v r e s e R ] 4 [ L R T C _ G E R R _ T E D R O P R : t i b n o i t c e t e d ) R O P ( t e s e r n o r e w o P , d e r r u c c o t n e v e R O P o n : 0 d e r r u c c o t n e v e R O P : 1 W _ T E D R O P W : t e s e r t f o S R O P e h t r a e l c d n a t e s e r - t f o s e h t e s a e l e r : 0 , t i b n o i t c e t e d n o i t c e t e d R O P e h t t e s d n a t e s e r - t f o s e h t t r e s s a : 1 . t i b ] 3 [ L R T C _ G E R ) R ( C O E _ M T V R e r u t a r e p m e t r o e g a t l o v y r e t t a b a f o d n e e h t t a t e S . g n i d a e r n o p u s r a e l C . e l c y c n o i s r e v n o c ] 2 [ L R T C _ G E R ) R ( C O E _ G G R . e l c y c n o i s r e v n o c t n e r r u c y r e t t a b a f o d n e e h t t a t e S . g n i d a e r n o p u s r a e l C ] 1 [ L R T C _ G E R T S R _ G G W t c e f f e o n : 0 n o i s r e v n o c d n a r o t a l u m u c c a e g r a h c e h t s t e s e r : 1 . t i b g n i r a e l c - f l e s a s i T S R _ G G . r e t n u o c ] 0 [ L R T C _ G E R R _ A T A D 1 O I R ) 0 = N E _ m r a l A ( s u t a t s a t a d 1 O I t r o P " L " s i t u p n i 1 O I : 0 " H " s i t u p n i 1 O I : 1 W _ A T A D 1 O I W e v i r d t u p t u o a t a d 1 O I t r o P " L " n e v i r d s i t u p t u o 1 O I : 0 ) r e t s i s e r y b p u l l u p e b l l i w ( n e p o s i t u p t u o 1 O I : 1

12 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Functional Description . g e R . r d d A x e H e m a N . g e R n o i t i s o P n o i t p i r c s e D 2 0 x 0 W O L _ E G R A H C _ G E R ] 0 : 7 [ E G R A H C _ G E R ] 0 : 5 1 [ r e t s i g e R e g r a h C 3 0 x 0 H G I H _ E G R A H C _ G E R ] 8 : 5 1 [ E G R A H C _ G E R 4 0 x 0 W O L _ R E T N U O C _ G E R ] 0 : 7 [ R E T N U O C _ G E R ] 0 : 5 1 [ r e t s i g e R r e t n u o C 5 0 x 0 H G I H _ R E T N U O C _ G E R ] 8 : 5 1 [ R E T N U O C _ G E R 6 0 x 0 W O L _ T N E R R U C _ E V A _ G E R ] 0 : 7 [ T N E R R U C _ E V A _ G E R ] 0 : 5 1 [ r e t s i g e R t n e r r u C e g a r e v A 7 0 x 0 H G I H _ T N E R R U C _ E V A _ G E R ] 8 : 5 1 [ T N E R R U C _ E V A _ G E R 8 0 x 0 W O L _ 1 T A B V _ E V A _ G E R ] 0 : 7 [ 1 T A B V _ E V A _ G E R ] 0 : 5 1 [ r e t s i g e R 1 T A B V e g a r e v A 9 0 x 0 H G I H _ 1 T A B V _ E V A _ G E R ] 8 : 5 1 [ 1 T A B V _ E V A _ G E R A 0 x 0 WO L _ R E P M E T _ R T N I _ E V A _ G E R] 0 : 7 [ R E P M E T _ R T N I _ E V A _ G E Re r u t a r e p m e T l a n r e t n I e g a r e v A ] 0 : 5 1 [ r e t s i g e RB 0 x 0 H G I H _ R E P M E T _ R T N I _ E V A _ G E R] 8 : 5 1 [ R E P M E T _ R T N I _ E V A _ G E R C 0 x 0 WO L _ T N E R R U C _ S F O _ E V A _ G E R] 0 : 7 [ T N E R R U C _ S F O _ E V A _ G E RT E S F F O t n e r r u C e g a r e v A ] 0 : 5 1 [ r e t s i g e RD 0 x 0 H G I H _ T N E R R U C _ S F O _ E V A _ G E R] 8 : 5 1 [ T N E R R U C _ S F O _ E V A _ G E R E 0 x 0 WO L _ R E P M E T _ R T X E _ E V A _ G E R] 0 : 7 [ R E P M E T _ R T X E _ E V A _ G E Re r u t a r e p m e T l a n r e t x E e g a r e v A ] 0 : 5 1 [ r e t s i g e RF 0 x 0 H G I H _ R E P M E T _ R T X E _ E V A _ G E R] 8 : 5 1 [ R E P M E T _ R T X E _ E V A _ G E R 0 1 x 0 W O L _ D I R _ E V A _ G E R ] 0 : 7 [ D I R _ E V A _ G E R ] 0 : 5 1 [ r e t s i g e RD I R e g a r e v A 1 1 x 0 H G I H _ D I R _ E V A _ G E R ] 8 : 5 1 [ D I R _ E V A _ G E R

13uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Functional Description . g e R . r d d A x e H e m a N . g e R n o i t i s o P l o b m y S t i B n o i t p i r c s e D 4 1 x 0 R T N I _ G E R S U T A T S _ ] 7 [ S U T A T S _ R T N I _ G E R d e v r e s e R d e v r e s e R ] 6 [ S U T A T S _ R T N I _ G E R d e v r e s e R d e v r e s e R ] 5 [ S U T A T S _ R T N I _ G E R S T S _ B T S r e t f a d e r a e l c o t u a e b l l i W ( s u t a t Sy b d n a t S f l e S ) C 2 I h g u o r h t d a e r e r a w m r i F e h t n a h t r e l l a m s e u l a v r e t s i g e r t n e r r u c t i b - 6 1 f i : 1 & r e t s i g e r H G I H / WO L _ R R U C _ R E D N U _ G E R e u l a v o r e Z n a h t r e g g i b e h t n a h t r e g g i b e u l a v r e t s i g e r t n e r r u c t i b - 6 1 f i : 0 e u l a v r e t s i g e r H G I H / WO L _ R R U C _ R E D N U _ G E R d n o c e s 0 2 / 5 1 / 0 1 / 5 l i t n u e u l a v o r e Z n e h t r e l l a m S& r e h t o e h t n i , ) r e t s i g e r B _ L R T C _ R T N I _ G E R y b t e s ( e d o m y b d n a t s - f l e s o t n i e c i v e d e h t , s d r o w ] 4 [ S U T A T S _ R T N I _ G E R S T S _ T E d e r a e l c o t u a e b l l i W ( s u t a t S e r u t a r e p m e T l a n r e t x E ) C 2 I h g u o r h t d a e r e r a w m r i F r e t f a d a e r e r a w m r i F r e t f a d e r a e l c o t u a e b l l i W : 0 C 2 I h g u o r h t n o i s r e v n o c e r u t a r e p m e T l a n r e t x E e h t h s i n i F : 1 ] 3 [ S U T A T S _ R T N I _ G E R S T S _ T I d e r a e l c o t u a e b l l i W (s u t a t S e r u t a r e p m e T l a n r e t n I ) C 2 I h g u o r h t d a e r e r a w m r i F r e t f a d a e r e r a w m r i F r e t f a d e r a e l c o t u a e b l l i W : 0 C 2 I h g u o r h t n o i s r e v n o c e r u t a r e p m e T l a n r e t n I e h t h s i n i F : 1 ] 2 [ S U T A T S _ R T N I _ G E R S T S _ D I R r e t f a d e r a e l c o t u a e b l l i W ( s u t a t SD I r o t s i s e R ) C 2 I h g u o r h t d a e r e r a w m r i F d a e r e r a w m r i F r e t f a d e r a e l c o t u a e b l l i W : 0 C 2 I h g u o r h t n o i s r e v n o c r o t s i s e R e h t h s i n i F : 1 ] 1 [ S U T A T S _ R T N I _ G E R S T S _ D V L d e r a e l c o t u a e b l l i W ( s u t a t S t c e t e D e g a t l o Vw o L ) C 2 I h g u o r h t d a e r e r a w m r i F r e t f a l e v e L e g a t l o Vw o L e h t e v o b A : 0 e g a t l o Vw o L ( l e v e L e g a t l o Vw o L e h t r e d n U : 1 ) ! n e p p a h ] 0 [ S U T A T S _ R T N I _ G E R S T S _ L A r e t f a d e r a e l c o t u a e b l l i W ( s u t a t S d a o L o t u A ) C 2 I h g u o r h t d a e r e r a w m r i F d a o L o t u A e h t g n i r u D : 0 d e h s i n i f d a o L o t u A : 1

14 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Functional Description . g e R . r d d A x e H e m a N . g e R n o i t i s o P l o b m y S t i B n o i t p i r c s e D 6 1 x 0 2 L R T C _ G E R ] 1 [ 2 L R T C _ G E R R _ A T A D 3 O I R s u t a t s a t a d 3 O I t r o P " L " s i t u p n i 3 O I : 0 " H " s i t u p n i 3 O I : 1 W _ A T A D 3 O I W e v i r d t u p t u o a t a d 3 O I t r o P " L " n e v i r d s i t u p t u o 3 O I : 0 ) r e t s i s e r y b p u l l u p e b l l i w ( n e p o s i t u p t u o 3 O I : 1 ] 0 [ 2 L R T C _ G E R R _ A T A D 2 O I R s u t a t s a t a d 2 O I t r o P " L " s i t u p n i 2 O I : 0 " H " s i t u p n i 2 O I : 1 W _ A T A D 2 O I W e v i r d t u p t u o a t a d 2 O I t r o P " L " n e v i r d s i t u p t u o 2 O I : 0 ) r e t s i s e r y b p u l l u p e b l l i w ( n e p o s i t u p t u o 2 O I : 1

15uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Functional Description . g e R . r d d A x e H e m a N . g e R n o i t i s o P n o i t p i r c s e D 0 4 x 0 W O L _ 2 N I V _ G E R ] 0 : 7 [ 2 N I V _ G E R ] 0 : 5 1 [ r e t s i g e R 2 N I V 1 4 x 0 H G I H _ 2 N I V _ G E R ] 8 : 5 1 [ 2 N I V _ G E R 2 4 x 0 W O L _ 3 N I V _ G E R ] 0 : 7 [ 3 N I V _ G E R ] 0 : 5 1 [ r e t s i g e R 3 N I V 3 4 x 0 H G I H _ 3 N I V _ G E R ] 8 : 5 1 [ 3 N I V _ G E R 4 4 x 0 W O L _ 1 T A B V _ G E R ] 0 : 7 [ 1 T A B V _ G E R ] 0 : 5 1 [ r e t s i g e R 1 T A B V 5 4 x 0 H G I H _ 1 T A B V _ G E R ] 8 : 5 1 [ 1 T A B V _ G E R 6 4 x 0 W O L _ E V A _ 2 N I V _ G E R ] 0 : 7 [ E V A _ 2 N I V _ G E R ] 0 : 5 1 [ r e t s i g e R 2 N I V e g a r e v A 7 4 x 0 H G I H _ E V A _ 2 N I V _ G E R ] 8 : 5 1 [ E V A _ 2 N I V _ G E R 8 4 x 0 W O L _ E V A _ 3 N I V _ G E R ] 0 : 7 [ E V A _ 3 N I V _ G E R ] 0 : 5 1 [ r e t s i g e R 3 N I V e g a r e v A 9 4 x 0 H G I H _ E V A _ 3 N I V _ G E R ] 8 : 5 1 [ _ E V A _ 3 N I V _ G E R A 4 x 0 W O L _ 1 V _ G E R ] 0 : 7 [ 1 V _ G E R ] 0 : 5 1 [ r e t s i g e R 1 V B 4 x 0 H G I H _ 1 V _ G E R ] 8 : 5 1 [ 1 V _ G E R C 4 x 0 W O L _ 2 V _ G E R ] 0 : 7 [ 2 V _ G E R ] 0 : 5 1 [ r e t s i g e R 2 V D 4 x 0 H G I H _ 2 V _ G E R ] 8 : 5 1 [ 2 V _ G E R E 4 x 0 W O L _ 3 V _ G E R ] 0 : 7 [ 3 V _ G E R ] 0 : 5 1 [ r e t s i g e R 3 V F 4 x 0 H G I H _ 3 V _ G E R ] 8 : 5 1 [ 3 V _ G E R 0 5 x 0 W O L _ R E P M E T _ R T N I _ G E R] 0 : 7 [ R E P M E T _ R T N I _ G E R ] 0 : 5 1 [ R E P M E T _ R T N I _ G E R 1 5 x 0 H G I H _ R E P M E T _ R T N I _ G E R ] 8 : 5 1 [ R E P M E T _ R T N I _ G E R 2 5 x 0 W O L _ R E P M E T _ R T X E _ G E R] 0 : 7 [ R E P M E T _ R T X E _ G E R ] 0 : 5 1 [ R E P M E T _ R T X E _ G E R 3 5 x 0 H G I H _ R E P M E T _ R T X E _ G E R ] 8 : 5 1 [ R E P M E T _ R T X E _ G E R 4 5 x 0 W O L _ D I R _ G E R ] 0 : 7 [ D I R _ G E R ] 0 : 5 1 [ D I R _ G E R 5 5 x 0 H G I H _ D I R _ G E R ] 8 : 5 1 [ D I R _ G E R 6 5 x 0 W O L _ T N E R R U C _ G E R ] 0 : 7 [ T N E R R U C _ G E R ] 0 : 5 1 [ T N E R R U C _ G E R 7 5 x 0 H G I H _ T N E R R U C _ G E R ] 8 : 5 1 [ T N E R R U C _ G E R 8 5 x 0 W O L _ T E S F F O _ 1 C D A _ G E R] 0 : 7 [ T E S F F O _ 1 C D A _ G E R ] 0 : 5 1 [ T E S F F O _ 1 C D A _ G E R 9 5 x 0 H G I H _ T E S F F O _ 1 C D A _ G E R ] 8 : 5 1 [ T E S F F O _ 1 C D A _ G E R

16 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com (Note 1) Input Voltage Range ESD Rating (Note2) Board Level ESD Rating (Note5) Package Thermal Resistance (Note 3) Power Dissipation, PD @ TA = 25OC (Note 4) Absolute Maximum Rating Thermal Information Recommended Operation Conditions Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. θ JA is measured in the natural convection at TA = 25OC on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. The Board Level ESD Test According to the (IEC61000-4-2) (with pack+ by passed to the pack- a 1uF MLCC and recommend PCB Layout refers to Application Information on page 28).

17uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 r e t e m a r a P l o b m y S s n o i t i d n o C t s e T n i M p y T x a M s t i n U y l p p u S r e w o P n o i t p m u s n o C t n e r r u C g n i t a r e p OC C I s d n o c e s 4 r o f e g a r e v A - - 0 0 1 - - A u n o i t p m u s n o C t n e r r u C y b d n a t Sy b t s I V 0 = s t u p n i , e d o m y b d n a t S - - 0 3 - - A u n o i t p m u s n o C t n e r r u C n w o D r e w o Pn d p I V C C V 0 = t u p n i , h t O L V U <- - 0 1 - - A u d l o h s e r h T n o i t c e t e D e g a t l o Vw o L h t D V L VC C g n i s a e r c e d 6 . 2 7 . 2 8 . 2 V s i s e r e t s y H d l o h s e r h T n o i t c e t e D e g a t l o Vw o L s y h D V L - - 0 0 1 - - V m d l o h s e r h T t e s e R n o r e w o PR O P V C C g n i s a e r c n i 9 . 1 0 . 2 1 . 2 V s i s e r e t s y H d l o h s e r h T t e s e R n o r e w o Ps y h R O P - - 0 0 1 - - V m s r e t e m a r a PC D A r e t n u o Cb m o l u o C / t n e r r u C e g n a R t u p n I C D A c c _ n i V 0 5 2 - - - 0 5 2 V m B S L 1 r o f n o i t u l o s e R t n e r r u Cs e r _ C C s t i b 6 1 - - 1 . 8 - - V u y c a r u c c A t n e m e r u s a e M y t i c a p a Cc c a _ p a C e s a b e m i t l a n r e t n I - - - - 5 . 1 % s r e t e m a r a PC D A e g a t l o V e g n a R 3 t u p n I e s n e S e g a t l o V3 N I V 0 - - 5 2 . 0 V e g n a R 2 t u p n I e s n e S e g a t l o V2 N I V 0 - - 5 2 . 0 V e g n a R t u p n I e g a t l o V 1 l l e C y r e t t a B1 T A B V 0 - - 5 . 4 V B S L 1 r o f n o i t u l o s e R e g a t l o V B S L s t i b 4 1 - - 2 . 1 - - V m B S L 1 r o f n o i t u l o s e R e r u t a r e p m e T l a n r e t n Ie r u t a r e p m e T l a n r e t n I - - 5 . 0 - -OC y c a r u c c A t n e m e r u s a e Me g a t l o V y r e t t a B c c a _ t a B VV C C , 1 T A B V = V 5 . 4 < 1 T A B V < V 7 . 21 - - - 1 + % s r e t e m a r a P e r u t a r e p m e T y c a r u c c A t n e m e r u s a e Me r u t a r e p m e T l a n r e t n I c c a _ p m e T 3 - - - 3 + OC t n e m e r u s a e Me r u t a r e p m e T l a n r e t x E y c a r u c c A 2 - - - 2 + OC r e t e m a r a PC S O y c n e u q e r FC S O l a n r e t n I c s o F - - 8 6 7 2 3 - - z H y c a r u c c AC S O l a n r e t n I c c a _ C S O 5 2O V , CC C V 6 . 3 = - - - - 2 % V O r o T O - - - - 5 . 2 % n i PO I P Gd n a L C S , A D S h g i H c i g o L t u p n I h i V 2 . 1 - - - - Vw o L c i g o L t u p n I l i V - - - - 5 3 . 0 ) O I P G , A D S ( w o L c i g o L t u p t u Ol o V I L O A m 4 = - - - - 4 . 0

Electrical Characteristics

(2.7V < VCC < 4.5V, -20OC to +80OC)

18 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com r e t e m a r a P l o b m y S Cb . X A MF p 0 0 1 = C b F p 0 0 4 =) 2 ( s t i n U n i M x a M n i M x a M y c n e u q e r F k c o l CH L C S f H L C S 0 4 . 3 0 7 . 1 z h M n o i t i d n o C T R A T S ) d e t a e p e r ( e m i T p u - t e St A T S . U S 0 6 1 - - 0 6 1 - - s n n o i t i d n o C T R A T S ) d e t a e p e r ( e m i T d l o Ht A T S . D H 0 6 1 - - 0 6 1 - - s n k c o l CH L C S e h t f o d o i r e Pw o L t W O L 0 6 1 - - 0 2 3 - - s n k c o l CH L C S e h t f o d o i r e P h g i Ht H G I H 0 6 - - 0 2 1 - - s n e m i T p u - t e S a t a D t T A D . U S 0 1 - - 0 1 - - s n e m i T d l o H a t a D t T A D . D H 0 ) 3 ( 0 7 0 ) 3 ( 0 5 1 s n l a n g i SH L C S f o e m i T e s i R t L C r 0 1 0 4 0 2 0 8 s n d e t a e p e R a r e t f a l a n g i SH L C S f o e m i T e s i R t i B e g d e l w o n k c A n a r e t f a d n a n o i t i d n o C T R A T St 1 L C r 0 1 0 8 0 2 0 6 1 s n l a n g i SH L C S f o e m i T l l a F t L C f 0 1 0 4 0 2 0 8 s n l a n g i SH A D S f o e m i T e s i R t A D r 0 1 0 8 0 2 0 6 1 s n l a n g i SH A D S f o e m i T l l a F t A D f 0 1 0 8 0 2 0 6 1 s n n o i t i d n o C p o t S r o f e m i T p u - t e St O T S . U S 0 6 1 - - 0 6 1 - - s n s e n i L H L C S d n a H A D S r o f d a o L e v i t i c a p a CCb ) 2 ( - - 0 0 1 - - 0 0 4 F p d n a e n i L A D S + H A D S r o f d a o L e v i t i c a p a C e n i L L C S + H L C S Cb - - 0 0 4 - - 0 0 4 F p h c a E r o f l e v e LWO L e h t t a n i g r a Me s i o N ) s i s e r e t s y H g n i d u l c n I ( e c i v e D d e t c e n n o CV L n V 1 . 0D D - - V 1 . 0 D D - - V h c a E r o f l e v e L H G I H e h t t a n i g r a Me s i o N ) s i s e r e t s y H g n i d u l c n I ( e c i v e D d e t c e n n o CV H n V 2 . 0D D - - V 2 . 0 D D - - V (2.7V < VCC < 4.5V, -20OC to +80OC) Notes: 1. All values referred to Vihmin and Vilmax levels 2. For bus line loads Cb between 100 and 400 pF the timing parameters must be interpolated. 3. A device must internally provide a Data hold time to bridge the undefined part between Vih and Vil of the falling edge of the SCL signal. An input circuit with a threshold as low as possible for the falling edge of the SCL signal minimizes this hold time.

19uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 I2C Timing Diagram SDA trDASr tSU.STO (1) tSU.DAT tHD.DAT tHD.STAtSU.STA tHIGH tLOW tfDA Sr P = Rp resistor pull-up = MCS current source pull-up trCL1 tfCL tLOW tHIGH trCL trCL1(1) (1) First rising edge of the SCLH signal after Sr and after each acknowledge bit . SCL

20 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com Scan Count Capacity (mAh) Scan Count Capacity (mAh) Typical Operation Characteristics RSOC Error (%) RSOC Error (%) 500 1000 1500 2000 2500 3000 3500 4000 4500 1 2501 5001 7501 10001 12501 15001 17501 20001 22501 25001 -10 LMD NAC RSOC Error 500 1000 1500 2000 2500 3000 3500 4000 4500 1 2501 5001 7501 10001 12501 15001 17501 20001 22501 LMD RSOC Error NAC Scan Count (0.5C Full Charge and 0.5C Discharge) Dynamic Loading Scan Count (After 0.5C Full Charge, 0.6C 1msec and 0.1C 1msec Cycling Discharge) Battery Charge and Discharge in 3 Cycle

21uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 VBAT1 Input Current VCC Input Current 100 VBAT1 Input Current VCC Input Current Typical Operation Characteristics Active Mode Operation Current vs. VDD Input Voltage (V) Supply Current (uA) Standby Mode Operation Current vs. VDD Input Voltage (V) Supply Current (uA)

22 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com

Application Information

The Board Level ESD Test for IEC61000-4-2 The IEC61000-4-2 sta ndard for ESD protection is +/-15 kV for air and +/-8 kV for contact. Following schematic is the solution of ESD test for 1-Cell gas gauge. R-Sense CGGND EXT_TEMP GPIO1 SCL VIN3 VIN2 VBAT1 SDA VPROG VREF250 VCC VCC VREF250 0.1uF NTC 0.47uF +BAT1+ Pack+ Pack- GPIO3 VCC R11 GPIO2 VCC R10 0.1uF 100 0.1uF BAT1- 1uF Recommend schematic Power Supply Decoupling Capacitor Place a local de coupling capacitor 0.47uF a s closed as possible to the VCC pin. And place a via near the GND pin to a ground plane layer. To keep the loop area small, place this capacitor next to the IC and use the shortest possible traces. Ideally, the tra ces on e ach side of the ca pacitor should be the same length and run in the same direction to avoid differential noise and furthermore please a 1uF ceramic ca pacitor between Pa ck- a nd Pa ck+ f or ESD protection. Capacitors Power supply decoupling for the gas gauges requires a pair of 0.1uF ceramic capacitors for VBAT1 and CG pins, And 0.47uF ceramic capacitors for VCC pin . These should be placed reasonably close to the IC, without using long traces back to GND. The VREF250 voltage regulator requires a 0.1uF ceramic capacitor to be placed fairly close to the regulation output pin. Communication Line ESD Protection Protect I2C SCL, SDA, a nd other communication line s from ESD with a spark gap at the connector. The following pattern is recommended, with 0.2 mm spa cing between the spark gap. The spark gap pattern should be put on the outside layer. Following additional schematic will also help to prote ct ESD from outside connector. VDD SCL SDA SCL SDA GND TVU12040R1E0 100 100 100 100 Additional ESD protection for I2C. Not part of application circuit

23uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Ground System Please separate from the high-current PACK(-) path and low-current ground system. The use of an optional inner layer ground plane is re commended for the low-current ground system. The high-current P ACK(-) path is joined with the low- current path only at one point shown with the small connection line between the two planes. Kelvin Connections Through the sen se resistor the copper that carrie s the high current will cause the voltage drop across the path. Kelvin voltage sen sing is very i mporta nt in order to accurately measure charge and discharge current and cell voltage. It is important that the low-current ground systems only connect to the P ACK(-) path at the sen se resistor Kelvin pick-off point. R-Sense CGGND EXT_TEMP GPIO1 SCL VIN3 VIN2 VBAT1 SDA VPROG VREF250 VCC VCC VREF250 0.1uF NTC 0.47uF +BAT1+ Pack+ Pack- GPIO3 VCC R11 GPIO2 VCC R10 0.1uF Kelvin Connections Kelvin Connections 100 0.1uF BAT1- 1uF

24 uG3105-DS-F0001, Apr. 2015 www.upi-semi.com

Package Information

1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification. 2.Dimensions in Millimeters. 3.Drawing not to scale. 4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm. VDFN3x3-14L

25uG3105-DS-F0001, Apr. 2015 www.upi-semi.com uG3105 Important Notice uPI and its subsidi aries reserve the right to ma ke corrections, modifications, enhancements, improvements, and other changes to its products a nd services at a ny time and to discontinue a ny product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. uPI products are sold subje ct to the terms a nd conditions of sale supplied at the ti me of order a cknowledgment. However, no responsibility is assumed by uPI or its subsidiaries for its use or application of any product or circuit; nor for any infringements of patents or other rights of third parties which may result from its use or application, including but not limited to any consequential or incidental damages. No uPI components are designed, intended or authorized for use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No license is granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries. COPYRIGHT (C) 2011, UPI SEMICONDUCTOR CORP. uPI Semiconductor Corp. Headquarter 9F.,No.5, Taiyuan 1st St. Zhubei City, Hsinchu Taiwan, R.O.C. uPI Semiconductor Corp. Sales Branch Office 12F-5, No. 408, Ruiguang Rd. Neihu District, Taipei Taiwan, R.O.C.