U6809B ATMEL | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 16
Technical content
Features
Digital Self-supervising Watchdog with Hysteresis Three 250-mA Output Drivers One Relay Driver, Two Lamp Drivers Lamp Drivers with Auxiliary Ground Lamp Drivers Short-circuit Protected Lamp Drivers with Status Feedback Enable Output Over-/Undervoltage Detection and Reset All Power Outputs Protected Against Standard Transients All Power Outputs Protected Against 40-V Load Dump Automatically Activated Lamp Drivers if VS is Disconnected Automatically Activated Lamp Drivers Via AUX GND if Standard Ground is Disconnected
Description
The U6809B is designed to support the fail- safe function of safety-critical systems such as ABS. It includes a relay driver, two independent short-circuit-protected lamp drivers which are supplied by redundant ground lines, two monitoring circuits for the lamp driver output voltage and output current, a watchdog controlled by an external RC network and a reset circuit initiated by an over- and undervoltage condition of the 5-V supply providing a positive and a negative reset signal. Fail-safe IC with Relay Driver and Lamp Driver U6809B
2 U6809B
Figure 1. Block Diagram Figure 2. Pinning SO20
4764A–AUTO–10/03 Pin Description Pin Name Type Function Logic
1 RELI Digital input Activation of relay driver Driver on: L
Driver off: H
2 LA1I Digital input Activation of lamp driver 1 Driver off: L
Driver on: H
3 LA2I Digital input Activation of lamp driver 2 Driver off: L
Driver on: H
4 RELO Open-collector driver output Fail-safe relay driver Driver off:---
Driver on: L 5, 6 GND Supply Standard ground
7 FBLA1 Digital output Feedback lamp1 See Table 1 on page 5 and
8 NRES Digital output Negative reset signal Reset: L
No reset: H
9 PRES Digital output Positive reset signal Reset: H
No reset: L
10 FBLA2 Digital output Feedback lamp 2 See Table 1 on page 5 and
11 OSC Analog input External RC for watchdog timer
12 ENO Open-collector output Watchdog disable output Watchdog ok: ---
Watchdog n ok: L
13 AUX, GND Supply Auxiliary ground of lamp drivers
14 LA2O Open-collector driver output Warning lamp driver Driver off: ---
Driver on: L 15, 16, 17 GND Supply Standard ground
18 LA1O Open-collector driver output Warning lamp driver Driver off: ---
Driver on: L
19 VS Supply 5 V supply
20 WDI Digital input Watchdog trigger signal Pulse sequence
4 U6809B
Figure 3. Detailed Block Diagram
tions for different pins during which the IC still works as a fail-safe device. Table 1. Truth Table for Lamp Drivers and Lamp Feedback Table 2. Table of Fault Detection
6 U6809B
mined by external RC components. The following description refers to Figure 1 on page 2. Figure 4. Watchdog Block Diagram Table 3. Table of Fault Condition
4764A–AUTO–10/03 WDI Input (Pin 20) The microcontroller has to provide a trigger signal with the frequency fWDI which is fed to the WDI input. A positive edge of fWDI detected by a slope detector resets the binary and clocks the up/down counter additionally. The up/down counter only counts from 0 to 3 or reverse. Each correct trigger increments the up/down counter by 1, each wrong trigger decrements it by 1. As soon as the counter reaches the count of 3 the RS flip-flop is set (see Figure 5). A missing incoming trigger signal is detected after 250 clocks of the inter- nal watchdog frequency f RC (see WD-OK output) and resets the up/down counter directly. RCOSC Input With an external RC circuitry the IC generates a time base (frequency f RC) independent from the microcontroller. The watchdog's time window refers to a frequency of RC = 100 /g180/g32fWDI Reset Input During power-on and under-/overvoltage detection a reset signal is fed to this pin. It resets the watchdog timer and sets the initial state. WD - OK Output After the up/down counter has been incremented to the count of 3 (see Figure 5, WD state diagram), the RS flip-flop is set and the WD-OK output becomes logic "1". This information is available for the microcont roller at the open-collector output ENO. If, on the other hand, the up/down counter is decremented to 0 the RS flip flop is reset, the WD OK output and the ENO output are disabled. The WD OK output also controls a dual MUX stage which shifts the time window by one clock after a successful trigger, thus forming a hysteresis to provide stable conditions for the evaluation of the trigger signal "good or false". The WD OK signal is also reset in case the watchdog counter is not reset after 250 clocks (missing trigger signal). Watchdog State Diagram Figure 5. Watchdog State Diagram Explanation In each block, the first character represents the state of the counter. The second nota- tion indicates the fault status of the counter. A fault status is indicated by an "F" and a no fault status is indicated by an "NF". When the watchdog is powered up initially, the counter starts at the 0/F block (initial state). "Good" indicates that a pulse has been received whose width resides within the timing window. "Bad" indicates that a pulse has been received whose width is either too short or too long. 1/NF 2/NF O/F 1/F 2/F 3/NF bad good bad good bad good good bad good good bad bad Initial status
8 U6809B
be longer than specified in the datasheet. Figure 6. Watchdog Timing Diagram with Tolerances
4764A–AUTO–10/03 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Value Unit Supply voltage range V S -0.2 to +16 V AUX GND offset voltage to GND V AUX ±1.5 V AUX GND offset current to GND I AUX -600 mA Power dissipation VS = 5 V; Tamb = 125/g176C Ptot 700 mW Thermal resistance R thjc 25 K/W Junction temperature T j 150 /g176C Ambient temperature range T amb -40 to +125 /g176C Storage temperature range T stg -55 to +155 /g176C
Electrical Characteristics
VS = 5 V, Tamb = -40 to +125°C; reference pin is GND; fintern = 100 kHz + 50% - 45%, fWDC = 10 kHz ±10%; fWDI = 100 Hz Parameters Test Conditions Symbol Min. Typ. Max. Unit Supply Voltage Operation range general V S 4.5 5.5 V Operation range reset V S 1.5 16.0 V Supply Current Lamp driver on, relay off Tamb = -40/g176C Tamb = 125/g176C 40 mA mA Lamp driver off, relay on Tamb = -40/g176C Tamb = 125/g176C 25 mA mA Lamp driver off, relay off Tamb = -40/g176C Tamb = 125/g176C 15 mA mA Auxiliary Ground (AUX GND) AUX GND offset voltage operation range Tamb = -40/g176C Tamb = 90/g176C Tamb = 125/g176C -1.2 -0.65 -0.5 1.2 1.0 0.8 V V V AUX GND offset voltage to GND I AUX = -600 mA -1.7 3.0 V Digital Inputs (LA1I, LA2I, REL1 and WDI) Detection low -0.2 0.2 /g180 V S V Detection high 0.7 /g180 VS VS +
0.5 V V
Resistance to VS 10 40 k /g87 Input current low Input voltage = 0 V 100 550 µA Input current high Input voltage = V S -5 5 µA
10 U6809B
4764A–AUTO–10/03 Digital Outputs; Lamp Driver Feedbacks (FBLA1, FBLA2) Voltage low I /g163 1.6 mA 0 0.5 V Voltage high I /g163 10 A 10 A /g163 I /g163 1.6 mA 0.8 /g180 VS 0.7 /g180 VS + 0.1 VS V Threshold voltage detection 0.4 /g180 VS 0.5 /g180 VS V Threshold current detection 10 50 mA Digital Outputs (PRES and NRES) Voltage high I /g163 100 A 0.7 /g180 V S + 0.1 VS V Voltage low I /g163 1 mA 0 0.3 V Digital Output (ENO) with Open Collector Saturation voltage low I /g163 25 mA 0 0.3 V Clamping voltage 26 30 V Current limit low 25 mA Leakage current V ENO = 5 V VENO = 16 V VENO = 26 V 100 200 µA µA µA Lamp Drivers (LA1O and LA2O) with Integrated Pull-up Resistor Saturation voltage I /g163 125 mA; V S = 5 V I /g163 125 mA; VS = 0 V 0.5 1.5 V V Saturation voltage 250 mA requires enhanced heat sink I /g163 250 mA; VS = 5 V I /g163 250 mA; VS = 0 V I /g163 250 mA; no GND 1.0 2.0 3.0 V V V Maximum load current Tamb = 90/g176C Tamb = 125/g176C 250 180 mA mA Clamping voltage 26 30 V Leakage current VLA1O, LA2O = 16 V VLA1O, LA2O = 26 V mA mA Threshold current limitation 0.5 1.0 A Pull-up resistor 2 17 k /g87 Relay Driver (RELO) Saturation voltage I /g163 250 mA 0.5 V Maximum load current T amb = 90/g176C Tamb = 125/g176C 250 200 mA mA Clamping voltage 26 30 V Leakage current VBatt = 16 V VBatt = 26 V 200 µA µA Reset and VS Control Lower reset level V S 4.5 4.8 V Upper reset level V S 5.2 5.5 V Hysteresis 25 mV Reset debounce time 120 500 µs Electrical Characteristics (Continued) VS = 5 V, Tamb = -40 to +125°C; reference pin is GND; fintern = 100 kHz + 50% - 45%, fWDC = 10 kHz ±10%; fWDI = 100 Hz Parameters Test Conditions Symbol Min. Typ. Max. Unit
4764A–AUTO–10/03 Reset delay 20 80 ms Watchdog Timing Feedback reaction time (FBLA1, FBLA2) No fault, edge at LA1I, LA2I t FB 2.56 12.8 ms Minimum lamp input toggle time for a secure feedback reaction No fault, pulse at LA1I, LA2I t P, F B 10.24 ms Power-on-reset prolongation time t POR 34.3 103.1 ms Detection time for RC-oscillator fault V RC = constant t RCerror 81.9 246 ms Time interval for over-/undervoltage detection tD,OUV 0.16 0.64 ms Reaction time of NRES output on over-/undervoltage tR,OUV 0.187 0.72 ms Minimum toggle time for a secure broken ground detection tP, B G N D 13.3 µs Maximum reaction time for broken ground detection tR,BGND 100 µs Nominal frequency for WDI f RC = 100 /g180 fWDI fWDI 10 130 Hz Nominal frequency for RC f WDI = 1/100 /g180 fRC fRC 11 3 k H z Minimum pulse duration for a secure WDI input pulse detection tP, W D I 182 µs Frequency range for a correct WDI signal fWDI 64.7 112.5 Hz Number of incorrect WDI trigger counts for locking the outputs nlock 3 Number of correct WDI trigger counts for releasing the outputs nrelease 3 Detection time for a stuck WDI signal VWDI = constant t WDIerror 24.5 25.5 ms Watchdog Timing Relative to fRC Minimum pulse duration for a securely WDI input pulse detection 2c y c l e s Frequency range for a correct WDI signal 80 170 cycles Hysteresis range at the WDI ok margins 1 cycle Detection time for a stuck WDI signal VWDI = constant 250 251 cycles Electrical Characteristics (Continued) VS = 5 V, Tamb = -40 to +125°C; reference pin is GND; fintern = 100 kHz + 50% - 45%, fWDC = 10 kHz ±10%; fWDI = 100 Hz Parameters Test Conditions Symbol Min. Typ. Max. Unit
12 U6809B
Notes: 1. Lamp drivers: 1.2 /g87 lamps need to be added to the source resistance. Relay driver: relay coil with Rmin = 70 /g87 need to be added to the source resistance. reset during negative pulses. Figure 7. Watchdog in Too Fast Condition
14 U6809B
Figure 10. Undervoltage Condition
4764A–AUTO–10/03
Package Information
Ordering Information
Extended Type Number Package Remarks U6809B SO20 special lead frame – technical drawings according to DIN specifications Dimensions in mm 9.15 8.65 11.43 12.95 12.70 2.35 0.25 0.10 0.4 1.27 7.5 7.3 0.25 10.50 10.20 20 11 11 0
Printed on recycled paper. Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standar d warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibi lity for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time wi thout notice, and does not make any commitment to update the information contained her ein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel produc ts, expressly or by implication. Atmel’s products are not aut horized for use as critical components in life support devices or systems. Atmel Corporation Atmel Operations
2325 Orchard Parkway
San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza
77 Mody Road Tsimshatsui
Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Memory San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602
44306 Nantes Cedex 3, France
13106 Rousset Cedex, France
1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 RF/Automotive Theresienstrasse 2 Postfach 3535
74025 Heilbronn, Germany
1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123
38521 Saint-Egreve Cedex, France
www.atmel.com/literature 4764A–AUTO–10/03 © Atmel Corporation 2003 . All rights reserved. Atmel ® and combinations thereof are the registered tradem arks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others.