U6808B

U6808B ATMEL | Alldatasheet

Document overview

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Technical content

Features

• Digital Self-supervising Watchdog with Hysteresis  One 250-mA Output Driver for Relay  Enable Output Open Collector 8 mA  Over/Undervoltage Detection  ENABLE and RELAY Outputs Protected Against Standard Transients and 40 V Load Dump  ESD Protection According to MIL-STD-883 D Test Method 3015.7 – Human Body Model: ±2 kV (100 pF, 1.5 k/g87) – Machine Model: ±200 V (200 pF, 0 /g87)

Description

The U6808B is designed to support the fail-safe function of a safety critical system (e.g., ABS). It includes a relay driver, a watchdog controlled by an external R/C-net- work and a reset circuit initiated by an over and undervoltage condition of the 5-V supply providing a low-level reset signal. Figure 1. Block Diagram

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Figure 2. Pinning SO8 RESET outputs. The following table shows the fault conditions for the pins. Table 1. Table of Fault Conditions

2 GND Supply Standard ground No signal

3 ENABLE Digital output Negative reset signal Low: reset

4 WDC Analog input External RC for watchdog timer No signal

5 RESET Digital output Negative reset signal Low: reset

6 WDI Digital input Watchdog trigger signal Pulse sequence

7 RIN Digital input Activation of relay driver High: driver on

8 VS Supply 5-V supply –

Table 2. Truth Table for Over and Undervoltage Conditions Table 3. Truth Table for Watchdog Failures (Reset Output Do Not Care) Figure 3. Watchdog Block Diagram

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4707A–AUTO–05/03 WDI Input The microcontroller has to provide a trigger signal with the frequency fWDI which is fed to the WDI input. A positive edge of f WDI detected by a slope detector resets the binary counter and clocks the up/down counter additionally. The latter one counts only from 0 to 3 or reverse. Each correct trigger increments the up/down counter by 1, each wrong trigger decrements it by 1. As soon as the counter reaches status 3 the RS flip-flop is set (see Figure 4). A missing incoming trigger signal is detected after 250 clocks of the inter- nal watchdog frequency f RC (see section “WD-OK Output”) and resets the up/down counter directly. RCOSC Input With an external R/C circuitry the IC generates a time base (frequency f WDC) indepen- dent from the microcontroller. The watchdog's time window refers to a frequency of fWDC = 100 /g180/g32fWDI OSCERR Input A smart watchdog has to ensure that internal problems with its own time base are detected and do not lead to an undesired status of the complete system. If the RC oscil- lator stops oscillating a signal is fed to the OSCERR input after a timeout delay. It resets the up/down counter and disables the WD-OK output. Without this reset function the watchdog would freeze in its current status when f RC stops. RESET Input During power-on and under/overvoltage detection a reset signal is fed to this pin. It resets the watchdog timer and sets the initial state. WD-OK Output After the up/down counter is incremented to status 3 (see Figure 4) the RS flip-flop is set and the WD-OK output becomes logic 1. This information is available for the microcon- troller at the open-collector output ENABLE. If on the other hand the up/down counter is decremented to 0 the RS flip-flop is reset, the WD-OK output and the ENABLE output are disabled. The WD-OK output also controls a dual MUX stage which shifts the time window by one clock after a successful trigger, thus forming a hysteresis to provide sta- ble conditions for the evaluation of the trigger signal good or false. The WD-OK signal is also reset in case the watchdog counter is not reset after 250 clocks (missing trigger signal). Watchdog State Diagram Figure 4. Watchdog State Diagram 1/NF 2/NF O/F 1/F 2/F 3/NF bad good bad good bad good good bad good good bad bad Initial status

been received whose width is either too short or too long. Figure 5. Watchdog Timing Diagram with Tolerances Reset Delay The duration of the over or undervoltage pulses determines the enable and reset output. longer than specified in the data sheet.

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4707A–AUTO–05/03 Absolute Maximum Ratings Parameters Symbol Value Unit Supply-voltage range V S -0.2 to +16 V Power dissipation VS = 5 V, Tamb = -40/g176C VS = 5 V, Tamb = +125/g176C Ptot Ptot 250 150 mW mW Thermal resistance R thja 160 K/W Junction temperature T j 150 /g176C Ambient temperature range T amb -40 to +125 /g176C Storage temperature range T stg -55 to +155 /g176C

Electrical Characteristics

VS = 5 V, Tamb = -40 to +125°C, reference pin is GND, fintern = 100 kHz + 50% - 45%, fWDC = 10 kHz ±10%, fWDI = 100 Hz Parameters Test Conditions Symbol Min. Typ. Max. Unit Supply Voltage Operation range general V S 4.5 5.5 V Operation range reset V S 1.2 16.0 V Supply Current Relay off Tamb = - 40/g176C Tamb = +125/g176C 6 mA mA Relay on Tamb = - 40/g176C Tamb = +125/g176C 15 mA mA Digital Input WDI Detection low -0.2 0.2 /g180/g32V S V Detection high 0.7 /g180 VS VS + 0.5 V V Resistance to VS 10 40 k /g87 Input current low Input voltage = 0 V 100 550 µA Input current high Input voltage = V S -5 +5 µA Zener clamping voltage V ZWDI 20 24 V Digital Input RIN Detection low -0.2 0.2 /g180 V S V Detection high 0.7 /g180 VS VS + 0.5 V V Resistance to GND 10 40 k /g87 Input current low Input voltage = 0 V -5 +5 µA Input current high Input voltage = V S 100 550 µA Zener clamping voltage V ZRIN 20 24 V Digital Output RESET with Internal Pull-up Voltage high Pull-up = 6 k /g87 0.7 /g180 VS + 0.1 VS V Voltage low I /g163 1 mA 1.2 V < VS < 16 V 0 0.3 V Zener clamping voltage V ZRESET 26 30 V Reset debounce time Switch to low t deb 120 320 500 µs

4707A–AUTO–05/03 Reset delay time Switch back to high t del 50 ms Digital Output ENABLE with Open Collector Saturation voltage low I /g163 8 mA 0.01 0.5 V Zener clamping voltage V ZEN 26 30 V Current limitation I lim 8m A Leakage current VEN = 5 V VEN = 16 V VEN = 26 V IEN5 IEN16 IEN26 100 200 µA µA µA Reset debounce time Switch to low t deb 120 320 500 µs Reset delay time Switch back to high t del 85 ms Relay Driver Output RELAY Saturation voltage I /g163 250 mA I /g163 130 mA VRsat VRsat 0.5 0.3 V V Maximum load current Tamb = -40 to +90°C Tamb > 90°C IR IR 250 200 mA mA Zener clamping voltage V ZR 26 30 V Turn-off enegy 30 mJ Leakage current VR = 16 V VR = 26 V IR16 IR26 200 µA µA Reset and VS Control Lower reset level V S 4.5 4.7 V Upper reset level V S 5.35 5.6 V Hysteresis 25 100 mV Reset debounce time 120 320 500 µs Reset delay 20 50 80 ms RC Oscillator WDC Oscillator frequency ROSC = 39 k/g87, COSC = 3.3 nF fWDC 91 01 1 k H z Watchdog Timing Power-on-reset prolongation time tPOR 34 .3 103.1 ms Detection time for RC oscillator fault VRC = const. t RCerror 81.9 246 ms Time interval for over-/undervoltage detection tD,OUV 0.16 0.64 ms Reaction time of RESET output over/undervoltage tR,OUV 0.187 0.72 ms Nominal frequency for WDI f RC = 100 /g180/g32fWDI fWDI 10 130 Hz Nominal frequency for WDC f WDI = 1/100 /g180 fWDC fWDC 11 3 k H z Minimum pulse duration for a securely WDI input pulse detection tP, W D I 182 µs Frequency range for a correct WDI signal fWDI 64.7 112.5 Hz Electrical Characteristics (Continued) VS = 5 V, Tamb = -40 to +125°C, reference pin is GND, fintern = 100 kHz + 50% - 45%, fWDC = 10 kHz ±10%, fWDI = 100 Hz Parameters Test Conditions Symbol Min. Typ. Max. Unit

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4707A–AUTO–05/03 Protection against Transient Voltages According to ISO TR 7637-3 Level 4 (Except Pulse 5) Number of incorrect WDI trigger counts for locking the outputs nlock 3 Number of correct WDI trigger counts for releasing the outputs nrelease 3 Detection time for a stucked WDI signal VWDI = const. t WDIerror 24.5 25.5 ms Watchdog Timing Relative to fWDC Minimum pulse duration for a securely WDI input pulse detection 2C y c l e s Frequency range for a correct WDI signal 80 169 Cycles Hysteresis range at the WDI ok margins 1C y c l e Detection time for a dropped out WDI signal VWDI = const. 250 251 Cycles Pulse Voltage Source Resistance(1) Rise Time Duration Amount 1 -110 V 10 100 V/s 2 ms 15.000 2 +110 V 10 100 V/s 0.05 ms 15.000 3a -160 V 50 30 V/ns 0.1 s 1 h 3b +150 V 50 20 V/ns 0.1 s 1 h 5 40 V 2 10 V/ms 250 ms 20 Note: 1. Relay driver: relay coil with Rmin = 70 /g87 to be added Electrical Characteristics (Continued) VS = 5 V, Tamb = -40 to +125°C, reference pin is GND, fintern = 100 kHz + 50% - 45%, fWDC = 10 kHz ±10%, fWDI = 100 Hz Parameters Test Conditions Symbol Min. Typ. Max. Unit

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Figure 8. Overvoltage Condition Figure 9. Undervoltage Condition

4707A–AUTO–05/03 Figure 10. Application Circuit

Package Information

VS = 5 V 39 k/g87 Rosc /g109C 100 Hz 0.01 /g109F Cosc 3.3 nF VBatt Relay /g109C /g109C /g109C

Ordering Information

Extended Type Number Package Remarks U6808B SO8 – technical drawings according to DIN specifications Dimensions in mm 5.00 4.85 0.4 1.27 3.81 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2

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