U6084B-FP

U6084B TEMIC | Alldatasheet

Document overview

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Technical content

Features

/C0068Pulse width modulation up to 2 kHz clock frequency /C0068Protection against short circuit, load-dump overvoltage and reverse VS /C0068Duty cycle 0 to 100 % continuously /C0068Output stage for power MOSFET /C0068Interference and damage protection according to VDE 0839 and ISO/TR 7637/1. /C0068Charge pump noise suppressed /C0068Ground wire breakage protection

Ordering Information

Extended Type Number Package Remarks U6084B–FP SO16 Block Diagram Current monitoring + short circuit detection Output Charge pumpRC oscillator Duty cycle range 0–100% Duty cycle reduction Control input Short circuit latch monitoring V oltage monitoring Enable/ disable 9 1116 V S C 5 PWM Logic C 2 C 1 C 3 47 nF R sh R 3150/C0087 95 9751 C 6 V Batt 47 k/C0087 Ground Figure 1. Block diagram with external circuit

Rev. A1, 14-Feb-97 2 (8) Pin Description 95 9754 GND En / Dis V I Reduct Attenuation Osc NC NC V S NC Output 2 VS Sense Delay NC Latch Pin Symbol Function

1 GND IC ground

2 En / Dis Enable/disable

3 V I Control input (duty cycle)

4 Reduct Duty cycle reduction

5 NC Attenuation

6 Osc Oscillator

7 NC Not connected

8 NC Not connected

9 Latch Status short circuit latch

10 NC Not connected

11 Delay Short circuit protection delay

12 Sense Current sensing

14 Output Output

15 NC Not connected

16 V S Supply voltage VS

Pin1, GND Ground-Wire Breakage To protect the FET in the case of ground-wire breakage, a 820 k/C0087 resistor between gate and source it is recom- mended to provide proper switch-off conditions. Pin 2, Enable/Disable The dimmer can be switched on or off with pin 2 indepen- dently of the set duty cycle. V 2 Function Approx. >0.7 V or open Disable < 0.7 V or connected to Pin 1Enable Pin 3, Control Input The pulse width is controlled by means of an external po- tentiometer (47 k/C0087). The characteristic (angle of rotation/duty cycle) is linear. The duty cycle can be varied from 0 to 100%. It is possible to further restrict the duty cycle with the resistors R 1 and R2 (see figure 2). Pin 3 is protected against short-circuit to VBatt and ground GND (V Batt /C0120 16.5 V). Pin 4, Duty Cycle Reduction With Pin 4 connected according to figure 2, the set duty cycle is reduced as from VBatt /C0025 12.5 V . This causes a power reduction in the FET and in the lamps. In addition, the brightness of the lamps is largely independent of the supply voltage range, VBatt = 12.5 to 16 V . Output Slope Control The rise and fall time (tr, tf) of the lamp voltage can be limited to reduce radio interference. This is done with an integrator which controls a power MOSFET as source fol- lower. The slope time is controlled by an external capacitor C4 and the oscillator current (see figure 2). Calculation: t f /C0043tr /C0043V Batt /C0032C 4 Iosc With VBatt = 12 V , C4 = 470 pF and Iosc = 40 /C0109/C0032A,we thus obtain a controlled slope of tf /C0043tr /C004312 V /C0032470 pF 40 /C0109A /C0043141 /C0109s Pin 5, Attenuation Capacitor C4 connected to Pin 5 damps oscillation tendencies. Pin 6, Oscillator The oscillator determines the frequency of the output voltage. This is defined by an external capacitor, C 2. It is

Rev. A1, 14-Feb-97 3 (8) charged with a constant current, I, until the upper switch- ing threshold is reached. A second current source is then activated which taps a double current, 2/C0032I, from the charging current. The capacitor, C2, is thus discharged by the current, I, until the lower switching threshold is reached. The second source is then switched off again and the procedure starts once more. Example for Oscillator Frequency Calculation V T100 /C0043V S /C0032/C00971 /C0043(V Batt /C0042IS /C0032R 3) /C0032/C00971 V T/C0166100 /C0043V S /C0032/C00972 /C0043(V Batt /C0042IS /C0032R 3) /C0032/C00972 V TL /C0043V S /C0032/C00973 /C0043(V Batt /C0042IS /C0032R 3) /C0032/C00973 where V T100 /C0043High switching threshold (100% duty cycle) V T/C0116100 /C0043High switching threshold (/C0116100% duty cycle) V TL /C0043Low switching threshold /C00971, /C00972 and /C00973 are fixed constant. The above mentioned threshold voltages are calculated for the following values given in the data sheet. V Batt = 12 V , IS = 4 mA, R3 = 150 /C0087 , /C00971 = 0.7, /C00972 = 0.67 and /C00973 = 0.28. V T100 /C0043(12 V /C00424m A /C0032150 /C0087) /C00320.7 /C00918V V T/C0116100 /C004311.4 V /C00320.67 /C00437.6 V V TL /C004311.4 V /C00320.28 /C00433.2 V For a duty cycle of 100%, an oscillator frequency, f, is as follows: f/C0043 Iosc 2 /C0032(V T100 /C0042V TL )/C0032C 2 ,w h e r e C2 /C004322 nF and I osc /C004340 /C0109A Therefore: f/C0043 40 /C0109A 2 /C0032(8V /C00423.2 V)/C003222 nF /C0043189 Hz For a duty cycle of less than 100%, the oscillator fre- quency, f, is as follows: f/C0043 Iosc 2 /C0032(V T/C0116100 /C0042V TL )/C0032C 2 /C00414 /C0032V Batt/C0032C 4 whereas C 4 = 470 pF /C0043 40 /C0109A 2 /C0032/C04667.6 V /C00423.2 V/C0467/C003222 nF /C00414 /C003212 V /C0032470 pF /C0043185 Hz A selection of different values of C2 and C4, provides a range of oscillator frequency, f, from 10 to 2000 Hz. Pins 7, 8, 10 and 15 Not connected. Pin 9, Status Short Circuit Latch The status of the short-circuit latch can be monitored via Pin 9 (open collector output). Pin 9 Function L Short-circuit detected H No short-circuit detected Pins 11 and 12, Short-Circuit Protection and Current Sensing 1. Short-Circuit Detection and Time Delay, td The lamp current is monitored by means of an external shunt resistor. If the lamp current exceeds the threshold for the short-circuit detection circuit (V T2 /C0025 90 mV), the duty cycle is switched over to 100% and the capacitor C5 is charged by a current source of 20 /C0109 A (Ich – Idis). The external FET is switched off after the cut-off threshold T11) is reached. Renewed switching on the FET is pos- sible only after a power-on reset. The current source, Idis, ensures that the capacitor C5 is not charged by parasitic currents. The capacitor C5 is discharged by Idis to typ. 0.7 V . Time delay, td, is as follows: td /C0043C 5 /C0064(V T11 /C00420.7 V)/C0324(Ich /C0042Idis) With C5 = 330 nF and VBatt = 12 V , we have td /C0043330 nF /C0064(9.8 V /C00420.7 V)/C032420 /C0109A /C0043150 ms.

Rev. A1, 14-Feb-97 4 (8) 2. Current Limitation The lamp current is limited by a control amplifier that protects the external power transistor. The voltage drop across an external shunt resistor acts as the measured vari- able. Current limitation takes place for a voltage drop of V T1 /C0025 100 mV . Owing to the difference V T1–V T2 /C0025 10 mV , current limitation occurs only when the short-circuit detection circuit has responded. After a power-on reset, the output is inactive for half an oscillator cycle. During this time , the supply voltage ca- pacitor can be charged so that current limitation is guaranteed in the event of a short circuit when the IC is switched on for the first time. Pins 13 and 14, Charge Pump and Output Output, Pin 14, is suitable for controlling a power MOS- FET. During the active integration phase, the supply current of the operational amplifier is mainly supplied by the capacitor C 3 (bootstrapping). Additionally, a trickle charge is generated by an integrated oscillator 13 /C0025400 kHz) and a voltage doubler circuit. This per- mits a gate voltage supply at a duty cycle of 100%. Pin 16, Supply Voltage, Vs or VBatt Undervoltage Detection: In the event of voltages of approx. VBatt < 5.0 V , the ex- ternal FET is switched off and the latch for short-circuit detection is reset. A hysteresis ensures that the FET is switched on again at approximately V Batt /C0021 5.4 V . Overvoltage Detection Stage 1 If overvoltages V Batt > 20 V (typ.) occur, the external transistor is switched off and switched on again at V Batt < 18.5 V (hysteresis). Stage 2 If V Batt > 28.5 V (typ.), the voltage limitation of the IC is reduced from 26 V to 20 V . The gate of the external transistor remains at the potential of the IC ground, thus producing voltage sharing between FET and lamps in the event of overvoltage pulses occuring (e.g., load-dump). The short-circuit protection is not in operation. At V Batt < 23 V , the overvoltage detection stage 2 is switched off. Absolute Maximum Ratings Parameters Symbol Value Unit Junction temperature Tj 150 °C Ambient temperature range Tamb –40 to +110 °C Storage temperature range Tstg –55 to +125 °C Thermal Resistance Parameters Symbol Value Unit Junction ambient R thJA 120 K/W

Electrical Characteristics

Tamb = –40 to +110°C, VBatt = 9 to 16.5 V , (basic function is guaranteed between 6.0 V to 9.0 V) reference point ground, unless otherwise specified (see figure 1). All other values refer to Pin GND (Pin 1). Parameters Test Conditions / Pins Symbol Min. Typ. Max. Unit Current consumption Pin 16 IS 6.8 mA Supply voltage Overvoltage detection, stage 1 V Batt 25 V Stabilized voltage IS = 10 mA Pin 16 V S 24.5 27.0 V Battery undervoltage detection – on – off V Batt 4.4 4.8 5.0 5.4 5.6 6.0 V

Rev. A1, 14-Feb-97 5 (8) UnitMax.Typ.Min.SymbolTest Conditions / PinsParameters Battery overvoltage detection Pin 2 Stage 1: – on – off V Batt 18.3 16.7 20.0 18.5 21.7 20.3 V Stage 2: – on – off V Batt 25.5 19.5 28.5 23.0 32.5 26.5 V Stabilized voltage IS = 30 mA Pin 16V Z 18.5 20.0 21.5 V Short-circuit protection Pin 12 Short-circuit current limita- tion V T1 = VS – V12 V T1 85 100 120 mV Short-circuit detection V T2 = VS – V12 V T2 75 90 105 mVT2 S 12 V T1 – VT2 3 10 30 mV Delay timer short circuit detection Pin 11 Switched off threshold V T11 = VS – V11 V T11 9.5 9.8 10.1 V Charge current Ich 23 /C0109A Dicharge current Idis 3 /C0109A Capacitance current I5 = Ich – Idis I5 13 20 27 mA Output short-circuit latch Pin 9 Saturation voltage I9 = 100 /C0109A V sat 150 350 mV Voltage doubler Pin 13 V oltage Duty cycle 100% V 13 2 VS Oscillator frequency f13 280 400 520 kHz Internal voltage limitationI13 = 5 mA V 13 26 27.5 30.0 Vg (whichever is lower) V 13 (VS+14 ) (VS+15 ) (VS+16 ) Gate output Pin 14 V oltage Low level V 14 0.35 0.70 0.95 Vg V Batt = 16.5 V , Tamb = 110 °C, R3 = 150 /C0087 1.5 *) High level, duty cycle 100% V 14 V 13 Current V 14 = Low level I14 1.0 mA V 14 = High level, I13 > | I14 | –1.0 Enable/ Disable Pin 2 Current V 2 = 0 V I2 –20 –40 –60 /C0109A Duty cycle reduction Pin 4 Z-voltage I4 = 500 /C0109A V 4 6.9 7.4 8.0 V Oscillator Frequency Pin6 f 10 2000 Hz Threshold cycle Upper V 14 /C0043High, /C00971 /C0043V T100 V S /C00971 0.68 0.7 0.72 V 14 /C0043Low, /C00972 /C0043V T/C0116100 V S /C00972 0.65 0.67 0.69 Lower /C00973 /C0043V TL V S /C00973 0.26 0.28 0.3 Oscillator current V Batt = 12 V /C0006Iosc 26 40 54 /C0109A Frequency tolerance C 4 open, C2 = 470 nF, duty cycle = 50% f 6.0 9.9 13.5 Hz *) Reference point is battery ground.

Rev. A1, 14-Feb-97 6 (8) Application V S Reset V S V S Ich Reset Switch – on delay 2 I V S I Oscillator 30 k/C0087 100 /C0087 V S Overvoltage monitoring stage 1 Low voltage monitoring V S V S Reset V S Overvoltage monitoring stage 2 V oltage doubler V S 90 mV 10 mV V S Current limiting C 3 47 nF 820 k/C0087 R sh V BattC5 R3150 /C0087 Ground 7 8 10 NC NC NC R 2 47 k/C0087 C 6 47 F Load RL Idis 95 9757 NC /C0109 47 pF 330 nF 22 nF Figure 2.

Rev. A1, 14-Feb-97 7 (8) Dimensions in mm 13036 technical drawings according to DIN specifications Dimensions in mm 10.0 9.85 8.89 0.4 1.27 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2 16 9

Rev. A1, 14-Feb-97 8 (8) Ozone Depleting Substances Policy Statement It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423