U6084B_05 ATMEL | Alldatasheet

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Features

  • Pulse-width Modulation up to 2-kHz Clock Frequency  Protection Against Short-circuit, Load-dump Overvoltage and Reverse VS  Duty Cycle 0% to 100% Continuously  Output Stage for Power MOSFET  Interference and Damage Protection According to VDE 0839 and ISO/TR 7637/1  Charge-pump Noise Suppressed  Ground-wire Breakage Protection 1. Description The U6084B is a PWM-IC with bipolar technology designed for the control of an N-channel power MOSFET used as a high-side switch. The IC is ideal for use in the brightness control (dimming) of lamps such as in dashboard applications. For constant brightness, the preselected duty cycle can be reduced automatically as a function of the supply voltage. Figure 1-1. Block Diagram with External Circuit Current monitoring + short circuit detection Output Charge pumpRC oscillator Duty cycle range 0-100% Duty cycle reduction Control input Short circuit latch monitoring Voltage monitoring Enable/ disable 9 1116 PWM Logic 47 nF 150 Ω 47 kΩ Ground VS VBatt Rsh PWM Power Control with Automatic Duty-cycle Reduction U6084B Rev. 4677C–AUTO–09/05

4677C–AUTO–09/05 U6084B 2. Pin Configuration Figure 2-1. Pinning SO16 Table 2-1. Pin Description Pin Symbol Function

1 GND IC ground

2 EN/DIS Enable/disable

3 VI Control input (duty cycle)

4 REDUCT Duty cycle reduction

5 NC Attenuation

6 OSC Oscillator

7 NC Not connected

8 NC Not connected

9 LATCH Status short-circuit latch

10 NC Not connected

11 DELAY Short-circuit protection delay

12 SENSE Current sensing

14 OUTPUT Output

15 NC Not connected

16 VS Supply voltage V

S GND EN/DIS VI REDUCT NC OSC NC NC VS NC OUTPUT 2 VS SENSE DELAY NC LATCH

4677C–AUTO–09/05 U6084B 3. Functional Description

3.1 Pin1 – GND

3.1.1 Ground-wire Breakage

To protect the FET in case of ground-wire breakage, a 820-kΩ resistor between gate and source is recommended to provide proper switch-off conditions.

3.2 Pin 2 – Enable/Disable

The dimmer can be switched on or off with pin 2, independently of the set duty cycle.

3.3 Pin 3 – Control Input

The pulse width is controlled by means of an external potentiometer (47 k Ω). The characteristic (angle of rotation/duty cycle) is linear. The duty cycle be varied from 0% to 100%. It is possible to further restrict the duty cycle with resistors R1 and R2 (Figure 7-1 on page 9). Pin 3 is protected against short-circuit to VBatt and ground GND (VBatt ≤ 16.5V).

3.4 Pin 4 – Duty Cycle Reduction

With pin 4 connected according to Figure 7-1 on page 9 , the set duty cycle is reduced to VBatt ≈ 12.5V. This causes a power reduction in the FET and in the lamps. In addition, the brightness of the lamps is largely independent of the supply voltage range, VBatt = 12.5V to 16V.

3.4.1 Output Slope Control

The rise and fall time (t r, tf) of the lamp voltage can be limited to reduce radio interference. This is done with an integrator which controls a power MOSFET as source follower. The slope time is controlled by an external capacitor C4 and the oscillator current (Figure 7-1 on page 9). Calculation: With VBatt = 12V, C4 = 470 pF and Iosc = 40 µA, the controlled slope is

3.5 Pin 5 – Attenuation

Capacitor C4 connected to pin 5 damps oscillation tendencies. Table 3-1. Pin 2 Function V2 Function > approximately 0.7V or open Disable < 0.7V or connected to pin 1 Enable tf tr VBatt Iosc tf tr 12V 470 pF

4677C–AUTO–09/05 U6084B

3.6 Pin 6 – Oscillator

The oscillator determines the frequ ency of the output voltage. This is defined by an external capacitor, C 2. It is charged with a constant current, I, until the upper switching threshold is reached. A second current source is then activated which taps a double current, 2 × I, from the charging current. The capacitor, C2, is thus discharged by the current, I, until the lower switching threshold is reached. The second source is then switched off again and the procedure starts once more.

3.6.1 Example for Oscillator Frequency Calculation

VT100 = High switching threshold 100% duty cycle VT<100 = High switching threshold < 100% duty cycle VTL = Low switching threshold α1, α2 and α3 are fixed values The above mentioned threshold voltages are calculated for the following values given in the datasheet. VBatt = 12V, IS = 4 mA, R3 = 150Ω α1 = 0.7, α2 = 0.67 and α3 = 0.28 VT100 = (12V – 4 mA × 150Ω) × 0.7 ≈ 8V VT<100 = 11.4V × 0.67 = 7.6V VTL = 11.4V × 0.28 = 3.2V For a duty cycle of 100%, the oscillator frequency, f, is as follows: where C2 = 22 nF and Iosc = 40 µA Therefore: For a duty cycle of less than 100%, the oscillator frequency, f, is as follows: where C4 = 470 pF A selection of different values of C2 and C4 provides a range of oscillator frequencies from 10Hz to 2000Hz. VT100 VS α1 VBatt IS R3×–() α 1×=×= VT<100 VS α2 VBatt IS R3×–() α 2×=×= VTL VS α3 VBatt IS R3×–() α 3×=×= f Iosc f 40 µA f Iosc f 40 µA

4677C–AUTO–09/05 U6084B

3.7 Pins 7, 8, 10 and 15

Not connected.

3.8 Pin 9 – Status Short Circuit Latch

The status of the short-circuit latch can be monitored via pin 9 (open collector output).

3.9 Pins 11 and 12 – Short-circuit Protection and Current Sensing

3.9.1 Short-circuit Detection and Time Delay t d

The lamp current is monitored by means of an external shunt resistor. If the lamp current exceeds the threshold for the sh ort-circuit detection circuit (V T2 ≈ 90 mV), the duty cycle is switched over to 100% and capacitor C 5 is charged by a current source of 20 µA (I ch – Idis). The external FET is switched off after the cut-off threshold (V T11) is reached. Renewed switching on of the FET is possible only after a power-on reset. The current source, I dis, ensures that capaci- tor C5 is not charged by parasitic currents. Capacitor C5 is discharged by Idis to typically 0.7V. Time delay, td, is as follows: With C5 = 330 nF and VBatt = 12V, we have

3.9.2 Current Limitation

The lamp current is limited by a control amplifier that protects the external power transistor. The voltage drop across an external shunt resistor acts as the measured variable. Current limitation takes place for a voltage drop of VT1 ≈ 100 mV. Owing to the difference VT – VT2 ≈ 10 mV, cur- rent limitation occurs only when the short-circuit detection circuit has responded. After a power-on reset, the output is inactive for half an oscillator cycle. During this time, the sup- ply voltage capacitor can be charged so that current limitation is guaranteed in the event of a short-circuit when the IC is switched on for the first time.

3.10 Pins 13 and 14 – Charge Pump and Output

Pin 14 (output) is suitable for controlling a power MOSFET. During the active integration phase, the supply current of the operational amplifier is mainly supplied by capacitor C3 (bootstrapping). Additionally, a trickle charge is gene rated by an integrated oscillator (f 13 ≈ 400 kHz) and a volt- age doubler circuit. This permits a gate voltage supply at a duty cycle of 100%. Table 3-2. Pin 9 Function Pin 9 Function L Short-circuit detected H No short-circuit detected td C5 V11 0.7V–() td 330 nF 9.8V 0.7V–()

4677C–AUTO–09/05 U6084B

3.11 Pin 16 – Supply Voltage, V s or VBatt

3.11.1 Undervoltage Detection

In the event of voltages of approximately V Batt < 5.0V, the external FET is switched off and the latch for short-circuit detection is reset. A hysteresis ensures that the FET is switched on again at approximately VBatt ≥ 5.4V.

3.11.2 Overvoltage Detection

 Stage 1 – If overvoltages of VBatt > 20V (typically) occur, the external transistor is switched off and switched on again at VBatt < 18.5V (hysteresis).  Stage 2 –I f VBatt > 28.5V (typically), the voltage limitation of the IC is reduced from 26V to 20V. The gate of the external transistor remains at the potential of the IC ground, thus producing voltage sharing between the FET and lamps in the event of overvoltage pulses (for example, load dump). The short-circuit protection is not in operation. At V Batt < 23V, the overvoltage detection stage 2 is switched off.

4677C–AUTO–09/05 U6084B 4. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Parameters Symbol Value Unit Junction temperature T j 150 °C Ambient temperature range T amb –40 to +110 °C Storage temperature range T stg –55 to +125 °C 5. Thermal Resistance Parameters Symbol Value Unit Junction ambient R thJA 120 K/W 6. Electrical Characteristics Tamb = –40 to +110°C, VBatt = 9V to 16.5V (basic function is guaranteed between 6.0V and 9.0V), reference point ground, unless otherwise specified (Figure 1-1 on page 1). All other values refer to pin GND (pin 1). Parameters Test Conditions Symbol Min. Typ. Max. Unit Current consumption Pin 16 I S 6.8 mA Supply voltage Overvolt age detection, stage 1 V Batt 25 V Stabilized voltage I S = 10 mA, pin 16 V S 24.5 27.0 V Battery undervoltage detection - On - Off VBatt 4.4 4.8 5.0 5.4 5.6 6.0 V Battery Overvoltage Detection Pin 2 Stage 1: - On - Off V Batt 18.3 16.7 20.0 18.5 21.7 20.3 V Stage 2: - On - Off VBatt 25.5 19.5 28.5 23.0 32.5 26.5 V Stabilized voltage I S = 30 mA, pin 16 V Z 18.5 20.0 21.5 V Short-circuit Protection Pin 12 Short-circuit current limitation V T1 = VS – V12 VT1 85 100 120 mV Short-circuit detection VT2 = VS – V12 VT2 75 90 105 mV VT1 – VT2 31 0 3 0 m V Delay Timer Short-circuit Detection Pin 11 Switched off threshold V T11 = VS – V11 VT11 9.5 9.8 10.1 V Charge current I ch 23 µA Discharge current I dis 3µ A Capacitance current I 5 = Ich – Idis I5 13 20 27 mA Output Short-circuit Latch Pin 9 Saturation voltage I 9 = 100 µA V sat 150 350 mV Voltage Doubler Pin 13 Voltage Duty cycle 100% V 13 2 VS Oscillator frequency f 13 280 400 520 kHz Note: 1. Reference point is battery ground

4677C–AUTO–09/05 U6084B Internal voltage limitation I13 = 5 mA V 13 26 27.5 30.0 V (Whichever is lower) V 13 (VS+14)( V S+15)( V S+16) Gate Output Pin 14 Voltage Low level V 14 0.35 0.70 0.95 VVBatt = 16.5V, Tamb = 110°C, R3 = 150Ω 1.5(1) High level, duty cycle 100% V 14 V13 Current V14 = Low level I 14 1.0 mA V14 = High level, I13 > ⏐ I14⏐ –1.0 Enable/Disable Pin 2 Current V 2 = 0V I 2 –20 –40 –60 µA Duty Cycle Reduction Pin 4 Z-voltage I 4 = 500 µA V 4 6.9 7.4 8.0 V Oscillator Frequency Pin 6 f 10 2000 Hz Threshold cycle Upper Lower α 1 0.68 0.7 0.72 α2 0.65 0.67 0.69 α3 0.26 0.28 0.3 Oscillator current V Batt = 1V ±I osc 26 40 54 µA Frequency tolerance C4 open, C2 = 470 nF , duty cycle = 50% f6 . 0 9 . 9 1 3 . 5 H z 6. Electrical Characteristics (Continued) Tamb = –40 to +110°C, VBatt = 9V to 16.5V (basic function is guaranteed between 6.0V and 9.0V), reference point ground, unless otherwise specified (Figure 1-1 on page 1). All other values refer to pin GND (pin 1). Parameters Test Conditions Symbol Min. Typ. Max. Unit Note: 1. Reference point is battery ground V14 High, α1 VT100 VS V14 Low, α2 VT<100 VS VTL VS

4677C–AUTO–09/05 U6084B 7. Application Figure 7-1. Application - + - + + - Reset Ich Reset Switch - on delay 2 I I Oscillator 30 kΩ 100Ω Overvoltage m onitoring stage 1 Low voltage m onitoring Reset 1Overvoltage m onitoring stage 2 Voltage doubler + - 90 m V 10 m V Current lim iting C 47 nF 820 kΩ R Sh V Batt 1413 150Ω Ground NC NC NC 47 kΩ 47 µF Load R L Idis NC 47 pF 330 nF 22 nF V S V S C R V S V S V S C R R C C V S V S V S V S V S C

4677C–AUTO–09/05 U6084B 9. Package Information SO16 10. Revision History 8. Ordering Information Extended Type Number Package Remarks U6084B-MFPG3Y SO16 Taped and reeled, Pb-free technical drawings according to DIN specifications Dimensions in mm 10.0 9.85 8.89 0.4 1.27 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2 16 9 Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 4677B-AUTO-02/03

  • Block Diagram on Page 1 changed
  • New heading rows at Table “Absolute Maximum Ratings” on page 6 added 4677C-AUTO-08/05
  • Put datasheet in a new template
  • Updated text to new style guide
  • First page: Pb-free logo added
  • Page 9: Ordering Information changed

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