U6083B TEMIC | Alldatasheet
Document overview
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Technical content
Features
/C0068Pulse-width modulation up to 2 kHz clock frequency /C0068Protection against short circuit, load dump over–voltage and reverse VS /C0068Duty cycle 18 to 100% continuously /C0068Internally reduced pulse slope of lamp’s voltage /C0068Interference and damage protection according to VDE 0839 and ISO/TR 7637/1. /C0068Charge pump noise suppressed /C0068Ground wire breakage protection
Ordering Information
Extended Type Number Package Remarks U6083B DIP8 Block Diagram Current monitoring + short circuit detection Output Charge pumpRC oscillator Duty cycle range 18 ... 100% Duty cycle reduction Control input V oltage monitoring Slew rate control V S C 5 PWM Logic 47 k/C0087 47 nF R sh R 3 95 9753 V Batt 150 /C0087 C 3 C 2 C 1 GND Ground Figure 1. Block diagram with external circuit
Rev. A1, 14-Feb-97 2 (8) Pin Description 4 5 95 9944 V S GND V I Osc Output Sense 2 VS Delay Pin Symbol Function
1 V S Supply voltage VS
2 GND IC ground
3 V I Control input (duty cycle)
4 Osc Oscillator
5 Delay Short circuit protection delay
6 Sense Current sensing
8 Output Output
Pin 1, Supply Voltage, Vs or VBatt Overvoltage Detection Stage 1: If overvoltages V Batt > 20 V (typ.) occur, the external transistor is switched off and switched on again at V Batt < 18.5 V (hysteresis). Stage 2: If V Batt > 28.5 V (typ), the voltage limitation of the IC is reduced from VS = 26 V to 20 V . The gate of the external transistor remains at the potential of the IC ground, thus producing voltage sharing between FET and lamps in the event of overvoltage pulses occuring (e.g., load dump). The short-circuit protection is not in operation. At V Batt approx. < 23 V , the overvoltage detection stage 2 is switched off. Thus during overvoltage detection stage 2 the lamp voltage V lamp is calculated to : V Lamp = VBatt – VS – VGS V S = Supply voltage of the IC at overvoltage detection stage 2 V GS = Gate – source voltage of the FET Undervoltage Detection In the event of voltages of approximately VBatt < 5.0 V , the external FET is switched off and the latch for short- circuit detection is reset. A hysteresis ensures that the FET is switched on again at approximately V Batt /C0021 5.4 V . Pin 2, GND Ground-Wire Breakage To protect the FET in the case of ground-wire breakage, a 1 M /C0087 resistor between gate and source it is recom- mended to provide proper switch-off conditions. Pin 3, Control Input The pulse width is controlled by means of an external potentiometer (47 k/C0087). The characteristic (angle of rota- tion/duty cycle) is linear. The duty cycle can be varied from 18 to 100%. It is possible to further restrict the duty cycle with the resistors R 1 and R2 (see figure 3). In order to reduce the power dissipation of the FET and to increase the lifetime of the lamps, the IC automatically reduces the maximum duty cycle at Pin 8 if the supply voltage exceeds V 2 = 13 V . Pin 3 is protected against short-circuit to VBatt and ground (VBatt /C0120 16.5 V). Pin 4, Oscillator The oscillator determines the frequency of the output voltage. This is defined by an external capacitor, C2. It is charged with a constant current, I, until the upper switching threshold is reached. A second current source is then activated which taps a double current, 2/C0032I, from the charging current. The capacitor, C 2, is thus discharged at the current, I, until the lower switching threshold is reached. The second source is then switched off again and the procedure starts once more. Example for Oscillator Frequency Calculation: Switching thresholds V T100 = High switching threshold (100% duty cycle) V T100 = VS /C0032 /C00971 = (VBatt – IS /C0032 R3) /C0032 /C00971 V T<100 = High switching threshold (< 100% duty cycle) V T<100 = VS /C0032 /C00972 = (VBatt – IS /C0032 R3) /C0032 /C00972 V TL = Low switching threshold V TL = VS /C0032 /C00973 = (VBatt – IS /C0032 R3) /C0032 /C00973 whereas /C00971, /C00972 and /C00973 are fixed constant. Calculation Example The above mentioned threshold voltages are calculated for the following values given in the data sheet. V Batt = 12 V , IS = 4 mA, R3 = 150 /C0087 , /C00971 = 0.7, /C00972 = 0.67 and /C00973 = 0.28.
2000 Hz as shown in the data sheet. series with capacitance C4 is recommended. Test conditions refering to figure 2. Application circuit according to figure 1 or 3. Load: nine 4-W lamps in parallel. Figure 2. V oltage spectrum of on-board radio reception
- Short-Circuit Detection and Time Delay, td
Rev. A1, 14-Feb-97 4 (8) Time delay, td, is as follows: td = C5/C0032V T5/ (Ich – Idis) With C 5 = 100 nF and V T5 = 10.4 V , Ich =13 /C0109A, Idis = 3 /C0109A, we have td = 100 nF/C003210.4 V/ (13 /C0109A – 3 /C0109A) td = 104 ms 2. Current Limitation: The lamp current is limited by a control amplifier to protect the external power transistor. The voltage drop across an external shunt resistor acts as the measured variable. Current limitation takes place for a voltage drop of V T1 /C0025 100 mV . Owing to the difference V T1–V T2 /C0025 10 mV , it is ensured that current limitation occurs only when the short-circuit detection circuit has responded. After a power-on reset, the output is inactive for half an oscillator cycle. During this time, the supply voltage capacitor can be charged so that current limitation is guar- anteed in the event of a short-circuit when the IC is switched on for the first time. Pins 7 and 8, Charge Pump and Output, Output, Pin 8, is suitable for controlling a power MOSFET. During the active integration phase, the supply current of the operational amplifier is mainly supplied by the capacitor C 3 (bootstrapping). In addition, a trickle charge is generated by an integrated oscillator 7 /C0025400 kHz) and a voltage doubler circuit. This permits a gate voltage supply at a duty cycle of 100%. Absolute Maximum Ratings Parameters Symbol Value Unit Junction temperature Tj 150 °C Ambient temperature range Tamb –40 to +110 °C Storage temperature range Tstg –55 to +125 °C Thermal Resistance Parameters Symbol Value Unit Junction ambient R thJA 120 K/W
Electrical Characteristics
Tamb = –40 to +110°C, VBatt = 9 to 16.5 V , (basic function is guaranteed between 6.0 V to 9.0 V) reference point ground, unless otherwise specified (see figure 1). All other values refer to Pin GND (Pin 2). Parameters Test Conditions / Pins Symbol Min. Typ. Max. Unit Current consumption Pin 1 IS 7.9 mA Supply voltage Overvoltage detection, stage 1 V Batt 25 V Stabilized voltage IS = 10 mA Pin 1 V s 24.5 27.0 V Battery undervoltage detection – on – off V Batt 4.4 4.8 5.0 5.4 5.6 6.0 V
Rev. A1, 14-Feb-97 5 (8) UnitMax.Typ.Min.SymbolTest Conditions / PinsParameters Battery overvoltage detection Stage 1: – on – off V Batt 18.3 16.7 20.0 18.5 21.7 20.3 V Stage 2: Detection stage 2 – on – off V Batt 25.5 19.5 28.5 23.0 32.5 26.5 V Stabilized voltage IS = 30 mA Pin 1 V s 18.5 20.0 21.5 V Short-circuit protection Pin 6 Short-circuit current limitation V T1 = VS – V6 V T1 85 100 120 mV Short-circuit detection V T2 = VS – V6 V T2 75 90 105 mVT2 S 6 V T1 – VT2 3 10 30 Delay timer short circuit detection, VBatt = 12 V Pin 5 Switched off threshold V T5 = VS – V5 V T5 10.2 10.4 10.6 V Charge current Ich 13 /C0109A Discharge current Idis 3 /C0109A Capacitance current I5 = Ich – Idis I5 5 10 15 mA Voltage doubler Pin 7 V oltage Duty cycle 100% V 7 2 VS Oscillator frequency f7 280 400 520 kHz Internal voltage limitationI7 = 5 mA V 7 26 27.5 30.0 Vg 7 (whichever is lower) V S+14 V S+15 V S+16 Edge steepness dv8/dt =/C00974 dV4/dt dV 8/dtmax /C00974 53 63 72 130 V/ms Gate output Pin 8 V oltage Low level V 8 0.35 0.70 0.95 Vg V Batt = 16.5 V Tamb = 110°C, R3 = 150 /C0087 1.5 *) High level, duty cycle 100% V 8 V 7 Current V 8 = Low level I8 1.0 mA V 8 = High level, I7 > | I8 | –1.0 Duty cycle Min: C2 = 68 nF Max: VBatt /C0118 12.4 V V Batt = 16.5 V , C2 = 68 nF tp/T 15 100 Oscillator Frequency Pin4 f 10 2000 Hz Threshold cycle Upper V 8 /C0043High, /C00971 /C0043V T100 V S /C00971 0.68 0.7 0.72 Upper V 8 /C0043Low, /C00972 /C0043V T/C0116100 V S /C00972 0.65 0.67 0.69 Lower /C00973 /C0043V TL V S /C00973 0.26 0.28 0.3 Oscillator current V Batt = 12 V /C0006Iosc 34 45 54 /C0109A Frequency C 4 open, C2 = 68 nF duty cycle = 50% f 56 75 90 Hz *) Reference point is battery ground.
Rev. A1, 14-Feb-97 6 (8) Application V S Reset V S V S Ich Reset Switch – on delay 2 I V S I Oscillator V S Overvoltage monitoring stage 1 Low voltage monitoring V S V S Reset Overvoltage monitoring stage 2 V oltage doubler V S 90 mV 10 mV V S Current limiting 47 nF
1 M/C0087
R /C0109 R R GND 1.8 nF 100 nF 68 nF Figure 3.
Rev. A1, 14-Feb-97 7 (8)
Package Information
9.8 9.5 Dimensions in mm 1.64 1.44 4.8 max 0.5 min 3.3 0.58 0.48 7.62 2.54 6.4 max 0.36 max 9.8 8.2 7.77 7.47 technical drawings according to DIN specifications
Rev. A1, 14-Feb-97 8 (8) Ozone Depleting Substances Policy Statement It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423