U4289BM ATMEL | Alldatasheet
Document overview
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Technical content
Features
Reference Oscillator up to 15 MHz Two Programmable 16-bit Dividers Adjustable from 2 to 65535 Fine Tuning Steps –A M ≥ 1 kHz –F M ≥ 2 kHz Loop-push-pull Stage for AM/FM High Signal/Noise Ratio
Description
The U4289BM is an integrated circuit in BICMOS technology for frequency synthesiz- ers. It performs all the functions of a PLL radio tuning system and is controlled by a 2-wire bus. The device is designed for all frequency synthesizer applications in radio receivers, as well as for RDS (Radio Data System) applications. Figure 1. Block Diagram
2 U4289BM
Figure 2. Pinning SO16
4 AS Address selection
5 SWO1 Switching output
6 FMOSC FM oscillator input
7 GND2 Ground 2 (analog)
8 AMOSC AM oscillator input
9 PDFM FM current output
10 PDFMO FM analog output
11 PDAM AM current output
12 PDAMO AM analog output
13 VA Analog supply voltage
14 OSCIN Oscillator input
15 OSCOUT Oscillator output
16 GND1 Ground 1 (digital)
4757A–AUDR–10/03 Functional The U4289BM is controlled via the 2-wire bus. One module address byte, two subad- dress bytes and five data bytes enable programming. The module address contains a programmable address bit A 1, which (along with address select input AS, pin 4), enables the operation of two U4289BM devices in one system. If bit A 1 is identical with the status of the address select input AS, the chip is selected. The subaddress determines which of the data bytes is transmitted first. If the subad- dress of the R-divider is transmitted, the sequence of the next data bytes is DB 0 (Status), DB 1 and DB 2. If the subaddress of the N-divider is transmitted, the sequence of the next data bytes is DB 3 and DB 4. The bit organization of the module address, subaddress and 5 data bytes is shown in table “Bit Organization” on page 7. Each transmission on the bus begins with the “START” condition and has to be ended by the “STOP” condition (see table “Transmission Protocol” on page 7). The integrated circuit U4289BM has two separate inputs for the AM and FM oscillators. Pre-amplified AM and FM signals are fed to the 16-bit R-divider via the AM/FM switch. The AM/FM switch is software controlled. Tuning steps can be selected by the 16-bit R-divider. Furthermore, the device provides a digital memory phase detector and two separate current sources for AM and FM amplifier (charge pump) as given in the Table “Electrical Characteristics” on page 4. It allows in dependent gain adjustment, providing high cur- rent for high-speed tuning and low current for stable tuning. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Pins Symbol Value Unit Supply voltage 1 V DD -0.3 to +6 V Input voltage 2, 3, 4, 6, 8, 14, 15 VI -0.3 to VDD +0.3 V Output current 3, 5 I O -1 to +5 mA Output drain voltage 5 V OD 15 V Analog supply voltage with 220 Ω serial resistance 2 minutes(1) 13 VA VA 6 to 15 V V Output current 9, 12 I AO -1 to +20 mA Ambient temperature range T amb -30 to +85 ° C Storage temperature range T stg -40 to +125 ° C Junction temperature T j 125 ° C Electrostatic handling (modified MIL STD 883 D method 3015.7: all supply pins connected together) ±VESD 1000 V Note: 1. Corresponding to the application circuit (Figure 8 on page 8) Thermal Resistance Parameters Symbol Value Unit Junction ambient R thJA 160 K/W
4 U4289BM
4757A–AUDR–10/03
Electrical Characteristics
VDD = 5 V, VA = 10 V, Tamb = 25° C, unless otherwise specified Parameters Test Conditions Pins Symbol Min. Typ. Max. Unit Supply voltage 1 V DD 4.5 5.0 5.5 V Quiescent supply current AM mode/FM mode 1 I DD 4.0 7.0 mA FM input sensitivity, RG = 50 Ω, FMOSC fi = 70 to 120 MHz 6 V SFM 40 mV rms fi = 160 MHz 6 V SFM 150 mV rms AM input sensitivity, RG = 50 Ω, AMOSC fi = 0.6 to 35 MHz 8 V SAM 40 mV rms Oscillator input sensitivity, RG = 50 Ω, OSCIN fi = 0.1 to 15 MHz 14 V SOSC 100 mV rms Phase Detector PDFM Output current 1 10 ±I PDFM 1600 2000 2400 µA Output current 2 10 ±I PDFM 400 500 600 µA Leakage current 10 ±I PDFML 20 nA Phase Detector PDAM Output current 1 11 ±I PDAM 160 200 240 µA Output current 2 11 ±I PDAM 40 50 60 µA Leakage current 11 ±I PDAML 20 µA Analog Output PDFMO, PDAMO Saturation voltage LOW I = 15 mA 9, 12 V satL 200 400 mW Saturation voltage HIGH I = 15 mA 9, 12 V satH 9.5 9.95 V Bus SCL, SDA, AS Input voltage HIGH 2, 3, 4 V iBUS 3.0 V DD V Input voltage LOW 2, 3, 4 V iBUS 01 . 5 V Output voltage acknowledge LOW I SDA = 3 mA 3 V O 0.4 V Clock frequency 2 f SCL 100 kHz Rise time SDA, SCL 2, 3 t r 1µ s Fall time SDA, SCL 2, 3 t f 300 ns Period of SCL HIGH 2 t H 4.0 µs Period of SCL LOW 2 t L 4.7 µs
6 U4289BM
Figure 5. AM Input Sensitivity, Tamb = +85° C Figure 6. AM Input Sensitivity, Tamb = -30° C Figure 7. Bus Timing
Table 1. Function Mode
8 U4289BM
Figure 8. Application Circuit close to pin 11 with respect to pin 10. Figure 9. PCB Layout
4 MHz
4757A–AUDR–10/03
Package Information
Ordering Information
Extended Type Number Package Remarks U4289BM-MFP SO16 plastic – U4289BM-MFPG3 SO16 plastic Taping according to IEC-286-3 technical drawings according to DIN specifications Dimensions in mm 10.0 9.85 8.89 0.4 1.27 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2 16 9
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