U4091BM-N ATMEL | Alldatasheet

Document overview

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Technical content

Features

 Speech Circuit with Anti-clipping  Tone-ringer Interface with DC/DC Converter  Speaker Amplifier with Anti-distortion  Power-supply Management (Regulated, Unregulated) and a Special Supply for Electret Microphone  Voice Switch  Interface for Answering Machine and Cordless Phone

Applications

 Feature Phone  Answering Machine  Fax Machine  Speaker Phone  Cordless Phone Benefits  No Piezoelectric Transducer for Tone Ringing Necessary  Complete System Integration of Analog Signal Processing on One Chip  Very Few External Components

Description

The programmable telephone audio processor U4091BM-N is a linear integrated cir- cuit for use in feature phones, answering machines and fax machines. It contains the speech circuit, tone-ringer interface with DC/DC converter, sidetone equivalent and ear-protection rectifiers. The circuit is line-powered and contains all components nec- essary for signal amplification and adaptation to the line. The U4091BM-N can also be supplied via an external power supply. An integrated voice switch with loudspeaker amplifier enables hands-free or loudhearing operation. With an anti-feedback function, acoustic feedback during loudhearing can be reduced significantly. The generated supply voltage is suitable for a wide range of peripheral circuits. Programmable Telephone Audio Processor U4091BM-N

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Figure 1. Block Diagram

Figure 2. Detailed Block Diagram

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Figure 3. Pinning SSO44

4666B–CORD–08/04 Pin Description Pin Symbol Function

1 RECIN Receive amplifier input (1)

2 TXACL Time constant adjustment for transmit anti-clipping

3 MIC3 Microphone input for hands-free operation

4 MIC2 Input of symmetrical microphone amplifier with high common-mode rejection ratio

5 MIC1 Input of symmetrical microphone amplifier with high common-mode rejection ratio

6 RECO2 Output of the receive amplifier

7 RECO1 Output of the receive amplifier, also used for sidetone network

8I N D The internal equivalent inductance of the circuit is proportional to the value of the capacitor at this pin. A resistor connected to ground may be used to adjust the DC mask.

9 VL Positive supply-voltage input to the device in speech mode

10 SENSE Input for sensing the available line current

11 GND Ground, reference point for DC and AC signals

12 VB Unstabilized supply voltage for speech network

13 SAO2 Negative output of speaker amplifier (push-pull only)

14 SAO1 Positive output of speaker amplifier (single ended and push-pull operation)

15 VMPS Unregulated supply voltage for the microcontroller (via series regulator to VMP)

16 VMP Regulated output voltage for supplying the microcontroller (typically 3.3 V/6 mA in speech mode)

17 VMIC Reference node for microphone amplifier, supply for electret microphones

18 TSACL Time constant for speaker amplifier anti-clipping

19 VRING Input for ringer supply

20 IMPA Input for adjusting the ringer input impedance

21 COSC 70-kHz oscillator for ringing power converter

22 SWOUT Output for driving the external switch resistor

23 INT Interrupt line for serial bus

24 SCL Clock input for serial bus

25 SDA Data line for serial bus

26 OSCIN Input for 3.58-MHz oscillator

27 RESET Reset output for the microcontroller

28 OSCOUT Clock output for the microcontroller

29 ES Input for external supply indication

30 ADIN Input of A/D converter

31 BNMR Output of background-noise monitor receive

32 BNMT Output of background-noise monitor transmit

33 CT Time constant for mode switching of voice switch

34 TLDR Time constant of receive-level detector

35 INLDR Input of receive-level detector

36 INLDT Input of transmit-level detector

37 TLDT Time constant of transmit-level detector

38 IMPSW Switch for additional line impedance

Note: 1. The protection device at Pin RECIN is disconnected.

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4666B–CORD–08/04 DC Line Interface and Supply-voltage Generation The DC line interface consists of an electronic inductance and a dual-port output stage which charges the capacitors at VMPS and VB. The value of the equivalent inductance is given by: The U4091BM-N contains two identical series regulators which provide a supply voltage VMP of 3.3 V suitable for a microprocessor. In speech mode, both regulators are active because VMPS and VB are charged simultaneously by the DC line interface. The output current is 6 mA. The capacitor at VMPS is used to provide the microcomputer with suffi- cient power during long line interruptions. Thus, long flash pulses can be bridged or an LCD display can be turned on for more than 2 seconds after going on-hook. When the system is in ringing mode, VB is charged by the on-chip ringing power converter. In this mode, only one regulator is used to supply VMP with maximum 3 mA. Supply Structure of the Chip A main benefit of the U4091BM is the easy implementation of various applications due to the flexible system structure of the chip. Possible applications:  Group listening phone  Hands-free phone  Phones which feature ringing with the built-in speaker amplifier  Answering machine with external supply The special supply topology for the various functional blocks is illustrated in Figure 4 on page 7. There are four major supply states: 1. Speech condition: In speech condition, the system is supplied by the line current. If the LIDET -block detects a line voltage above approximately 2 V, the internal signal VLON is acti- vated. This is detected via the serial bus, all the blocks which are needed have to be switched on via the serial bus. For line voltages below 2 V, the switches remain in quiescent state as shown in the diagram. 2. Power down (pulse dialing): When the chip is in power-down mode (Bit LOMAKE), e.g., during pulse dialing, all internal blocks are disabled via the serial bus. In this condition, the voltage regulators and their internal band gap are the only active blocks.

39 MICO Microphone preamplifier output

40 AMPB Input for playback signal of answering machine

41 AMREC Output for recording signal of answering machine

42 STO Output for connecting the sidetone network

43 STC Input for sidetone network

44 STRC Input for sidetone network

Note: 1. The protection device at Pin RECIN is disconnected. L 2R SENSE× CIND RDC R30×()××

In an answering machine, the chip is powered by an external supply via pin VB. switching matrix. This enables the signal to be switched to every desired output. Figure 4. Supply Generator serial bus with either normal or fast read mode. The block RFD is always enabled. Table 1. Threshold Level

5.5 V VMPS

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Table 2. Clock Output Serial Bus Interface The circuit is controlled by an external microcontroller through the serial bus. which is always driven by the microcontr oller, and a bi-directional data-signal line. The data line must be stable when the clock is high. Data must be shifted serially. READ There is a normal and a fast-read cycle. indicator, then an 8-bit word is read out. The U4091BM-N drives the data line. the serial bus (rec. T/CF 46-03). In high gain mode distortion can occur, if AGATX is high and DC mask is low.

Melody/confidence tone frequencies are given in Table 3. between the high and low phases are high impedance phases of 1/6 of the period. Table 3. Status of Melody Generating Table 4. DTMF Frequencies Table 5. DTMF Frequencies Table 6. DTMFF4 in DTMF Mode

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Table 7. DTMF and Melody Frequencies

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Table 8. Names and Functions of the Serial Registers

Table 8. Names and Functions of the Serial Registers (Continued)

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4666B–CORD–08/04 Power-on Reset To avoid undefined states of the system when it is powered on, an internal reset clears the internal registers. The system (U4091BM-N + microcontroller) is woken up by any of the following conditions:  VMP > 2.75 V and VB > 2.95 V  and line voltage (VL)  or ringer (VRING)  or external supply (ES) The power-down of the circuit is caused by a shut-down sent by the serial bus (SD = 1), low-voltage reset or by the watchdog function (see Figure 9 on page 17, Figure 10 on page 18 and Figure 11 on page 18). Watchdog Function To avoid the system operating the microcontroller in a wrong condition, the circuit pro- vides a watchdog function. The watchdog has to be retriggered every second by triggering the serial bus (sending information to the IC or other remote components at the serial bus). If there has been no bus transmission for more than one second, the watchdog initiates a reset. The watchdog provides a reset for the external microcontroller, but does not change the U4091BM-N's registers. Acoustic Feedback Suppression Acoustical feedback from the loudspeaker to the hands-free microphone may cause instability of the system. The U4091BM-N ha s a very efficient feedback-suppression circuit which offers a 4-point- or alternatively a 2-point-signal-sensing topology (see Fig- ure 8 on page 17). Two attenuators (TXA and SAI) reduce the critical loop gain via the serial bus either in the transmit or in the receive path. The overall loop gain remains constant under all operating conditions. The LOGs produce a logarithmically-compressed signal of the TX- and RX-envelope curve. The AFSCON block determines whether the TX or the RX signal has to be attenuated. The voice-switch topology can be selected by the serial bus. In 2-point-sensing mode, AFSCON is controlled directly by the LOG outputs.

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Figure 10. Power-on Reset (Ringing) Figure 11. Power-on Reset (Low Voltage Reset) the dial tone remains at the normally expected full level.

Note: X = do not care; Y = I3 and I4 are not both noise. Table 9. Mode Decision for Signal Sensing

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4666B–CORD–08/04 Term Definitions 1. Transmit means the transmit attenuator is fully on, and the receive attenuator is at maximum attenuation. 2. Receive means the receive attenuator is fully on, and the transmit attenuator is at maximum attenuation. 3. In Idle mode, the transmit and receive attenuator are at half of their maximum attenuation. – Change mode means both the transmit and receive speech are present in approximately equal levels. The attenuators are quickly switched (30 ms) to the opposite mode until one speech level dominates the other. – Idle means speech has ceased in both transmit and receive paths. The attenuators are then slowly switched (1.5 s) to idle mode. 4. Switching to full transmit or receive modes from the idle mode is done at a fast rate (30 ms). Summary of Truth Table 1. The circuit will switch to transmit mode if: – Both transmit level detectors sense higher signal levels than the respective receive level detectors and – The transmit background-noise monitor indicates the presence of speech 2. The circuit will switch to receive mode if: – Both receive level detectors sense higher signal levels than the respective transmit level detectors, and – The receive background-noise monitor indicates the presence of speech 3. The circuit will switch to the reverse mode if: – the level detectors disagree on the relative strengths of the signal levels, and at least one of the background-noise monitors indicates speech. 4. The circuit will switch to idle mode when: – Both speakers are quiet (no speech present), or – When one speaker speech level is continuously overridden by noise at the other speaker's location The time required to switch the circuit between transmit, receive and idle is determined by internal current sources and the capacitor at Pin CT. A diagram of the CT circuitry is shown in Figure 14 on page 21. It operates as follows:  CCT is typically 4.7 µF .  To switch to transmit mode, ITX is turned on (IRX is off), charging the external capacitor to -240 mV below VM. (An internal clamp prevents further charging of the capacitor.)  To switch to receive mode, IRX is turned on (ITX is off), increasing the voltage on the capacitor to +240 mV with respect to VM.  To switch to reverse mode, the current sources ITX, IRX are turned off, and the current source IFI is switched on, discharging the capacitor to VM.  To switch to idle mode, the current sources ITX, IRX, IFI are turned off, and the current source ISI is charging the capacitor to VM.

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Figure 15. Block Diagram Hands-free Mode U4091BM-N 2-point Signal Sensing Figure 16. Block Diagram Hands-free Mode U4091BM-N 4-point Signal Sensing

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Table 10. Input Selection AD Converter

inputs are switched to an output, the sum of the inputs is available at the output. The inputs MIC and LRX have offset cancellers with a 3-dB corner frequency of 270 Hz. Figure 19. Switch Matrix Diagram

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Table 11. Bits and Corresponding Switches

Figure 20. Principle Circuit of Side Tone Balancing DIFF1 via capacitor CK and attenuator AMP1. response of the STB block will represent the frequency curve on line.

  1. LF (gain at low frequency)

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  1. P (the pole position of the low-pass)
  2. SL (sidetone slope; the pole frequency of the high-pass)

Figure 21. Audio Frequency Signal Management U4091BM-N

4666B–CORD–08/04 Absolute Maximum Ratings Parameters Symbol Value Unit Line current I L 140 mA DC line voltage V L 12 V Maximum input current I RING 15 mA Junction temperature T j 125 ° C Ambient temperature T amb -25 to +75 ° C Storage temperature T stg -55 to +150 ° C Total power dissipation, Tamb = 60° CP tot 0.9 W Thermal Resistance Parameters Symbol Value Unit Junction ambient SSO44 R thJA 70 K/W

Electrical Characteristics

f = 1 kHz, 0 dBm = 775 mVrms, IVMIC = 0.3 mA, IMP = 3 mA, RDC = 1.3 MΩ, Tamb = 25°C, Zear = 68 nF + 100 Ω, RLS = 50 Ω, ZM = 68 nF, resonator: f = 3.58 MHz, all bits in reset condition, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit DC Characteristics DC voltage drop-over circuit I L = 2 mA IL = 14 mA IL = 60 mA IL = 100 mA VL 4.4 8.6 1.6 4.8 7.2 9.2 5.2 9.8 V V V V Transmission Amplifier, IL = 14 mA, VMIC = 2 mV, MICG[0:1] = 2, AGATX[0:2] = 7 ERX = ETX = ENMIC = ENSTBAL = I1O1 = I3O3 = 1, (GT = 48 dB) Transmit amplification MICG[0:1] = 2 AGATX[0:2] = 7 GT 45.3 46.5 47.7 dB Frequency response due to internal filters IL ≥ 14 mA, f = 1 kHz to 3.4 kHz ∆GT -1 0 dB Gain change with current I L = 14 mA to 100 mA ∆GT ±0.5 dB Gain deviation T amb = -10° C to +60° C ∆GT ±0.5 dB CMRR of microphone amplifier CMRR 60 80 dB Input resistance of MIC amplifier R i 50 k Ω Input resistance of MIC3 amplifier MICHF = 1 R i 75 150 300 k Ω Gain difference between MIC1, MIC2 to MIC3 MICHF = 1 ∆GT ±0.4 dB Distortion at line I L ≥ 14 mA, VL = 700 mVrms dt 2% Maximum output voltage I L ≥ 19 mA, d < 5%, VMIC = 10 mV CTXA = 1 µF , DBM5 = 0 VLmax 1.8 3.0 4.2 dBm DBM5 = 1 V Lmax 4.8 6.0 6.6 dBm VMIC = 20 mV , MICG[0:1] = 3 V MICOmax -4.2 dBm Note: 1. This is a space of time where the bus must be from data transmission and before a new transmission can be started

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4666B–CORD–08/04 Noise at line phosphometrically weighted IL ≥ 14 mA, MICG[0:1] = 2 AGATX[0:2] = 7 no - 73 - 70 dBmp Anti-clipping: attack time release time CTXA = 1 µF each 3 dB overdrive ta tr ms ms Gain at low operating current I L = 8 mA, IMP = 1 mA VMIC = 0.5 mV IVMIC = 300 µA GT 45 48 dB Distortion at low operating current IL = 8 mA, IMP = 1 mA VMIC = 5 mV IVMIC = 300 µA dt 5% Receiving Amplifier IL = 14 mA, VGEN = 300 mV, ERX = ETX = ENMIC = ENSTBAL = I1O1 = I3O3 = 1, SL[0:1] = 0, LF[0:3] = 1, P[0:4] = 31, AFS[0:5] = 54, AGARX[0:2] = 0 Adjustment range of receiving gain Single ended, IL ≥ 14 mA, Mute = 1, EA[0:4] = 2 - 31 AGARX[0:2] = 0 - 7 GR -19 +17 dB Receiving amplification Differential AGARX[0:2] = 0 EA[0:4] = 15 EA[0:4] = 31 G R 14.7 15.7 16.7 dB dB Frequency response I L ≥ 14 mA, f = 1 kHz to 3.4 kHz ∆GRF -1 0 dB Gain change with current I L = 14 to 100 mA ∆GR ±0.5 dB Gain deviation T amb = -10 to +60° C ∆GR ±0.5 dB Ear protection differential I L ≥ 14 mA, VGEN = 11 Vrms EA[0:4] = 15 EP 3 V rms MUTE suppression (earpiece disconnect from matrix) IL = 14 mA, I303 = 0 ∆GR 60 dB Output voltage d < 2% differential IL = 14 mA Zear = 68 nF + 100 Ω EA[0:4] = 11 0.775 V rms Maximum output current d < 2% Zear = 100 Ω EA[0:4] = 31 Iout 4m A p Receiving noise phosphometrically weighted IL = 14 mA Zear = 68 nF + 100 Ω EA[0:4] = 15 - 79 - 76 dBmp Side tone suppression Z = 600 Ω 20 dB Output resistance Each output against GND Ro 10 Ω Gain at low operating current (receive only) IL = 6.5 mA, IMP = 1 mA IM = 300 mA VGEN = 200 mV EA[0:4] = 21, ENMIC = ETX = I101 = 0 G R -2 0 2 dB Electrical Characteristics (Continued) f = 1 kHz, 0 dBm = 775 mVrms, IVMIC = 0.3 mA, IMP = 3 mA, RDC = 1.3 MΩ, Tamb = 25°C, Zear = 68 nF + 100 Ω, RLS = 50 Ω, ZM = 68 nF, resonator: f = 3.58 MHz, all bits in reset condition, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Note: 1. This is a space of time where the bus must be from data transmission and before a new transmission can be started

4666B–CORD–08/04 Distortion at low operating current IL = 6.5 mA, IMP = 1 mA IM = 300 µA, EA[0:4] = 15, ENMIC = ETX = I101 = 0 dR 5 % Adjustment step: earpiece amplifier ∆EA[0:4] = 1 Adjustment step: AGARX ∆AGARX[0:2] = 1 0.8 1 1.2 dB Gain for DTMF signal AMPB Æ RECO1/2 EA[0:4] = 1 -10 dB AC impedance IMPH = 0 IMPH = 1 Zimpl Zimph 595 980 625 1030 655 1080 Ω Ω DTMF, IL = 14 mA, ETX = I201 = 1, AGATX[0:2] = 7, DTMFM[0:2] = 4, DTMFF[0:4] = 0 DTMF level at line (mid gain) Sum level, 600 Ω, DTMF level at line (low gain) Sum level, 600 Ω, DTMF level at line (high gain) Sum level, 600 Ω, DTMFM[0:2] = 6 AGATX[0:2] = 1 -5.2 -3.7 -2.2 dBm Pre-emphasis 600 Ω, DTMFF4 = 0 DTMFF4 = 1 2.5 3.5 dBm dBm Speaker Amplifier, Differential Mode AMPB → SAO1/2 ENSACL = ENSA = ENSAO = ENAM = I4O2 = 1, SA[0:4] = 31, ERX = ETX = ENMIC = ENSTBAL = I1O1 = I3O3 = 1 Minimum line current for operation ENAM = I4O2 = 0 SE = 0, I3O2 = 1 IMP 1 mA, V GEN = 300 mV ILmin 11 mA Gain from AMPB to SAO V AMPB = 3 mV, IL = 15 mA, SA[0:4] = 31 SA[0:4] = 0 GSA 36 37 -5.5 38 dB Adjustment step speaker amplifier ∆SA[0:4] = -1 1.15 1.35 1.55 dB Output power single ended Load resistance: RLS = 50 Ω, d < 5% VAMPB = 40 mV , SE = 1 IL = 15 mA IL = 20 mA PSA PSA 3 7 mW mW Maximum output power differential Load resistance: RL = 50 Ω, d < 5% VAMPB = 60 mV , SE = 0 VB = 5 V PSA 150 mW Output noise (input AMPB open) phosphometrically weighted IL > 15 mA nSA 240 mV psoph Gain deviation I L = 15 mA Tamb = -10 to +60° C ∆GSA ±1 dB Electrical Characteristics (Continued) f = 1 kHz, 0 dBm = 775 mVrms, IVMIC = 0.3 mA, IMP = 3 mA, RDC = 1.3 MΩ, Tamb = 25°C, Zear = 68 nF + 100 Ω, RLS = 50 Ω, ZM = 68 nF, resonator: f = 3.58 MHz, all bits in reset condition, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Note: 1. This is a space of time where the bus must be from data transmission and before a new transmission can be started

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4666B–CORD–08/04 Mute suppression I L = 15 mA, VL = 0 dBm, VAMPB = 4 mV I4O2 = 0 VSAO -56 dBm Gain change with current I L = 15 to 100 mA ∆GSA 1d B Gain change with frequency I L = 15 mA f = 1 kHz to 3.4 kHz ∆GSA -1 0 dB Attack time of anti-clipping 20 dB overdrive t r 2m s Release time of anti-clipping t f 170 ms Adjustment step of charge current ENSAO = 0, SE = 1 ∆LSCUR[0:1] = 1 -480 -400 -320 µA Adjustment step of discharge current ENSAO = 0, SE = 0 ∆LSCUR[0:1] = 1 320 400 480 µA Charge current Pin SAO2 ENSAO = 0, SE = 1 LSCUR[0:1] = 3 ICHA - 1 . 4 5- 1 . 2- 0 . 9 5m A Discharge current Pin SAO2 ENSAO = 0, SE = 0 LSCUR[0:1] = 3 IDIS 0.95 1.2 1.45 mA Microphone Amplifier, VB = 5 V, VMIC = 2 mV, VMIC3 = 2 mV, ENMIC = ENAM = I1O4 = 1, MICHF = 0 Gain MIC amp.: MIC1/2 Æ AMREC MICG[0:1] = 0 17.4 18.1 18.8 dB MICG[0:1] = 1 23.2 23.7 24.6 dB MICG[0:1] = 2 29.1 29.8 30.5 dB MICG[0:1] = 3 35.0 35.7 36.4 dB MIC3 to AMREC MICHF = 1, MICG[0:1] = 3 35.0 35.7 36.5 dB Input suppression: MIC3 to MIC1/2 MICG[0:1] = 0, MICHF = 0 60 dB MIC1/2 to MIC3 MICHF = 1 60 dB Settling time offset-cancellers 5 τ , FOFFC = 0 9 12 ms Settling time offset-cancellers in speed-up mode 5 τ , FOFFC = 1 1.8 2.4 ms AGC for Answering Machine, AMPB to AMREC, ENAM = ENAGC = I4O5 = I5O4 = 1 Nominal gain V AMPB = 5 mV 23.5 25.5 27.5 dB Maximum output level V AMPB = 50 mV , d< 5% 240 300 360 mVp Attack time 20 dB overdrive 1 ms Release time 45 ms Switching Matrix, VL = 0, VB = 5 V, ENAM = I4O4 = 1, VAMPB = 0.6 Vrms Input impedance AMPB 50 60 70 k Ω Gain AMPB to AMREC -0.7 -0.3 0.1 dB Electrical Characteristics (Continued) f = 1 kHz, 0 dBm = 775 mVrms, IVMIC = 0.3 mA, IMP = 3 mA, RDC = 1.3 MΩ, Tamb = 25°C, Zear = 68 nF + 100 Ω, RLS = 50 Ω, ZM = 68 nF, resonator: f = 3.58 MHz, all bits in reset condition, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Note: 1. This is a space of time where the bus must be from data transmission and before a new transmission can be started

4666B–CORD–08/04 Maximum input level AMPB I4O5 = I5O4 = 1, I4O4 = 0 600 mV Maximum output level AMREC I4O4 = 1 VB- 600 mV VPP Offset I4O4: 1 to 0 ∆VAMREC ±30 mV Mute switching matrix I4O4 = 0 60 dB Power-on Reset VL = 0, VMP = 3.3 V, VB = 5 V, U4091 in Power-down Mode Power-on reset by ES VB high, VMP threshold VB = 4 V, ES = 4 V, rise VMP until RESET goes to low VMPon 2.65 2.75 2.85 V Power-on reset by ES VMP high, VB threshold VMP = 3 V , ES = 4 V , rise VB until RESET goes to low VBon 3.2 V Low-voltage Interrupt VL = 0, VMP = 3.3 V, VB = 0 V VMP decreasing Decrease VMP until INT returns to high VLVI 2.5 2.6 2.7 V Power-off Reset VL = 0, VMP = 3.3 V, VB = 0 V Low-voltage reset Decrease VMP until RESET returns to low VLVR 2.35 2.45 2.55 V Difference voltage between low- voltage interrupt and reset VLVI - VLVR 100 150 mV Logical Part VMP = 3.3 V, VB = 5 V Output impedance at OSCOUT 0.6 0.9 1.2 k Ω Pins SCL, SDA (input mode) Input leakage current Low level High level 0 < V i < VMP 0.8 × VMP 0.2 × VMP V V µA Pins INT, SDA (output mode) Output low (resistance to GND) 150 230 350 Ω Switch for Additional Impedance (Pin IMPSW) VMP = 3.3 V, VB = 3 V Switch-off leakage current 0 < V i < VMP IMPSW = 0 -0.5 5 µA Resistance to GND IMPSW = 1 50 80 Ω Maximum current IMPSW = 1 -5 5 mA AFS (Acoustic Feedback Suppression), IL = 14 mA, VGEN = 300 mV, ERX = ETX = ENMIC = ENSTBAL = I1O1 = I3O3 = 1, SL[0:1] = 0, LF[0:3] = 1, P[0:4] = 31, AGARX[0:2] = 0 Adjustment range of attenuation I L ≥ 15 mA 0 50 dB Attenuation of transmit gain I L ≥ 15 mA, IINLDT = 0 µA IINLDR = 10 µA ∆GT 47 50 53 dB Attenuation of speaker amplifier I L ≥ 15 mA, IINLDT = 10 µA IINLDR = 0 µA GSA 47 50 53 dB Electrical Characteristics (Continued) f = 1 kHz, 0 dBm = 775 mVrms, IVMIC = 0.3 mA, IMP = 3 mA, RDC = 1.3 MΩ, Tamb = 25°C, Zear = 68 nF + 100 Ω, RLS = 50 Ω, ZM = 68 nF, resonator: f = 3.58 MHz, all bits in reset condition, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Note: 1. This is a space of time where the bus must be from data transmission and before a new transmission can be started

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4666B–CORD–08/04 Supply Voltages, VMIC = 25 mV, Tamb = - 10 to + 60° C VMP IL = 14 mA, RDC = 680 kΩ IMP = 3 mA VMP 3.1 3.3 3.5 V VMPS IL = 100 mA, RDC = inf., IMP = 0 mA VMPS 5.5 V VMIC IL = 14 mA, RDC = 1.3 MΩ IM = 700 A VMIC 1.5 4 V VB IB = +20 mA, IL = 0 mA V B 5.5 6.3 V Ringing Power Converter, IMP = 1 mA, IM = 0 RIMPA = 500 kΩ Maximum output power V RING = 20.6 V ENSA = ENSAO = SE = 1 PSA 15 mW Threshold V RING: high to low 7.4 V low to high, RINGTH [0:3] = 0 6.0 6.7 7.4 V low to high, RINGTH [0:3] = 15 19 21 23 V Adjustment steps threshold DRINGTH = 1 0.8 1 1.2 V Input impedance V RING = 30 V 4.6 5.8 7.0 k Ω Maximum input voltage V RINGmax 30 V Serial Bus SCL, SDA, AS, VMP = 3.3 V, RSDA = RSCL = RINT = 12 kΩ Input voltage HIGH LOW SDA, SCL, INT V iBUS 3.0 VDD 1.5 V V Output voltage Acknowledge LOW SDA ISDA = 3 mA V O 0.4 V Clock frequency SCL f SCL 100 kHz Rise time SDA, SCL t r 1µ s Fall time SDA, SCL t f 300 ns Period of SCL HIGH LOW HIGH LOW t H tL 4.0 4.7 µs µs Setup Time Start condition Data Stop condition Time space (1) tsSTA tsDAT tsSTOP twSTA 4.7 250 4.7 4.7 µs ns µs µs Hold Time Start condition DATA thST A thDAT 4.0 µs µs Electrical Characteristics (Continued) f = 1 kHz, 0 dBm = 775 mVrms, IVMIC = 0.3 mA, IMP = 3 mA, RDC = 1.3 MΩ, Tamb = 25°C, Zear = 68 nF + 100 Ω, RLS = 50 Ω, ZM = 68 nF, resonator: f = 3.58 MHz, all bits in reset condition, unless otherwise specified. Parameters Test Conditions Symbol Min. Typ. Max. Unit Note: 1. This is a space of time where the bus must be from data transmission and before a new transmission can be started

Figure 22. Basic Test Circuit

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Figure 23. Test Circuit for Ringing

4666B–CORD–08/04 Bus Timing Figure 24. Bus Timing Diagram

Package Information

P thSTA tf tH tsSTA tsSTOP P = Stop, S = Start thDAT

Ordering Information

Extended Type Number Package Remarks U4091BM-NFN SSO44 Tube U4091BM-NFNG3 SSO44 Taped and reeled T4091N-DDB Die Die on foil technical drawings according to DIN specifications Dimensions in mm 0.25 0.10 0.3 0.8 18.05 17.80 16.8 2.35 9.15 8.65 7.50 7.30 10.50 10.20 0.25 44 23 1 22

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Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Memory San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602

44306 Nantes Cedex 3, France

13106 Rousset Cedex, France

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 RF/Automotive Theresienstrasse 2 Postfach 3535

74025 Heilbronn, Germany

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123

38521 Saint-Egreve Cedex, France

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