U4082B-MFLG3G

U4082B ATMEL | Alldatasheet

Document overview

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Technical content

Features

• Low-voltage Operation 3V to 6.5V  Attenuator Gain Range Between Transmit and Receive: 52 dB  Four-point Signal Sensing for Improved Sensitivity  Monitoring System for Background Noise Level  Adjustable Microphone Amplifier Gain  Mute Function  Chip Disable for Active/Standby Operation  On-board Filter  Dial Tone Detector  Compatible with U4083B Speaker Amplifier Benefits  Fast Channel Switching Allows Quasi-duplex Operation  Proper Operation in Noisy Surroundings 1. Description The low-voltage voice-switched speakerphone circuit, U4082B, incorporates a wide range of functions. The versatility of the device is further enhanced by giving access to internal circuit points. The block diagram (see Figure 1-1 ) shows amplifiers, level detectors, transmit and receive attenuators operating in complementary functions, background noise monitors, chip disable, dial tone detector and mute function. Due to low-voltage operation, the device can be operated either by a low supply or via a tele- phone line requiring 5.5 mA typically. Sta nd-alone operation is enabled by a coupling transformer (Tip and Ring) or in conjunction with a handset speech network, as shown in Figure 1-2 on page 2. Figure 1-1. Block Diagram 1011 Level Detectors 3 400 Ω 15 14 Attenuator Control AGC T Attenuator- 98 7 Dial Tone Detector 20 22 21 13 26 1 2+1 Filter R Attenuator U4082B Background Noise Monitor Background Noise Monitor Level Detectors PD HTO+ HTO- CD HTI FI TLI2 CPT RI VCI MIC MUTE MICO TI TO CTVB TLI1 RLI2 RECO RLO1 GND RLO2 TLO1 RLI1 TLO2 CPR VS VB VB VB VS VB Low-voltage Voice-switched IC for Hands-free Operation U4082B Rev. 4743D–CORD–03/06

4743D–CORD–03/06 U4082B Figure 1-2. Block Diagram with External Circuit MICO M IC BackgroundNoise Monitor MUTE 12 16 C PT 47 µF 18 19 TLO RLO 2 4 GND C D TLI2 0.1 µF 270 pF 20 µF0.2 µF 0.02 µF 5.1V 1N4 733 Attenuato r ControlAGC T Attenuator - + TI TO H TI - + 0.1 µF - + Dial ToneDetector RLI2 REC O RI V C I LevelDetectorBackgroundNoise Monitor 5 H TO 27 C PR

23 TLI1

25 RLO

24 TLO

0.05 µF 0.1 µF BalancingNetwork 0.01 µF HookSwitch 100 k Ω 47 µF Tip Ring V S 220 µ F 5 µF + +- - 8 5 0.05 µF 200 pF RLI1 FO 2 FI Filter 0.05 µF 0. 1 µF Volume Co ntrol 0 k Ω 4700 pF 4700 pF H TO R At tenuator LevelDetector 0.1 µF 0.1 µF U4082B U4083B V B2 µF2 µF5.1 k Ω 300 Ω 820 Ω 51 k Ω 10 k Ω 5.1 k Ω 180 k Ω 5.1 k Ω 620 Ω 1 k Ω V B 0 k Ω 2 µF 2 µF µF V S VS V B 120 k Ω C T 5.1 k Ω 110 k Ω 10 k Ω 10 k Ω V B 20 k Ω 9.1 k Ω k Ω V B V B V B V S V B 400 Ω

4743D–CORD–03/06 U4082B 2. Pin Configuration Figure 2-1. Pinning SO28 1712 HTO- HTI TO TI MICO MIC VS HTO+ MUTE CD FI FO TLI1 RECO RI RLI2 RLO2 TLO2 RLO1 TLO1 TLI2 RLI1 CPR GND 1514 13VCI CT CPT VB Table 2-1. Pin Description Pin Symbol Function 1 FO Filter output. Output impedance is less than 50 Ω 2 FI Filter input. Input impedance is greater than 1 M Ω 3C D Chip disable. A logic low (< 0.8V) sets normal operation. A logic high (> 2V) disables the IC to conserve power. Input impedance is nominally 90 kΩ 4V S Supply voltage 2.8V to 6.5V, approximately 5 mA. AGC circuit reduces the receive attenuator gain at 25 dB, receive mode at 2.8V 5H T O + Output of the second hybrid amplifier (Hybrid output). Gain is internally set at –1 to provide a differential output, (in conjunction with HTO–) to the hybrid transformer 6 HTO– Output of the first hybrid amplifier. Hybrid output. Gain is set by external resistors 7 HTI Input and summing node for the first hybrid amplifier. DC level is approximately V B 8 TO Transmit attenuator output. DC level is approximately V B 9 TI Transmit attenuator input. Maximum signal level is 350 mVrms. Input impedance is approximately 10 k Ω 10 MICO Microphone amplifier output. Gain is set by external resistors 11 MIC Microphone amplifier input. Bi as voltage is approximately V B 12 MUTE Mute input. A logic low (< 0.8V) sets normal operation. A logic high (> 2V) mutes the microphone amplifier without affecting the rest of the circuit. Input impedance is nominally 90 kΩ 13 VCI Volume control input. When VCI = VB, the receive attenuator is at maximum gain when in receive mode. When VCI = 0.3 VB, the receive gain is down 35 dB. It does not affect the transmit mode 14 CT Response time. An RC at this pin sets the response time for the circuit to switch modes

4743D–CORD–03/06 U4082B 3. Introduction

3.1 General

The fundamental difference between the operation of a speakerphone and a handset is that of half duplex versus full duplex. The handset is full duplex si nce conversation can occur in both directions (transmit and receive) simultaneously. A speakerphone has higher gain levels in both paths, and attempting to converse in full-du plex mode results in oscilla tory problems due to the loop that exists within the system. The loop is formed by the receive and transmit paths, the hybrid and the acoustic coupling (speaker to microphone). The only practical and economical solution used to date is to design the speakerphone to oper- ate in half-duplex mode. That is, only one person s peaks at a time, while the other listens. To achieve this, a circuit is required which can detect who is talking, switch on the appropriate path (transmit or receive), and switch off (attenuate) the other path. In this way, the loop gain is main- tained less than unity. When the talkers exchange functions, the circuit must quickly detect this, and switch the circuit appropriately. By providing speech-level detectors, the circuit operates in a “hands-free” mode, eliminating the need for a “push-to-talk” switch. The handset has the same loop as the speake rphone. Oscillations do not occur because the gains are considerably lower and the coupling f rom the earpiece to the mouthpiece is almost nonexistent (the receiver is normally held against a person's ear). The U4082B provides the necessary level detec tors, attenuators, and switching control for a properly operating speakerphone. The detection s ensitivity and timing are externally controlla- ble. Additionally, the U4082B provides background noise monitors (which make the circuit insensitive to room and line noise), hybrid amplifiers for interfacing to Tip and Ring, the micro- phone amplifier, and other associated functions. 15 VB Output voltage ≈ VS/2. It is a system AC ground and biases the volume control. A filter cap is required

16 CPT An RC at this pin sets the time constant for the transmit background monitor

17 TLI2 Transmit level detector input on the microphone/speaker side

18 TLO2 Transmit level detector output on the microphone/speaker side, and input to the transmit background monitor

19 RLO2 Receive level detector output on the microphone/speaker side

20 RLI2 Receive level detector input on the microphone/speaker side

21 RI Input receive attenuator and dial tone detector. Maximum input level is 350 mVrms. Input impedance is approximately 10 kΩ 22 RECO Receive attenuator output . DC level is approximately V B

23 TLI1 Transmit level detector input on the line side

24 TLO1 Transmit level detector output on the line side

25 RLO1 Receive level detector output on the line side and input to the receive background monitor

26 RLI1 Receive level detector input on the line side

27 CPR An RC at this pin sets the time constant for the receive background monitor

28 GND Ground

Table 2-1. Pin Description (Continued) Pin Symbol Function

4743D–CORD–03/06 U4082B

3.2 Transmit and Receive Attenu ators TI, TO and RI, RECO

The attenuators are functionally complementary; that is, when one is at maximum gain (+6.0 dB), the other is at maximum attenuation (–4 6 dB), and vice versa. Neither is ever fully on or off. The sum of their gains remains constant (within a nominal error band of ±0.1 dB) at a typ- ical value of –40 dB (see Figure 7-1 on page 17 ). Their purpose is to control the transmit and receive paths to provide the half-duplex operation required in a speakerphone. The non-inverting attenuators have a –3.0 dB (from maximum gain) frequency of approximately 100 kHz. The input impedance of each attenuator (TI and RI) is nominally 10 k Ω (see Figure 3-1). To prevent distortion, the input signal should be limited to 350 mVrms. The maximum recommended input signal is independent of the volume control setting. The diode clamp on the inputs limits the input swing, and thus the maximum negative output swing. This results in a specific V RECO and VTOL definition as given in the table “Electrical Characteristics” on page 14. The output impedance is less than 10Ω until the output current limit (typically 2.5 mA) is reached. Figure 3-1. Attenuator Input Stage The attenuators are controlled by the single output of the control block, which is measurable at pin CT (pin 14). When pin C T is at +240 mV with respect to V B, the circuit is in receive mode (receive attenuator is at +6.0 dB). When pin CT is at –240 mV with respect to V B, the circuit is in transmit mode (transmit attenuator is at +6.0 dB). The circuit is in an idle mode when the C T voltage is equal to VB causing the attenuators' gain to be halfway between their fully on and fully off positions (–20 dB each). Monitoring the C T voltage (with respect to V B) is the most direct method of monitoring the circuit's mode. The attenuator control has seven inputs: two from the comparators operated by the level detec- tors, two from the background noise monitors, volume control, dial-tone detector, and AGC. They are described in the sections that follow.

3.3 Level Detectors

There are four level detectors, two on the receive side and two on the transmit side. As shown in Figure 3-2 on page 6 , the terms in parentheses form one system, and the other terms form the second system. Each level detector is a high-gain amplifier with back-to-back diodes in the feed- back path, resulting in nonlinear gain which permits operation over a wide dynamic range of speech levels. Refer to the graphs of Figures 7-2, 7-3 and 7-4 on page 18 for their DC and AC transfer characteristics. The sensitivity of each level detector is determined by the external resis- tor and capacitor at each input (TLI1, TLI2, RLI1 , and RLI2). Each output charges an external capacitor through a diode and limiting resistor, thus providing a DC representation of the input AC signal level. The outputs have a quick rise time (determined by the capacitor and an internal 350Ω resistor) and a slow decay time set by an in ternal current source and the capacitor. The capacitors on the four outputs should have the same value (±10%) to prevent timing problems. As can be seen in Figure 1-2 on page 2, on the receive side, one level detector (RLI1) is located at the receive input, receiving the same signal as at Tip and Ring, and the other (RLI2) is at the 11 kΩ VB RI 21 TI 9 to Attenuator Input 5 kΩ 95 kΩ

4743D–CORD–03/06 U4082B output of the speaker amplifier. On the transmit side, one level detector (TLI2) is at the output of the microphone amplifier, while the other (TLI1) is at the hybrid output. The outputs RLO1 and TLO1 feed a comparator, whose output is fed to the attenuator control block. Likewise, outputs RLO2 and TLO2 feed a second comparator which also goes to the attenuator control block. The truth table for the effects of the level detectors is given in the section “Attenuator Control Block” on page 8.

3.4 Background Noise Monitors

This circuit distinguishes speech (which consis ts of bursts) from background noise (a relatively constant signal level). There are two background noise monitors, one for the receive path and the other for the transmit path. The receive background noise monitor is operated by the RLI1-RLO1 level detector, while the transmit background noise monitor is operated by the TLI2-TLO2 level detector (Figure 3-2). They monitor the background noise by storing a DC voltage representative of the respective noise levels in capacitors at CPR and CPT. The voltages at these pins have slow rise times (determined by the external RC), but fast decay times. If the signal at RLI1 (or TLI2) changes slowly, the voltage at CPR (or CPT) will remain more positive than the voltage at the non-invert- ing input of the monitor's output comparat or. When speech is present, the voltage on the non-inverting input of the comparator will rise more quickly than the voltage at the inverting input (due to the burst characteristic of speech), causing its output to change. This output is sensed by the attenuator control block. Figure 3-2. Level Detectors The 36 mV offset at the comparator's input keeps the comparator from changing state unless the speech level exceeds the background noise by approximately 4.0 dB. The time constant of the external RC (approximately 4.7s) determines the response time to background noise variations. VS (TLI2) RLI1 (17) 26 0.1 µF Level detector (TLO2) RLO1 36 mV 350Ω Signal input 4 µA 0.1 µF Signal input Level detector Background noise monitor (RLI2) TLI1 (20) 23 TLO1 24 (19) To attenuator control block Comparator C2 (C1) C4 (C3) (CPT) CPR (16) 100 kΩ (18)25 2 µF 4 µA 47 µF 2 µF (RLO2) 56 kΩ 33 kΩ VB 350Ω5.1 kΩ VB VB 5.1 kΩ

4743D–CORD–03/06 U4082B

3.5 Volume Control

The volume control input at VCI (pin 13) is sensed as a voltage with respect to V B. It affects the attenuators in receive mode only and has no effect during idle or transmit mode. In receive mode, the attenuator receive gain, G R, is +6.0 dB, and attenuator transmit gain G T is –46 dB under the condition that VCI = V B. When VCI < V B, the attenuator receive gain is reduced (Figure 7-5 on page 19 ), whereas the attenuator transmit gain is increased; their sum, however, remains constant. Voltage deviation at VCI changes the voltage at C T, which in turn controls the attenuators (see section “Attenuator Control Block” on page 8). The volume control setting does not affect the maximum attenuator input signal at which notice- able distortion occurs. The bias current at VCI is typically –60 nA. It does not vary significantly with the VCI voltage or supply voltage VS.

3.6 Dial Tone Detector

The dial tone detector is a comparator with one side connected to the receive input (RI) and the other to VB with a 15 mV offset (see Figure 3-3). If the circuit is in idle mode, and the incoming signal is greater t han 15 mV (10 mVrms), t he comparator's output w ill change, disabling the receive idle mode. The receive attenuator will then be at a setting determined mainly by the vol- ume control. This circuit prevents the dial tone (which would be considered as continuous noise) from fading away as the circuit would have the tendency to switch to idle mode. By disabling the receive idle mode, the dial tone remains at the normally-expected full level. Figure 3-3. Dial Tone Detector

3.7 AGC

The AGC circuit affects the circuit only in receive mode, and only when the supply voltage is less than 3.5V. As VS < 3.5V, the gain of the receive attenuator is reduced as seen in Figure 7-6 on page 19. The transmit path attenuation changes such that the sum of the transmit and receive gains remains constant. The purpose of this feature is to reduce the power (and current) used by the speaker when a line-powered speakerphone is connected to a long line where the available power is limited. By reducing the speaker power, the voltage sag at V S is controlled, preventing possible erratic operation. To attenuator controlC4 VB To R attenuator 15 mV RI

4743D–CORD–03/06 U4082B

3.8 Attenuator Control Block

The attenuator control block has seven inputs:  The output of the comparator operated by RLO2 and TLO2 (microphone/speaker side) – designated C1  The output of the comparator operated by RLO1 and TLO1 (Tip/Ring side) – designated C2  The output of the transmit background noise monitor – designated C3  The output of the receive background noise monitor – designated C4  The volume control  The dial tone detector  The AGC circuit The single output of the control block controls the two attenuators. The effect of C1 to C4 is as follows:

3.9 Term Definitions

 “Transmit” means the transmit attenuator is fully on (+6.0 dB), and the receive attenuator is at maximum attenuation (–46 dB).  “Receive” means both attenuators are controlled by the volume control. At maximum volume, the receive attenuator is fully on (+6.0 dB), and the transmit attenuator is at maximum attenuation (–46 dB).  “Fast Idle” means both transmit and receive speech are present in approximately equal levels. The attenuators are quickly switched (30 ms) to idle mode until one speech level dominates the other.  “Slow Idle” means speech has ceased in both transmit and receive paths. The attenuators are then slowly switched (1s) to idle mode.  Switching to full transmit or receive mode from any other mode is at the fast rate ( ≈ 30 ms). Table 3-1. Mode Selection Table Inputs Output ModeC1 C2 C3 C4 T T 1 X Transmit TRYY F a s t I d l e RTYY F a s t I d l e RRX1 R e c e i v e TT0X S l o w I d l e TR00 S l o w I d l e RT00 S l o w I d l e RRX0 S l o w I d l e Note: X = Do not care; Y = C3 and C4 are not both 0.

4743D–CORD–03/06 U4082B

3.10 Summary of the Truth Table

 The circuit will switch to transmit if - both transmit level detectors sense higher signal levels relative to the respective receive level detectors (TLI1 versus RLI1, TLI2 versus RLI2), and - the transmit background noise monitor indicates the presence of speech.  The circuit will switch to receive if - both receive level detectors sense higher signal levels relative to the respective transmit level detectors, and - the receive background noise monitor indicates the presence of speech.  The circuit will switch to fast idle mode if the level detectors disagree on the relative strengths of the signal levels, and at least one of the background noise monitors indicates speech. For example, referring to the block diagram (Figure 1-2 on page 2), if there is a sufficient signal at the microphone amp output (TLI2) to override the speaker signal (RLI2) and there is sufficient signal at the receive input (RLI1) to override the signal at the hybrid output (TLI1), and either or both background monitors indicate speech, then the circuit will be in fast idle mode. Two conditions that can cause fast idle mode: - when both talkers are attempting to gain control of the system by talking at the same time, and - when one talker is in a very noisy environment, forcing the other talker to continually override that noise level. In general, fast idle mode will occur infrequently.  The circuit will switch to slow idle mode when - both talkers are quiet (no speech present), or - when one talker's speech level is continuousl y overridden by noise at the other speaker's location. The time required to switch the circuit between transmit, receive, fast idle and slow idle is determined in part by the components at pin 14 (see the section on switching times for a more complete explanation of the switching time components). A diagram of the C T circuitry is shown in Figure 3-4, and operates as follows: Figure 3-4. CT Attenuator Control Block Circuit Attenuator control +2 kΩ Volume control Dial tone detector AGC 60 µA To attenuators C1 to C4 VB RT CT CT

4743D–CORD–03/06 U4082B –R T is typically 120 kΩ, and CT is typically 5.0 µF . – To switch to receive mode, I1 is turned on (I2 is off), charging the external capacitor to +240 mV above VB. (An internal clamp prevents further charging of the capacitor.) – To switch to transmit mode, I2 is turned on (I1 is off), bringing down the voltage on the capacitor to –240 mV with respect to VB. – To switch to idle mode quickly (fast idle), the current sources are turned off, and the internal 2 kΩ resistor is switched on, discharging the capacitor to VB with a time constant of 2 kΩ × CT. – To switch to idle mode slowly (slow idle), the current sources are turned off, the switch at the 2 kΩ resistor is open, and the capacitor discharges to VB through the external resistor, RT, with a time constant of = RT × CT.

3.11 Microphone Amplifier

The microphone amplifier (pins 10, 11) has the non-inverting input internally connected to V B, while the inverting input and the output are pinned out. Unlike most operational amplifiers, this amplif ier has an all-NPN output stage which maximizes phase margin and gain bandwidth. This feature ensures stability at gains less than unity, as well as with a wide range of reactive loads. The open loop gain is typically 80 dB (f < 100 Hz), and the gain-bandwidth is typically 1.0 MHz (see Figure 7-7 on page 19). The maximum peak-to-peak output swing is typically (VS – 1V) with an output impedance of < 10 Ω until current limiting is reached (typically 1.5 mA). Input bias cur- rent at MIC is typically –40 nA. Figure 3-5. Microphone Amplifier and Mute 75 kΩ VS MIC MUTE From microphone MICO 90 kΩ VB VS RMF RMI

4743D–CORD–03/06 U4082B

3.12 Hybrid Amplifiers

The two hybrid amplifiers (at HTO+, HTO–, and HTI), in conjunction with an external trans- former, provide the two-to-four-wire converter for interfacing to the telephone line. The gain of the first amplifier (HTI to HTO–) is set by external resistors (gain = –R HF / RHI in Figure 1-2 on page 2), and its output drives the second amplifier, the gain of which is internally set at –1.0. Unlike most operational amplifiers, these amplif iers have an all-NPN output stage, which maxi- mizes phase margin and gain bandwid th. This feature ensures stability at gains less than unity, as well as with a wide range of reactive loads. The open-loop gain of the first amplifier is typically 80 dB, and the gain bandwidth of each amplifier is approximately 1.0 MHz (see Figure 7-6 on page 19). The maximum output swing (peak to peak) of each amplifier is typically 1.2V less than V S with an output impedance of < 10 Ω until current limiting is reac hed (typically 8.0 mA). The output current capability is guaranteed to be a minimum of 5.0 mA. The bias current at HTI is typically –30 nA. The connections to the coupling transformer are shown in Figure 1-1 on page 1 . Balancing the network is necessary to match the line impedance.

3.13 Filter

The operation of the filter circuit is determined by the external components. The circuit within the U4082B from pins FI to FO is a buff er with a high input impedance (> 1 M Ω) and a low output impedance (< 50 Ω). The configuration of the external components determines whether the cir- cuit is a high-pass filter (as shown in Figure 1-2 on page 2 ), a low-pass filter, or a band-pass filter. As a high-pass filter, with the components shown in Figure 3-6 on page 12, the filter will keep out the 60Hz (and 120Hz) hum which can be picked up by the external telephone lines. As a low-pass filter (Figure 3-7 on page 12), it can be used to roll off the high-end frequencies in the receive circuit, which aids in protecting against acoustic feedback problems. With an appropriate choice of an input coupling capacitor to the low-pass filter, a band-pass filter is formed.

4743D–CORD–03/06 U4082B

3.14 Power Supply, V B, and Chip Disable

The power supply voltage at pin 4 (V S) is between 3.5V and 6.5V for normal operation, but reduced operation is possible down to 2.8V (see Figure 7-6 on page 19 and section “AGC” on page 7). The power supply current is shown in Figure 7-9 on page 20 for both power-up and power-down mode. The output voltage at VB (pin 15) is approximately (VS – 0.7) / 2, and provides the AC ground for the system. The output impedance at V B is approximately 400 Ω (see Figure 7-10 on page 20 ), and in conjunction with the external capacitor at V B, forms a low-pass filter for power supply rejection. Figure 7-11 on page 21 gives an indication of the amount of rejection with different capacitors. The capacitor value depends on whether the circuit is powered by the telephone line or a power supply. Since VB biases the microphone and hybrid amplifiers, the amount of supply rejection at their outputs is directly related to the rejection at VB, as well as their respective gains. Figure 8-1 on page 22 depicts this graphically. The chip disable (CD, pin 3) permits powering down the IC to conserve power and/or for muting purposes. With CD < 0.8V, normal operation is in effect. With 2.0V < CD < VS, the IC is in power-down mode. In power-down mode, the microphone and the hybrid amplifiers are disabled, and their outputs reach the high-impedance state. Addition- ally, the bias is removed from the level detectors. The bias is not removed from the filter (pins 1 and 2), the attenuators (pins 8, 9, 21 and 22), or from pins 13, 14, and 15 (the attenuators are disabled, however, and will not pass a signal). The input impedance at CD is typically 90 kΩ, has a threshold of approximately 1.5V, and the voltage at this pin must be kept within the range of ground and V S (see Figure 7-8 on page 20). If CD is not used, the pin should be grounded. 4. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Reference point pin 28, Tamb = 25° C, unless otherwise specified. Parameters Symbol Value Unit Supply voltage, pin 4 V S –1.0 to +7.0 V Voltages Pin 3, 12 Pin 13 Pin 2, 9, 21 –1.0 to (VS + 1.0) –1.0 to (VS + 0.5) –0.5 to (VS + 0.5) V Storage temperature range T stg –55 to +150 ° C Junction temperature T j 125 ° C Ambient temperature range T amb –20 to +60 ° C Power dissipation Tamb = 60° C, SO28 P tot 520 mW Maximum thermal resistance Junction ambient, SO28 R thJA 120 K/W

4743D–CORD–03/06 U4082B 5. Recommended Operating Conditions Parameters Test Conditions Symbol Min. Typ. Max. Unit Supply voltage Pin 4 V S 3.5 6.5 V CD input MUTE input Pin 3 Pin 12 0V S V Output current Pin 15 I B - 500 µA Volume control input Pin 13 VCI 0.3 × VB VB V Attenuator input signal voltage Pins 9, 21 0 350 mVrms Microphone amplifier, hybrid amplifier gain 04 0 d B Load current At RECO, TO; pins 8, 22 At MICO; pin 10 At HTO–, HTO+; pins 6, 5 ±2.0 ±1.0 ±5.0 mA Ambient temperature range T amb –20 +60 ° C 6. Electrical Characteristics Tamb = +25°C, VS = 5.0 V, CD ≤ 0.8 V, unless otherwise specified Parameters Test Conditions Symbol Min. Typ. Max. Unit Power Supply Supply current VS = 6.5V, CD = 0.8V VS = 6.5V, CD = 2.0V IS 5.5 600.0 8.0 800.0 mA µA CD input resistance V S = VCD = 6.5V R CD 50.0 90.0 k Ω CD input voltage High Low VCDH VCDL 2.0 0.0 VS 0.8 V Output voltage VS = 3.5V VS = 5.0V VB 1.8 1.3 2.1 2.4 V Output resistance I VB = 1 mA R OVB 400.0 Ω Power supply rejection ratio C VB = 220 µF , f = 1 kHz PSRR 54.0 dB Attenuators Receive attenuator gain f = 1.0 kHz, VCI = VB R mode, RI = 150 mVrms (VS = 5.0V) (VS = 3.5V) AGC gain change –V S = 2.8V versus VS = 5.0V ∆GR2 –25.0 –15.0 Idle mode RI = 150 mVrms G RI –22.0 –20.0 –17.0 dB Range R to T mode ∆GR3 49.0 52.0 54.0 Volume control range R Mode, 0.3 V B < VCI < VB VCR 27.0 35.0 dB RECO DC voltage R mode V RECO VB V RECO DC voltage R to T mode ∆VRECO ±10 ±150.0 mV RECO high voltage I O = –1 mA, RI = VB + 1.5V V RECOH 3.7 V RECO low voltage IO = 1 mA, RI = VB – 1V, output measured with respect to VB VRECOL –1.5 –1.0 V RI input resistance RI < 350 mVrms R RI 7.0 10.0 14.0 k Ω

4743D–CORD–03/06 U4082B Transmit attenuator gain f = 1 kHz T mode, TI = 150 mVrms Idle mode, TI = 150 mVrms Range T to R mode GT GTI GTI +4.0 –22.0 49.0 +6.0 –20.0 52.0 +8.0 –17.0 54.0 dB TO DC voltage T Mode V TO VB V TO DC voltage T to R Mode V TO ±100 ±150.0 mV TO high voltage I O = –1.0 mA, TI = VB + 1.5V V TOH 3.7 V TO low voltage IO = + 1.0 mA TI = VB – 1.0V output measured with respect to VB VTOL –1.5 –1.0 V TI input resistance TI < 350 mVrms R TI 7.0 10.0 14.0 k Ω Gain tracking G R + GT, at T, Idle, R G TR ±0.1 dB Attenuator Control CT voltage Pin 14 – VB R mode, VCI = VB Idle mode T mode VCT +240.0 0.0 –240.0 mV CT source current R mode I CTR –85.0 –60.0 –40.0 µA CT sink current T mode I CTT +40.0 +60.0 +85.0 µA CT slow idle current I CTS 0.0 µA CT fast idle internal resistance R FI 1.5 2.0 3.6 k Ω VCI input current I VCI –60.0 nA Dial tone detector threshold V DT 10.0 15.0 20.0 mV Microphone Amplifier VMUTE < 0.8V, GVCL = 31 dB Output offset VMICO – VB Feedback R = 180 kΩ MICO VOS –50.0 0.0 +50.0 mV Open loop gain f < 100Hz G VOLM 70.0 80.0 dB Gain bandwidth GBW M 1.0 MHz Output high voltage I O= –1.0 mA, VS = 5.0V V MICOH 3.7 V Output low voltage I O = +1.0 mA V MICOL 200.0 mV Input bias current (MIC) I BM –40.0 nA Muting (∆ gain) f = 1 kHz, VMUTE = 2.0V 300Hz < f < 10 kHz G G –55.0 –68.0 dB dB MUTE input resistance V S = VMUTE = 6.5V R MUTE 50.0 90.0 k Ω MUTE input high V MUTEH 2.0 V S V MUTE input low V MUTEL 0.0 0.8 V Distortion 300Hz < f < 10 kHz THD M 0.15 % Hybrid Amplifiers HTO– Offset V HTO – VB, Feedback R = 51 kΩ HVOS –20.0 0.0 +20.0 mV HTO to HTO+ Offset Feedback R = 51 k Ω HBVOS –30.0 0.0 +30.0 mV Open loop gain HTI to HTO–, f < 100Hz G VOLH 60.0 80.0 dB Gain bandwidth GB 1.0 MHz 6. Electrical Characteristics (Continued) Tamb = +25°C, VS = 5.0 V, CD ≤ 0.8 V, unless otherwise specified Parameters Test Conditions Symbol Min. Typ. Max. Unit

4743D–CORD–03/06 U4082B Figure 6-1. Hybrid Amplifier Distortion Test Closed loop gain HTO– to HTO+ G VCLH –0.35 0.0 +0.35 dB Input bias current at HTI I BH –30.0 nA HTO high voltage I O = –5.0 mA V HT H3 . 7 V HTO low voltage I O = +5.0 mA V HT L2 5 0 . 0 m V HTO+ high voltage I O = –5.0 mA V HT H 3.7 V HTO+ low voltage I O = +5.0 mA V HT L4 5 0 . 0 m V Distortion 300 Hz < f < 10 kHz (see Figure 6-1) d0 . 3 % Level Detectors and Background Noise Monitors Transmit receive switching threshold Current ratio from T to R at RLI1 + RLI2 to 20 mA at TLI1 + TLI2 to switch ITH 0.8 1.0 1.2 Source current RLO1, RLO2, TLO1, TLO2 I LSO –2.0 mA Sink current RLO1, RLO2, TLO1, TLO2 I LSK 4.0 µA CPR, CPT output resistance I O = 1.2 mA R CP 35 Ω CPR, CPT leakage current I CPLK –0.2 µA Filter Voltage offset at FO V FO – VB, 220 kΩ from VB to FI FO VOS –200.0 –90 0.0 mV FO sink current I FO 150.0 260 400.0 µA FI bias current I FI –50.0 nA System Distortion R Mode From FI to RECO, FO connected to RI dR 0.5 3.0 % T Mode From MIC to HTO–/HTO+, includes T attenuator dT 0.8 3.0 % 6. Electrical Characteristics (Continued) Tamb = +25°C, VS = 5.0 V, CD ≤ 0.8 V, unless otherwise specified Parameters Test Conditions Symbol Min. Typ. Max. Unit VB HTI HTO-6 0.1 µF 10 kΩ VI + HTO+ 1200 Ω Analyzer AmplifierRR VB 51 kΩ

4743D–CORD–03/06 U4082B Figure 7-1. Attenuator Gain versus VCT (Pin 14) 7. Temperature Characteristics Parameters Typical Value at 25 ° C Typical Change –20° C to +60° C Supply current, CD = 0.8 VIS 5.0 mA –0.3%/ ° C Supply current, CD = 2.0 VIS 400.0 µA –0.4%/ ° C VB output voltage, VS = 5.0V VO 2.1V +0.8%/ ° C Attenuator gain (maximum gain) +6.0 dB 0.0008 dB/ ° C Attenuator gain (maximum attenuation) –46.0 dB 0.004 dB/ ° C Attenuator input resistance (at TI, RI) 10.0 k Ω +0.6%/° C Dial tone detector threshold 15.0 mV +20.0 mV/ ° C CT source, sink current ±60.0 µA –0.15%/ ° C Microphone, hybrid amplifier offset 0.0 mV ±4.0 mV/ ° C Transmit receive switching threshold 1.0 ±0.02%/ ° C Sink current at RLO1, RLO2, TLO1, TLO2 4.0 µA –10.0 nA/ ° C Closed loop gain (HTO– to HTO+) 0.0 dB 0.001%/ ° C -160 1600 -40 -50 -30 -10 -20 T attenuator R attenuator VCT - VB (mV) G (dB) 320-320

4743D–CORD–03/06 U4082B Figure 7-11. VB Power Supply Rejection versus Frequency Characteristics and VB Capacitor 8. Design Guidelines

8.1 Switching Time

The switching time of the U4082B ci rcuit is determined primarily by C T (pin 14, refer to Figure 3-3 on page 7 ), and secondarily by the capacitors at the level detector outputs (RLO1, RLO2, TLO1, TLO2). For more information, please refer to Figure 1-2 on page 2. The time to switch from idle to receive or transmit mode is determined by the capacitor at C T, together with the internal current sources. The switching time is: where ∆V = 240 mV CT = 5 µF I = 60 µA If the circuit switches directly from receive to transmit mode (or vice versa), the total switching time would be 40 ms. The switching time depends upon the mode selection. If the circuit is going to “fast idle”, the time constant is determined by the C T capacitor, and the internal 2 k Ω resistor. With C T = 5 µF, the time constant is approximately 10 ms, giving a switching time to idle of approximately 30 ms (for 95% change). Fast idle is an infrequent mode, however, occurring when both speakers are talk- ing and competing for control of the circuit. The switching time from idle back to either transmit or receive mode is described above. By switching to “slow idle” the time constant is determined by the C T capacitor and RT, the exter- nal resistor (see Figure 3-4 on page 9 ). With CT = 5.0 µF and R T = 120 kΩ, the time constant is approximately 600 ms, giving a switching time of approximately 1.8 seconds (for 95% change). The switching period to slow idle begins when both speakers have stopped talking. The switch- ing time back to the original mode will depend on how soon that speaker begins speaking again. The sooner the speaking starts during the 1.8s period, the quicker the switching time since a smaller voltage excursion is required. The switch ing time is determined by the internal current source as described above. f (kHz) PSRR (dB) 500 µF 310.3 CVB = 1000 µF 200 µF 100 µF 50 µF ∆MinimalT ∆MinimalV C T×

4743D–CORD–03/06 U4082B The above switching times occur, however, after the level detectors have detected the appropri- ate signal levels, since their outputs operate the attenuator control block. Referring to Figure 3-2 on page 6 , the rise time of the level detectors' outputs to new speech is quick by comparison (approximately 1 ms), determined by the internal 350 Ω resistor and the external capacitor (typi- cally 2 µF). The output's decay time is determined by the external capacitor and an internal 4 µA current source, giving a decay rate of 60 ms f or a 120 mV excursion at RLO or TLO. Total response time of the circuit is not constant since it depends on the relative strength of the sig- nals at the different level detectors and the timing of the signals with respect to each other. The capacitors at the four outputs (RLO1, RLO2, TLO1, TLO2) must be of equal value (±10%) to prevent problems in timing and level response. The rise time of the level detector's outputs is not significant since it is so short. The decay time, however, provides a significant part of the “hold time” necessary to hold the circuit during the normal pauses in speech. The components at the inputs of the level detectors (RLI1, RLI2, TLI1, TLI2) do not affect the switching time but rather affect the relative signal levels required to switch the circuit and the fre- quency response of the detectors.

8.2 Design Equations

The following definitions are used at 1 kHz with reference to Figure 1-2 on page 2 and Figure 8-3 on page 23 where coupling capacitors are omitted for the sake of simplicity: G MA is the gain of the microphone amplifier measured from the microphone output to TI (typically 35V/V, or 31 dB) G T is the gain of the transmit attenuator, measured from TI to TO G HA is the gain of hybrid amplifiers, measured from TO to the HTO–/HTO+ differential output (typically 10.2V/V, or 20.1 dB) G HT is the gain from HTO–/HTO+ to Tip/Ring for transmit signals, and includes the balance network (measured at 0.4V/V, or –8 dB) Figure 8-1. VB Power Supply Rejection of the Microphone and Hybrid Amplifiers f (kHz) PSRR (dB) 100 310.3 HTO-, CVB = 1000 µF = 220 µF = 220 µF MICO, CVB = 1000 µF

4743D–CORD–03/06 U4082B Figure 8-2. Typical Output Swing versus VS Figure 8-3. Basic Clock Diagram for Design Purposes G ST is the side tone gain, measured from HTO–/HTO+ to the filter input (measured at

0.18 V/V, or –15 dB)

G HR is the gain from Tip/Ring to the filter input for receive signals (measured at 0.833V/V or –1.6 dB) G FO is the gain of the filter stage, measured from the input of the filter to RI, typically 0 dB G R is the gain of the receive attenuator measured from RI to RECO G SA is the gain of the speaker amplifier, measured from RECO to the differential output of the U4083B (typically 22V/V or 26.8 dB) G AC is the acoustic coupling, measured from the speaker differential voltage to the microphone output voltage MICO HTO -, HTO + TO, RO FO RO TO 4 5 V OPP (V) VS (V) Comparator MIC amp. MICO RLI2 coupling TOTI T attenuator SAO Speaker amp. Acoustic HTO-/HTO+ Tip Filter Ring Hybrid FORI R attenuator control FIRECO Attenuator Comparator TLI1TLI2 RLI1 Hybrid amp. I3 R3 I2R2 GHIT GHR GST R4 I4

4743D–CORD–03/06 U4082B

8.2.1 Transmit Gain

The transmit gain, from the microphone output (VM) to Tip and Ring, is determined by the output characteristics of the microphone, and the desired transmit level. For example, a typical electret microphone will produce approximately 0.35 mVrms under normal speech conditions. To achieve 100 mVrms at Tip/Ring, an overall gain of 285V/V is necessary. The gain of the transmit attenuator is fixed at 2.0 (+6.0 dB), and the gain through the hybrid of Figure 1-2 on page 2 (GHT) is nominally 0.4 (–8.0 dB). Therefore, a gain of 357V/V is required of the microphone and hybrid amplifiers. It is desirable to have the maj ority of that gain in the microphone amplifier for three reasons: 1. The low-level signals from the microphone should be amplified as soon as possible to minimize signal/noise problems; 2. to provide a reasonable signal level to the TLI2 level detector; 3. and to minimize any gain applied to broadband noise generated within the attenuator. However, to cover the normal voice band, the microphone amplifier's gain should not exceed 48 dB (Figure 7-7 on page 19). For the circuit in Figure 8-3 on page 23, the gain of the microphone amplifier was set at 35V/V (31 dB), and the differential gain of the hybrid amplifiers was set at 10.2V/V (20.1 dB).

8.2.2 Receive Gain

The overall receive gain depends on the incoming signal level and the desired output power at the speaker. Nominal receive levels (independent of the peaks) at Tip/Ring can be 35 mVrms (–27 dBm), although on long lines that level can be down to 8.0 mVrms (-40 dBm). The speaker power is: where R S is the speaker impedance, and the dBm term is the incoming signal level increased by the gain of the receive path. Experience has show n that approximately 30 dB gain is a satisfac- tory amount for the majority of applications . Using the above numbers and equation 1, it would appear that the resulting power to the speaker is extremely low. However, equation 1 does not consider the peaks in normal speech which can be 10 to 15 times the rms value. Considering the peaks, the overall average power approaches 20 to 30 mW on long lines, and much more on short lines. Referring to Figure 1-2 on page 2 , the gain from Tip/Ring to the filter input was measured at 0.833V/V (–1.6 dB), the filter's gain is unity, and the receive attenuator's gain is 2.0V/V (+6.0 dB) at maximum volume. The speaker amplifier's gain is set at 22V/V (26.8 dB) which puts the over- all gain at approximately 31.2 dB.

8.2.3 Loop Gain

The total loop gain (of Figure 8-3 on page 23 ) must add up to less than 0 dB to obtain a stable circuit. This can be expressed as: GMA + GT + GHA + GST + GFO + GR + GSA + GAC < 0 ( 2 ) Using the typical numbers mentioned above, and knowing that G T + GR = –40 dB, the required acoustic coupling can be determined: PSPK 10dBm/10 0.6× RS

4743D–CORD–03/06 U4082B An acoustic loss of at least 23 dB is necessa ry to prevent instability and oscillations, commonly referred to as “singing”. However, the following equations show that greater acoustic loss is nec- essary to obtain proper level detection and switching.

8.2.4 Switching Thresholds

To switch comparator C1, currents I 1 and I3 need to be determined. Referring to Figure 8-3 on page 23, with a receive signal V L applied to Tip/Ring, a current I 3 will flow through R 3 into RLI2 according to the following equation: where the terms in the brackets are the V/V gain terms. The speaker amplifier gain is divided by two since GSA is the differential gain of the amplifier, and V 3 is obtained from one side of that output. The current I1, coming from the microphone circuit, is defined by: where VM is the microphone voltage. Since the switching threshold occurs when I 1 = I3, combin- ing the above two equations yields: This is the general equation defining the microphone voltage necessary to switch comparator C1 when a receive signal V L is present. The highest V M occurs when the receive attenuator is at maximum gain (+6.0 dB). Using the typical numbers for equation 6 yields: VM = 0.52 × VL (7) To switch comparator C2, currents I 2 and I4 need to be determined. With sound applied to the microphone, a voltage VM is created by the microphone, resulting in a current I2 into TLI1: Since GHA is the differential gain of the hybrid amplifiers, it is divided by two to obtain the voltage V2 applied to R2. Comparator C2 switches when I4 = I2. I4 is defined by: Setting I4 = I2, and combining the above equations results in: VL GSA VM GMA× VM VL GHR GFO× GR× GSA×[] VM GHA VL VL VM GMA GT× GHA×[]

4743D–CORD–03/06 U4082B This equation defines the line voltage at Tip/Ring necessary to switch comparator C2 in the presence of a microphone voltage. The highest V L occurs when the circuit is in transmit mode (GT = +6.0 dB). Using the typical numbers for equation 10 yields: VL = 840 × VM (or VM = 0.0019 × VL) (11) At idle, where the gain of the two attenuators is –20 dB (0.1V/V), equations 6 and 10 yield the same result: VM = 0.024 × VL (12) Equations 7, 11, and 12 define the thresholds for switching, and are represented in Figure 8-4 The "M" terms are the slopes of the lines (0.52, 0.024, and 0.0019) which are the coefficients of the three equations. The M R line represents the receive to transmit threshold, in that it defines the microphone signal level necessary to switch to transmit in the presence of a given receive signal level. The MT line represents the transmit to receive threshold. The M I line represents the idle condition, and defines the threshold level on one side (transmit or receive) necessary to overcome noise on the other. Figure 8-4. Switching Thresholds Some comments on the graph (see Figure 8-4):  Acoustic coupling and side tone coupling were not included in equations 7 and 12. Those couplings will affect the actual performance of the final speakerphone due to their interaction with speech at the microphone and the receive signal coming in at Tip/Ring. The effects of those couplings are difficult to predict due to their associated phase shifts and frequency response. In some cases the coupling signal will add, and other times subtract from the incoming signal. The physical design of the speakerphone enclosure, as well as the specific phone line to which it is connected, will affect the acoustic and side tone couplings, respectively. T h e MR line helps define the maximum acoustic coupling allowed in a system, which can be found from the following equation: VL MI MT VM MR GAC(MAX)

4743D–CORD–03/06 U4082B Equation 13 is independent of the volume control setting. Conversely, the acoustic coupling of a designed system helps determine the minimum slope of that line. Using the component values of Figure 1-2 on page 2 in equation 13 yields a GAC(MAX) of –37 dB. Experience has shown, how- ever, that an acoustic coupling loss of 40 dB is desirable. T h e MT line helps define the maximum side tone coupling (GST) allowed in the system. GST can be found using the following equation: Using the component values of Figure 1-2 on page 2 in equation 14 yields a maximum side tone of 0 dB. Experience has shown, however, that a minimum of 6.0 dB loss is preferable. The above equations can be used to determine the resistor values for the level detector inputs. Equation 6 can be used to determine the R1-R3 ratio, and equation 10 can be used to determine the R1-R2 ratio. In Figure 8-3 on page 23, R1-R4 each represent the combined impedance of the resistor and coupling capacitor at each level detector input. The magnitude of each RC's imped- ance should be kept within the range of 2.0 k Ω to 15 k Ω in the voice band (due to the typical signal levels present) to obtain the best perform ance from the level detectors. The specific R and C at each location will determine the frequency response of that level detector. 9. Application Information

9.1 Dial Tone Detector

The threshold for the dial tone detector is internally set at 15 mV (10 mVrms) below VB (see Fig- ure 3-3 on page 7 ). That threshold can be reduced by connecting a resistor from RI to ground. The resistor value is calculated from: where VB is the voltage at pin 15, and ∆V is the amount of threshold reduction. By connecting a resistor from VS to RI, the threshold can be increased. The resistor value is calculated from: where ∆V is the amount of the threshold increase.

9.2 Background Noise Monitors

For testing or circuit analysis purposes, the transmit or receive attenuators can be set to the “on” position by disabling the backgro und noise monitors and applying a si gnal so as to activate the level detectors. Grounding the CPR pin will disable the receive background noise monitor, thereby indicating the “presence of speech” to the attenuator control block. Grounding CPT does the same for the transmit path. Additionally, the receive background noise monitor is automatically disabled by the dial tone detector whenever the receive signal exceeds the detector's threshold. GST R 10 k VB R 10 k VS VB–

4743D–CORD–03/06 U4082B

9.3 Transmit/Receive Detection Priority

Although the U4082B was designed to have idle mode such that the attenuators are halfway between their full on and full off positions, idle mode can be biased towards the transmit or the receive side. With this done, gaining control of the circuit from idle w ill be easier for that side towards which it is biased since that path will have less attenuation at idle. By connecting a resistor from C T (pin 14) to ground, the circuit will be biased towards the trans- mit side. The resistor value is calculated from: where RT = 120 kΩ (typ.) connected between pin 14 and 15. ∆V= VB – V14 (see Figure 7-1 on page 17). By connecting a resistor from C T (pin 14) to V S, the circuit will be biased towards the receive side. The resistor value is calculated from: Switching time will be somewhat affected in each case due to the different voltage excursions required to get to transmit and receive from idle. For practical considerations, the ∆V shift should not exceed 100 mV. RR T VB RR T VS VB–

4743D–CORD–03/06 U4082B 11. Package Information 10. Ordering Information Extended Type Number Package Remarks U4082B-MFLG SO28 Tube, Pb-free U4082B-MFLG3G SO28 Taped and reeled, Pb-free technical drawings according to DIN specifications 0.25 0.10 Dimensions in mm 0.4 1.27 16.51 18.05 17.80 2.35 7.5 7.3 9.15 8.65 10.50 10.20 0.25 28 15 11 4

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