U401 CALOGIC | Alldatasheet

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Technical content

Dual N-Channel JFET Switch U401 – U406

FEATURES

  • • Minimum System Error and Calibration
  • • Low Drift With Temperature
  • • Operates From Low Power Supply Voltages
  • • High Output Impedance ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) One Side Both Sides Power Dissipation (TA = 85oC) 300mW 500mW Derate above 25oC2 . 6 m W / oC5 m W / oC NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ORDERING INFORMATION

Part Package Temperature Range U401-6 Hermetic TO-71 -55 oC to +150oC XU401-6 Sorted Chips in Carriers -55oC to +150oC CORPORATION PIN CONFIGURATION S2 G1 TO-71 CJ2

ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified) SYMBOL PARAMETER U401 U402 U403 U404 U405 U406 UNITS TEST CONDITIONS MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX BV GSS Gate-Source Breakdown Voltage -50 -50 -50 -50 -50 -50 V VDS = 0, IG = -1µA IGSS Gate Reverse Current (Note 2) -25 -25 -25 -25 -25 -25 pA V DS = 0, VGS = -30V VGS(off) Gate-Source Cutoff V VDS = 15V, ID = 1nA VGS(on) Gate-Source Voltage IDSS Saturation Drain IG Operating Gate Current (Note 2) -15 -15 -15 -15 -15 -15 pA VDG = 15V, ID = 200µA -10 -10 -10 -10 -10 -10 nA T A = 125oC BV G1-G2 Gate-Gate Breakdown Voltage ±50 ±50 ±50 ±50 ±50 ±50 V VDS = 0, VGS = 0, IG = ±1µA gfs Common-Source Forward Transconductance (Note 3) 2000 7000 2000 7000 2000 7000 2000 7000 2000 7000 2000 7000 µS VDS = 10V, VGS = 0 f = 1kHz gos Common-Source Output Conductance 20 20 20 20 20 20 gfs Common-Source Forward Transconductance 1000 2000 1000 2000 1000 2000 1000 2000 1000 2000 1000 2000 VDG = 15V, ID = 200µA f = 1kHz gos Common-Source C iss Common-Source Input Capacitance (Note 6) pF f = 1MHz C rss Common-Source Reverse Transfer Capacitance (Note 6) en Equivalent Short-Circuit Input Noise Voltage 20 20 20 20 20 20 nV √Hz VDS = 15V, VGS = 0 f = 10Hz (Note 6) CMRR Common-Mode Rejection Ratio 95 95 95 95 90 dB VDG = 10 to 20V, ID = 200µA (Note 5, 6) | VGS1 −VGS2 | Differential Gate-Source Voltage 5 1 01 01 52 04 0 m V VDG = 10V, ID = 200µA | ΔVGS1 −VGS2 | ΔT Gate-Source Voltage Differential Drift (Note 10 10 25 25 40 80 µV/oC VDG = 10V, ID = 200µA TA = -55oC TB = +25oC TC = +125oC NOTES: 1. Per transistor. 2.Approximately doubles for every 10oC increase in TA. 3. Pulse test duration = 300µs; duty cycle ≤3%. 4.Measured at end points TA, TB, TC . 5.CMRR = 20 log10  ΔVDD Δ | VGS 1 −VGS 2 |  , ΔVDD = 10V. 6.For design reference only, not 100% tested. U401 – U406 CORPORATION