U3280M ATMEL | Alldatasheet
Document overview
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Technical content
Features
- Contactless Power Supply and Communication Interface Up to 10 kbaud Data Rate (R/O) Power Management for Contactless and Battery Power Supply Frequency Range 100 kHz to 150 kHz 32 x 16-bit EEPROM Two-wire Serial Interface Shift Register Supported Bi-phase and Manchester Modulator Stage Reset I/O Line Field Clock Extractor Field and Gap Detection Output for Wake-up and Data Reception Field Modulator with Energy-saving Damping Stage
Applications
Main Areas – Access Control – Telemetry – Wireless Sensors Examples: – Wireless Passive Access and Active Alarm Control for Protection of Valuables – Contactless Position Sensors for Alignments of Machines – Contactless Status Verification and/or Data Readout from Sensors
Description
The U3280M is a transponder interface for use in contactless ID systems, remote con- trol systems, tag and sensor applications. It supplies the microcontroller with power from an RF field via an LC-resonant circui t and it enables contactless bi-directional data communication via this RF field. It includes power management that handles switching between the magnetic field and a battery power supply. To store permanent data like an identifier code and configuration data, the U3280M includes a 512-bit EEPROM with a serial interface. Figure 1. Block Diagram
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Figure 2. Pinning
1 VBatt Power supply voltage input to connect a battery
must be connected to buffer the voltage during field supply and to block the VDD of the microcontroller.
3 SCL Serial clock line
4 NRST Reset line bi-directional
5 SDA Serial data line
6 VSS Circuit ground
7 NC Not connected
8 FC Field clock output of the front-end clock extractor
9 MOD Modulation input
10 NGAP Gap and field detect output
11 NC Not connected
12 NC Not connected
13 NC Not connected
14 NC Not connected
4688B–RFID–12/04 Functional Description Transponder Interface The U3280M is a transponder interface IC that can operate microcontrollers using wire- less technology and battery independently. Wireless data communication and the power supply are handled via an electromagnetic fi eld and the coil antenna of the transponder interface. The U3280M consists of a rectifier stage for the antenna, power management to handle field and battery power supplies, a damping modulator, and a field-gap detec- tion stage for contactless data communication. Furthermore, a field clock extraction and an EEPROM are on-chip. The internal rectifier stage rectifies the AC from the LC-resonant circuit at the coil inputs and supplies the U3280M device and an additional microcontroller device with power. It is also possible to supply the device via the V Batt input with DC from a battery. The power management handles switching between battery supply (V Batt pin) and field sup- ply automatically. It switches to field supply if a field is applied at the coil, and it switches back to battery if the field is removed. The voltage from the coil or the V Batt pin is output at the VDD pin to supply the microcontroller or any other suited device. At the V DD pin a capacitor must be connected to smooth and bu ffer the supply voltage. This capacitor is also necessary to buffer the supply voltage during communication (damping and gaps in the field). For communication, the chip contains a damping stage and gap-detect circuitry. By means of the damping stage the coil voltage can be modulated to transmit data via the field. It can be controlled with the modulator input (MOD pin) via the microcontroller. The gap-detection circuitry detects gaps in the fi eld and outputs the gap/field signal at the gap-detect output (Pin NGAP). To store data like keycodes, identifiers a nd configuration bits, a 512-bit EEPROM is available on-chip. It can be read and written by the microcontroller via a two-wire serial interface. The serial interface, the EEPROM and the microcontroller are supplied with the voltage at the V DD pin. That means the microcontroller can read and write the EEPROM if the supply voltage at VDD is in the operating range of the IC. The U3280M has built-in operating modes to support a wide range of applications. These modes can be activated via the serial interface with special mode control bytes. To support applications with battery supp ly only, power management can be switched off by software to disable the automatic switching to field supply. An on-chip Bi-phase and Manchester modulat or can be activated and controlled by the serial interface. If this modulator is used, it modulates the serial data stream at the serial inputs SDA and SCL into a Bi-phase or Manchester-coded signal for the damping stage. Modulation The transponder interface can modulate the magnetic field by its damping stage to transmit data to a ba se station. It modulates the coil voltage by varyin g the coil’s load. The modulator can be controlled via the MOD pin. A high level (“1”) increases the cur- rent into the coil and damps the coil voltage. A low level (“0”) decreases the current and increases the coil voltage. The modulator generates a voltage stroke of about 2 V pp at the coil. A high level at the MOD pin makes the maximum of the field energy available at V DD. During reset mode, a high level at the MOD pin causes optimum conditions for starting the device and charging the capacitor at V DD after the field has been applied at the coil.
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VDDC. In this case the value VDDC must be used in the above formula. demodulation with the field clock. microcontroller must demodulate the incoming data stream at one of its inputs. Figure 3. Modulation Figure 4. GAP and Modulation Timing
- edge used as wakeup signal
rectified and smoothed coil voltage. battery and field supply in case of interferences at the coil inputs. and the connected controller always operate with the voltage at the VDD pin. becomes lower than the field-off-detection voltage (VFDoff). will generate a reset that can be connected to the microcontroller. Figure 5. Switch Conditions for Power Management the battery is switched off and VDD changes to VDDC.
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power management’s on and off command must be transferred via the serial interface. ize applications with battery supply if the field is too weak to supply the IC with power. ulation and gaps the ripple on the supply volt age is in the range of 100 mV to 300 mV. size of the capacitor depends on the length of the gaps and damping cycles. Table 1. Example for a 350 µA Supply Current, 200 mV Ripple at VDD trol the Bi-phase/Manchester modulator or the power management of the U3280M. tocol is used for the data transfers. Serial Protocol Data states on the SDA line change only when SCL is low. the STOP condition returns the device to standby mode. A receiving device generates an acknowledge (A) after the reception of each byte. and then issue a STOP condition to switch the device to a known state.
Figure 6. Serial Protocol mode control bits and the read/not-write bit. mode and the SDA line is switched to an input with the pull-up resistor. The START condition follows a control byte that determines the following operation. defines a write access and a “1” defines a read access. transmission of the row addresses.
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4688B–RFID–12/04 Write Operations The EEPROM allows for 8-bit and 16-bit write operations. A write access starts with the START condition followed by writing a write control byte and one or two data bytes from the master. It is completed with the STOP condition from the master after the acknowl- edge cycle. When the EEPROM receives the control byte, it loads the addressed memory cell into a 16-bit read/write buffer. The following data bytes overwrite the buffer. The internal EEPROM programming cycle is started by a ST OP condition after the first or second data byte. During the programming cycle, the addressed EEPROM cells are cleared and the contents of the buffer is written back to the EEPROM cells. The complete erase- write cycle takes about 10 ms. Acknowledge Polling If the EEPROM is busy with an internal write cycle, all inputs are disabled and the EEPROM will not acknowledge until the write cycle is finished. This can be used to determine when the write cycle is complete. The master must perform acknowledge polling by sending a START c ondition followed by the contro l byte. If the device is still busy with the write cycle, it will not return an acknowledge and the master has to gener- ate a STOP condition or perform further acknowledge polling sequences. If the cycle is complete, the device returns an acknowledge and the master can proceed with the next read or write cycle. Write One Data Byte Write Two Data Bytes Write Control Byte Only Write Control Bytes START Control byte A Data byte 1 A STOP START Control byte A Data byte 1 A Data byte 2 A STOP START Control byte A STOP A → acknowledge Write Low Byte First MSB LSB A4 A3 A2 A1 A0 C1 C0 R/NW Row address 0 1 0 Byte Order LB(R) HB(R) Write High Byte First MSB LSB A4 A3 A2 A1 A0 C1 C0 R/NW Row address 1 0 0 Byte Order HB(R) LB(R) HB: high byte; LB: low byte; R: row address
4688B–RFID–12/04 Read Operations The EEPROM allows byte-, word- and current address read operations. The read oper- ations are initiated in the same way as write operations. Each read access is initiated by sending the START condition followed by the control byte which contains the address and the read mode. When the device has received a read command, it returns an acknowledge, loads the addressed word into the read/write buffer and sends the selected data byte to the master. The master has to acknowledge the received byte to proceed with the read operation. If two bytes are read out from the buffer, the device automatically increments or decrements the word address and loads the buffer with the next word. The read mode bit determines if the low or high byte is read first from the buffer and if the word address is incremented or decremented for the next read access. When the memory address limit has been reached, the data word address will “roll over” and the sequential read will continue. The master can terminate the read operation after every byte by not responding with an acknowledge (N) and by issuing a STOP condition. Read One Data Byte Read Two Data Bytes Read n Data Bytes Read Control Bytes START Control byte A Data byte 1 N STOP START Control byte A Data byte 1 A Data byte 2 N STOP START Control byte A Data byte 1 A Data byte 2 A - - - - - - Data byte n N STOP A → acknowledge, N → no acknowledge Read Low Byte First, Address Increment MSB LSB A4 A3 A2 A1 A0 C1 C0 R/NW Row address 0 1 1 Byte Order LB(R) HB(R) LB(R+1) HB(R+1) - - - - LB(R+n) HB(R+n) Read High Byte First, Address Decrement MSB LSB A4 A3 A2 A1 A0 C1 C0 R/NW Row address 1 0 1 Byte Order HB(R) LB(R) HB(R-1) LB(R-1) - - - - HB(R-n) LB(R-n) HB: high byte; LB: low byte; R: row address
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4688B–RFID–12/04 Initialization after a Reset Condition The EEPROM with the serial interface has reset circuitry on-chip. In systems with micro- controllers that have their own reset circuitry for power-on reset, watchdog reset or brown-out reset, it may be necessary to bring the U3280M into a known state indepen- dently of the internal reset. This is performed by reading one byte without acknowledging and then generating a STOP condition. Special Modes Table 2. Control Byte Description Data Transfer Sequence for Bi-phase and Manchester Modulation By using special control bytes, the serial interface can control the modulator stage or the power management. The EEPROM access and the serial interface are disabled in these modes until the next STOP condition. If no START or STOP condition is generated, the SCL and SDA lines can be used for the modulator stage. SCL is used for the modulator clock and SDA is used for the data. In this mode, the same conditions for clock and data changing, as in normal mode, are valid. The SCL and SDA lines can be used for contin- uous bit transfers, an acknowledge cycle after 8 bits must not be generated. Note: After a reset of the microcontroller it is not assured that the transponder interface has been reset as well. It could still be in a receive or transmit cycle. To switch the device’s serial interface to a known state, the micr ocontroller should read one byte from the device without acknowledge and then generate a STOP condition. Power-on Reset, NRST The U3280M transponder front end starts workin g with the applied field. For the digital circuits like the EEPROM serial interface and r egisters there is reset circuitry. A reset is generated by a power-on condition at VDD, by switching back from field to battery supply and if a low signal is applied at the NRST-pin. The NRST-pin is a bi-directional pin and can also be used as a reset output to generate a reset for the microcontroller if the circuit switches over from field to battery supply. This sets the microcontroller in a well-defined st ate after the uncertain power supply condi- tion during switching. Antenna For the transponder interface a coil must be used as an antenna. Air and ferrite cored coils can be used. The achievable working distance (passive mode, not battery assisted) depends on the minimum coupling factor of an application, the power con- sumption, and the size of the antennas of the IC and the base station. With a power consumption of 150 µA, a minimum magnetic coupling factor below 0.5% is within reach. For applications with a higher power consumption, the coupling factor must be increased. The Q-factor of the antenna coil should be in a range between 30 and 80 for read only applications and below 40 for bi-directional read-write applications. Control Byte Description 1100x111b Bi-phase modulation 1101x111b Manchester modulation 11xx0111b Switch power management off → disables switching from battery to field supply 11xx1111b Switch power management on → enables automatic switching between battery and field supply xxxxx110b Reserved START Control byte Ackn Bit 1 Bit 2 Bit 3 - - - - - - - - - - - Bit n STOP
should be in the range of 100 kHz to 150 kHz. Figure 7. Antenna Circuit Connection are connected to an appropriate logic voltage level (for example, VDD).
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4688B–RFID–12/04 DC Characteristics Supply voltage VDD = 1.8 V to 6.5 V, VSS = 0 V, Tamb = -40° C to 85° C unless otherwise specified Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Power Supply Operating voltage at V Batt VBatt 2.0 6.5 V Operating voltage at VDD during battery supply VDDB VBatt– VSD V VDD-limiter voltage during coil supply VDDC 2.6 2.9 3.2 V Operating current during field supply VDD > 2.0 V I Fi 40 80 µA Sleep current I Sl 0.4 µA EEPROM Operating current during erase/write cycle VDD = 2.0 V VDD = 6.5 V IWR IWR 400 500 1200 µA µA Operating current during read cycle V DD = 2.0 V VDD = 6.5 V Peak current during 1/4 of read cycle IRdp IRdp 300 350 µA µA Power Management Field-on detection voltage V DD > 1.8 V V FDon 2.3 2.5 2.9 V Field-off detection voltage V DD > 1.8 V V FDoff 0.8 V Voltage drop at power-supply switch IS = 0.5 mA, VBatt = 2 V VSD 150 mV Coil Inputs: Coil 1 and Coil 2 Coil input current I CI 20 mA Input capacitance C IN 30 pF Coil voltage stroke during modulation VCU > 5V Icoil = 3 to 20 mA VCMS 1.8 2.3 4.0 V Pin MOD Input LOW voltage VIL VIH 0.2 × VDD V Input LOW voltage VIH 0.8 × VDD VDD V Input leakage current I Ileakage 10 nA Pin NGAP/FC Output LOW current V DD = 2.0 V VOL = 0.2 × VDD IOL 0 . 0 8 0 . 2 0 . 3 m A Output HIGH current V DD = 2.0 V VOH = 0.8 × VDD IOH -0.06 -0.15 - 0 . 2 5 m A
4688B–RFID–12/04 Serial Interface I/O Pins SCL and SDA Input LOW voltage V IL VIH 0.3 × VDD V Input HIGH voltage V IH 0.7 × VDD VDD V Input leakage current I Ileakage 10 nA Output LOW current VDD = 2.0 V VOL = 0.2 VDD VDD = 6.0 V IOL 0.7 2.8 0.9 3.5 1.1 4.2 mA mA Output HIGH current V DD = 2.0 V VOH = 0.8 VDD VDD = 6.0 V IOH -0.5 -1.8 -0.6 -2.2 -0.7 -2.6 mA mA DC Characteristics (Continued) Supply voltage VDD = 1.8 V to 6.5 V, VSS = 0 V, Tamb = -40° C to 85° C unless otherwise specified Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit AC Characteristics Supply voltage VDD = 1.8 V to 6.5 V, VSS = 0 V, Tamb = -40° C to 85° C unless otherwise specified Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Serial Interface Timing SCL clock frequency f SCL 0 100 kHz Clock low time t LOW 4.7 µs Clock high time t HIGH 4.0 µs SDA and SCL rise time t R 1000 ns SDA and SCL fall time t F 300 ns START condition setup time t SUSTA 4.7 µs START condition hold time t HDSTA 4.0 µs Data input setup time t SUDAT 250 ns Data input hold time t HDDAT 0n s STOP condition setup time t SUSTO 4.7 µs Bus free time t BUF 4.7 µs Input filter time t I 100 ns Data output hold time t DH 300 1000 ns Coil Inputs Coil frequency f COIL 100 125 150 kHz Gap Detection Delay field off to GAP = 0 V coilGap < 0.7 VDC TFGAP0 10 50 µs Delay field on to GAP = 1 V coilGap > 3 VDC TFGAP1 15 0 µ s Power Management Battery to field switch delay t BFS 1000 µs Field to battery switch delay V Batt = 6.5 V t FBS 51 0 3 0 m s
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Figure 8. Typical Reset Delay After Switching VDD On Figure 9. Typical Reset Delay After Switching VDD On
Figure 10. VDD Rise Time to Ensure Power-on Reset
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4688B–RFID–12/04
Package Information
Ordering Information
Extended Type Number Package Remarks U3280M-NFB SSO16 Tube U3280M-NFBG3 SSO16 Taped and reeled
4688B–RFID–12/04 Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Changes from Rev. 4688A-RFID-03/03 to Rev. 4688B-RFID-12/04 1. Page 10: Data Transfer Sequence: Text changed 2. Page 13: Antanna: Text changed 3. Page 16: Ordering Information table changed
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