U2102B ATMEL | Alldatasheet
Document overview
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Technical content
Features
- Integrated Reverse Phase Control Mode Selection: – Zero-voltage Switch with Static Output – Two-stage Reverse Phase Control with Switch-off – Two-stage Reverse Phase Control with Dimming Function Current Monitoring: – High-speed Short-circuit Monitoring with Output – High-current Monitoring with Integrating Buffer Integrated Chip Temperature Monitoring Adjustable and Retriggerable Tracking Time External Window Adjustment for Sensor Input Enable Input for Triggering
Applications
Two- or Three-wire Applications Motion Detectors Time-delay Relays Dimmers Reverse Phase Controls Timers 1. Description The timer control circuit U2102B is based on bipolar technology. The output stage can switch either a MOSFET or an IGBT. Two sensor inputs and the retriggerable and adjustable tracking time useful for a wide range of applications. By using the reverse phase-control technique, the resistive load can be dimmed without the need of a com- pensation inductance. The integrated current monitoring function provides a very fast switch-off in case of a short-circuit condition. No additional fuse is needed. Multifunction Timer IC U2102B Rev. 4767B–INDCO–10/05
4767B–INDCO–10/05 U2102B Figure 1-1. Block Diagram VRef Reverse phase control Divider Control logic Voltage limitation Synchronization Push pullRC oscillator Triggering with buffers Voltage monitoring Temperature monitoring Programing Current monitoring Test logic
4767B–INDCO–10/05 U2102B 2. Pin Configuration Figure 2-1. Pinning DIP16/SO16 VREF CRAMP RRAMP CONTROL OSC PROG EN TRIGGER SYNC +VS VO GND IOFF II TEST U2102B Pin Description Pin Symbol Function
1 VREF Reference voltage 5 V
2 CRAMP Ramp capacitance
3 RRAMP Current setting for ramp
4 CONTROL Control voltage
5 OSC RC oscillator
6 PROG Tri-state programming
7 EN Enable input
8 TRIGGER Trigger input (window)
9 V9 Window adjustment
10 TEST Test output
11 II Input current monitoring
12 IOFF Fast output current monitoring
13 GND Ground
14 VO Output voltage
16 SYNC Synchronization input
4767B–INDCO–10/05 U2102B Figure 2-2. Block Diagram with Typical Circuit for DC Loads POR 33 kΩ/2 W V Ref adjustm ent Voltage Synchronization Buffer Current m onitoring Push pull Load W indow lim itation NTC 120 m s 68 kΩ 1 nF 1 kΩ 100 Ω V m ains
230 V ~
47 µF/25 V IGBT 1 kΩ Stat. ZVS Control Ram p 10 nF RC oscillator 3 8 2 stage/out 61 5 220 nF 1 µF S C Ref 1 M Ω Clock GND Voltage m onitoring Phase Reverse Control Divider (spike- Buffer Test m ode Clock Enable Clock logic filter) signal Trigger +- - Trigger window Enable + - GND 2 stage Clock generator Test logic 1016 9 100 m V 500 m V14 11121315 +- - Q R QTem p S m onitoring S GND Control C R G R sh C R R 22 kΩ 100 kΩ 820 kΩ C 3 R V Ref V Ref S V Ref 0.02 × V Ref 0.1/0.4 0.5 × V Ref 0.55 × V Ref+ 0.2 V 0.45 × V Ref- 0.2 V
4767B–INDCO–10/05 U2102B 3. Power Supply, Synchronization Pins 15 and 16 The U2102B’s voltage limitation circuit enables the power supply via the dropping resistor R1. In the case of DC loads, the entire supply current fl ows into pin 16 and is supplied via an internal diode to pin 15, where the resultant supply voltage is limited and smoothed by C1. The pull-down resistor at pin 16 is necessary in order to guarantee reliable synchronization. As a result, the rec- tified and divided line voltage appears at pin 16, where the amplitude is limited. The power supply for the circuit can be realized in all modes for DC loads as shown in Figure 2-2 on page 4. The voltage at pin 16 is used to synchronize th e circuit with the mains and generate the system clock required for the buffers. The circuit detects a “zero crossing” when the voltage at pin 16 falls below an internal threshold of approximately 8 V. Figure 3-1. Power Supply for DC Loads (R 1 is Identical with Rsync) R1 is calculated as follows: where: VNmin = Vmains – 15% VS = Supply voltage Itot = I Smax + Ix ISmax = Maximum current consumption of the IC Ix = Current consumption of the external components Voltage limitation Push pull Sync. GND S R1 = Rsync Vmains Load IGBT Rsh Temp. monit. RG R1max 0.85 VNmin VS– Itot
4767B–INDCO–10/05 U2102B In the case of AC loads, it is necessary to distinguish the power suppl y purposes of the individ- ual operating modes. In reverse phase control mode (see Figure 3-1 on page 5), pin 15 must be additionally supplied with power via a dropping resi stor, since no current flows in pin 16 when the power switch is switched on. Here, the dropping resistor, R1, is connected to the AC line and has therefore only one mains half-wave. R1 is then calculated as follows: Figure 3-2. Power Supply in Reverse Phase Control Mode for AC Loads In two-wire systems, the additional power supply at pin 15 is not possible (see Figure 3-1 on page 5 , by omitting R 1 and diode D 1). In this case, the resistor R sync is identical with R 1 and should be as low as the power dissipation allows it. A sufficiently large residual phase angle must remain in this case to guarantee the device’s supply. The power supply is simplified if the device is operated as a static zero-voltage switch for AC loads (see Figure 3-2). All delay times are then twice as long, since the synchronization of the module is connected directly to the AC line. R1max 0.85 VNmin VS– Voltage limitation Temp. monit. Push pull Sync. GND Load IGBT Vmains Rsh RG D1Rsyn +VS
4767B–INDCO–10/05 U2102B Figure 3-3. Power Supply as Static Zero-voltage Switch for AC Loads 4. Voltage Monitoring The internal voltage monitoring circuit surpresses uncontrolled conditions or output pulses of insufficient amplitude which may occur while t he operating voltage is being built up or reduced. All latches in the circuit, the divider and the control logic are reset. When the supply voltage is applied, the enable threshold (clamp voltage) of approximately 16 V must be reached so that the circuit is enabled. The circuit is reset at approximately 11 V if the supply voltage breaks down. A further threshold is activated in reverse phase control mode. If the supply voltage breaks down in this mode, after the circuit has been enabled, the output stage is switched off at approximately 12.5 V, while the other parts of the circuit are not affected. The output stage can then be switched on again in the following half-wave. As a result, the residual phase angle remains just large enough, (e.g., in two-wire systems), so that the circuit can still be properly supplied with power. In all operating modes, a single operating cycle is started after the supply voltage is applied, independently of the trigger inputs, in order to immediately demonstrate the overall function. 5. Chip Temperature Monitoring The U2102B includes a chip temperature monito ring circuit which disa bles the output stage when a temperature of approximately 140°C is reached. The circuit will only be enabled again after cooling down and when the operating voltage has been additionally switched off and on. Voltage limitation Temp. monit. Push pull Sync 16 GND +VS Load IGBT Rsh R1 = Rsync Vmains RG
4767B–INDCO–10/05 U2102B 6. Reverse Phase Control In the case of normal phase cont rols, e.g., with a triac, the load current will only be switched on at a certain phase angle after the zero crossing of the mains voltage. In the following zero cross- ing of the current, the triac gets extinguished (switched-off) automatically. Reverse phase control differs from this in that the load current is a lways switched on by a semiconductor switch (for example, IBGT) at the zero crossing of the mains voltage and then switched back off again after a certain phase angle α. This has the advantage that the load current always rises with the mains voltage in a defined manner and thus keeps the required interference suppression to a minimum. The charging current for the capacitor C 3 at pin 2 is set with the resistor R 3 at pin 3. When the synchronization circuit recognizes a zero crossing, an increased charging current of I 2 ≈ 4 × I3 is enabled which then charges C3 up to ≈ 0.45 V. The output stage is switched on at this value and the charging current for C3 is reduced to I2 = I3. Since the actual zero crossing of the supply voltage occurs later than recognized by the circuit, the load current starts to flow quite close to the exact zero crossing of the supply voltage. While the output stage is switched on, C 3 is charged until the control voltage, set externally at pin 4, is reached. When this condition is reached, the output stage is switched off and C 3 is charged again with the increased current (I 2 ≈ 4 × I3) to V2 ≈ 5.5 V. The charging current is switched off at this point and C 3 is discharged internally. The whole process then starts again when the circuit recogni zes another zero cross- ing (Figure 3-3 on page 7). Figure 6-1. Signal Characteristics of Reverse Phase Control t t t Vmains
0.09 V × VRef
1.1 V × VRef
4767B–INDCO–10/05 U2102B 7. Programming Three operating modes can be programmed with the tri-state input pin 6: Zero-voltage switch (ZVS) with static output (V6 = V1 = VRef): The reverse phase control is inactive here. Th e output stage is statically switched on after triggering by the timer and switched off again after the running down of the time (at the zero crossing of the supply voltage in each case). This operating mode is not possible in two-wire systems. Reverse phase control with two-stage switch-off (V 6 = V15 = VS): The maximum current flow angle, αmax, is set when the timer has enabled the output stage. Switchover to the phase angle α, which can be set arbitrarily at pin 4, takes place after expiry of 3/4 of the tracking time set at pin 5. The output stage switches off after expiry of the whole tracking time. Two-stage reverse phase control with dimming function (V6 = V13 = GND): The output stage switches to the maximum current flow angle, αmax, (adjustable) if the trig- ger condition for both inputs (pins 7, 8) is sati sfied. Switchover to the current flow angle, α, set at pin 4 takes place after expiry of 3/4 of the tracking time set at pin 5. The whole process is repeated from the beginning if renewed triggering takes place at pin 8. The lamp is switched-off in the following half-wave of the mains voltage if the trigger condition at pin 7 disappears. In this mode, the output stage is switched-on even if only pin 7 is in the ON state. The current flow angle is then determined by V 4 (e.g., house number illumination, twi- light switch). 8. Trigger Inputs The trigger condition of the timer is determined by the two inputs at pins 7 and 8. A Light Depen- dent Resistor (LDR) can be connected to pin 7, fo r example, and an IR sensor to pin 8. Since both inputs are equal and AND-gated they must both be in the ON state to initiate triggering. In the operating mode “2-stage reverse phase control”, the output stage can additionally be switched on and switched off by pin 7 alone and independently of the timer. The enable input pin 7 is implemented as a comparator with hysteresis. The enable threshold is approximately 2.5 V. The blocking threshold is sw itched by the control logic in order to avoid faults as a result of load switching. This threshold is approximately 2 V in switched off condition and also during the second current flow angle, α, in two-stage reverse phase control mode. Oth- erwise, the blocking or switch-off threshold is 0.5 V. The input pin 8 is designed as a window discriminator, its window is set at pin 9. The minimum window of approximately 250 mV is set with V 9 = V13, and the maximum window of approxi- mately 1.25 V with V9 = Vl. The window discriminator is in the OFF state when the voltage at pin 8 lies within the window set at pin 9. If a resistor divider with an NTC resistor is connected to pin 9, for example, it is possible to com- pensate the temperature dependence of the IR sensor, i.e., the range is made independent of temperature. Noise suppression for tON = 40 ms guarantees that there are no peak noise signals at the inputs which could trigger the circuit. Equally, renewed triggering is prevented for t OFF = 640 ms after load switch-off to avoid any self interference.
4767B–INDCO–10/05 U2102B 10. Current Monitoring The U2102B’s current monitoring circuit repres ents a double electronic fuse. The circuit mea- sures the current flowing through the power switch by means of the voltage drop across the shunt resistor Rsh. This voltage is supplied to pin 11. If this voltage exceeds a value of 500 mV due to a high load current (e.g., short circuit), the switch-off latch is set and the switching output pin 11 closes immediately. Pin 11 can be conn ected to the gate via a resistor or network, depending on load conditions, thus allowing the switch-off behavior to be adapted to the respec- tive requirements. The short-circuit current is reduced to a problem-free value by this procedure. There is a second threshold at 100 mV. Without exceeding the switch-off threshold of 500 mV, the output stage is also disabled in the voltage at pin 11 exceeds the value of 100 mV for ≥ 120 ms at one half-wave. To prevent the occurrence of high-voltage peaks in the over current condition due to the line and leakage inductances, the output stage is not switched off immedi- ately. It is disabled during the next half-wave. 11. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Reference point pin 13, unless otherwise specified. Parameters Pin Symbol Value Unit Power supply Current t < 10 µs 15 I S is mA mA Synchronization Input current t ≤ 10 µs
16 I I
Output current 1 - I Ref 10 mA Push-pull output stage Output current t ≤ 2 ms ±IO ±io mA mA Input currents I II -II ± II II 0.2 mA mA mA mA mA Input voltage 4, 5, 7, 8, 9, 11 6 and 12 V I VI 0 to V1 0 to V15 V V Storage temperature range T stg -40 to +125 °C Junction temperature T j +125 °C Ambient temperature T amb -10 to +100 °C
4767B–INDCO–10/05 U2102B 12. Thermal Resistance Parameters Symbol Value Unit Junction ambient DIP16 R thJA 120 K/W SO16 on PC board R thJA 180 K/W SO16 on ceramic R thJA 100 K/W 13. Electrical Characteristics VS = 15.0 V, fmains = 50 Hz, Tamb = 25°C, reference point pin 13, unless otherwise specified. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Supply Voltage Limitation IS = 2 mA IS = 5 mA 15 VS VS 15.2 17.2 V V Current Consumption V S = 15 V 15 I S 2m A Voltage Monitoring 15 Switch-on threshold Switch-off threshold Undervoltage threshold VSON VSOFF V15 14.8 10.4 11.7 12.5 16.5 11.6 13.3 V V V Reference Voltage -I 1 = 0 to 5 mA 1 V Ref 4.75 5 5.25 V Synchronization Voltage limitation Input current Zero crossing switch-on threshold Zero crossing switch-off threshold I 16 = 2 mA V16 = 0 V 15, 16 Vlimit - II VTON VTOFF 7.3 7.9 0.8 100 7.7 8.3 8.1 8.7 V µA V V Reverse Phase Control 3 Ramp current setting Input current Input voltage I3 = -10 µA -II V3 4.7 5 5.3 µA V Ramp I 3 = -10 µA 2 Charging current 1 Charging current 2 Discharge impedance Switch-on threshold, output stage Discharge threshold voltage 1, 2 -Ich1 -Ich2 Rdis VTON Vdis 410 450 600 490 µA µA kΩ mV mV Control Voltage 4 Input voltage Input current V 13 ≤ V4 ≤ Vl VI ±II
0 VRef
V nA Programming, Tri-state Input 6 Input current V 13 ≤ V6 ≤ V15 ±II 1µ A Operating mode: Static zero-voltage switch 2-stage reverse phase control with switch-off 2-stage reverse phase control VI VI VRef + 1 VRef + 0.3 VS 0.3 V V RC Oscillator 5 Input current Upper threshold Lower threshold Discharge impedance V13 ≤ V5 < 3.6 V ±II VTU VTL Rdis 3.6 0.9 500 4.4 1.1 nA V V kΩ
4767B–INDCO–10/05 U2102B Window Discriminator Input current 0 V ≤ V8 ≤ Vl 8± I I 500 nA Upper threshold Lower threshold 8, 9 VTU VTL V V Input current window adjustment 0 V ≤ V9 ≤ V1 9± I i 500 nA Minimum window: Lower threshold Upper threshold V9 = V13 8V TL1 VTU1 2.05 2.55 2.75 3.75 2.45 2.95 V V Maximum window: Lower threshold Upper threshold V9 = V1 8V TL2 VTU2 1.1 3.4 1.25 3.75 1.4 4.1 V V Enable Schmitt Trigger 7 Input current 0 V ≤ V7 ≤ Vl ±Ii 500 nA Enable threshold V T 2.3 2.5 2.7 V Blocking threshold: Output stage OFF Output stage ON, except in the case of two-stage reverse phase control in second stage (α) V T VT 1.8 0.45 0.5 2.2 0.55 V V Threshold for test mode V T 85 100 115 mV Current Monitoring 11 Input current Switch-off threshold 1 Switch-off threshold 2
0 V ≤ V11 ≤ V1
±Ii VT1 VT2 450 100 500 500 120 550 nA mV mV Switching Output 12 Leakage current V 11 < 450 mV, V12 ≤ V15 Ilkg 1µ A Saturation voltage V11 > 550 mV I12 = 0.5 mA I12 = 10 mA VSat VSat 1.0 1.2 V V Push-pull Output Stage Upper saturation voltage, ON state I 14 = -10 mA 14, 15 -V Sat 2.4 V Lower saturation voltage, OFF state I14 = 10 mA 14 V SatL 1.2 V Output current ON state OFF state 14 -IO IO mA mA 13. Electrical Characteristics (Continued) VS = 15.0 V, fmains = 50 Hz, Tamb = 25°C, reference point pin 13, unless otherwise specified. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit
4767B–INDCO–10/05 U2102B Figure 13-1. House Number or Staircase Illumination for AC Loads House Number Illumination: V6 = V13 Staircase Illumination: V6 = V15 10 nF C3 R3 14 13 12 11 10 23 4 5 6 71 8 91516 RG IGBT Rsh 100 Ω 1 kΩ Vmains 100 kΩRsync 220 kΩ 22 kΩ/2 W 47 µF/ 25 V 1 nF NTC 820 kΩ 100 kΩ
1 MΩ 22 kΩ
1 µFCRef U2102B GND Control VS
4767B–INDCO–10/05 U2102B Figure 13-2. Zero-voltage Switch Mode for AC Loads 22 nF 14 13 12 11 10 23 4 56 71 8 91516 RG IGBT Rsh 100 Ω 1 kΩ Vmains 68 kΩ18 kΩ/2 W 47 µF/25 V 1 nF NTC 750 kΩ 1 µFCRef U2102B GND R1 = Rsync VS
4767B–INDCO–10/05 U2102B Figure 13-3. Reverse Phase Control for AC Loads 10 nF 14 13 12 11 10 91516 IGBT Load 1N4007 100 kΩ 1 nF 1 MΩ CRef = 1 µF U2102B Rsync = 220 kΩ 23 4 5 6 718 Control VS RG Rsh 100 Ω 1 kΩ Vmains 22 kΩ/2 W 47 µF/ 25V 100 kΩ VS VS 100 kΩ 100 kΩ 100 kΩ
4767B–INDCO–10/05 U2102B 15. Package Information 14. Ordering Information Extended Type Number Package Remarks U2102B-xY DIP16 Tube, Pb-free U2102B-xFPY SO16 Tube, Pb-free U2102B-xFPG3Y SO16 Taped and reeled, Pb-free Dimensions in mm 0.5 min 1.64 1.44 technical drawings according to DIN specifications 20.0 max 4.8 max 3.3 7.82 7.42 6.4 max 0.39 max 9.75 8.150.58 0.48 2.54 17.78Alternative 16 9
4767B–INDCO–10/05 U2102B 16. Revision History technical drawings according to DIN specifications Dimensions in mm 10.0 9.85 8.89 0.4 1.27 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2 16 9 Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 4767B-INDCO-08/05
- Put datasheet in a new template
- First page: Pb-free logo added
- Page 17: Ordering Information changed
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