U2008B-MFP

U2008B ATMEL | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 13

Technical content

Features

• Full Wave Current Sensing  Compensated Mains Supply Variations  Variable Soft Start or Load-current Sensing  Voltage and Current Synchronization  Switchable Automatic Retriggering  Triggering Pulse Typically 125 mA  Internal Supply-voltage Monitoring  Current Requirement ≤ 3 mA

Applications

 Low-cost Motor Control  Domestic Appliance 1. Description The U2008B is designed as a phase-control circuit in bipolar technology. It enables load-current detection as well as mains-compensated phase control. Motor control with load-current feedback and overload protection are preferred applications. Figure 1-1. Block Diagram with Typical Circuit: Load Current Sensing Automatic retriggering Limiting detector Current detector Full wave load current Soft start Voltage detector Phase control unit Mains voltage compensation Supply voltage limiting Reference voltage Voltage monitoring 22 kΩ/2W BYT51K TIC 226 Load Load current compensation Set point 100 nF3.3 nF

230 V ~

+ - V(R6) = ±250 mV U2008B 22 µF/ 25 V ϕ = f(V3) 330 kΩ 1 MΩ R1 D1 R8 180Ω R6 C3 R10 100 kΩ 47 kΩ R14 -VS detector αmax Low-cost Phase-control IC with Soft Start U2008B 4712C–AUTO–07/07

4712C–AUTO–07/07 U2008B Figure 1-2. Block Diagram with Typical Circuit: Soft Start Automatic retriggering Limiting detector Current detector Full wave load current detector Soft start Voltage detector Phase control unit ϕ = f(V3) Mains voltage compensation Supply voltage limiting Reference voltage Voltage monitoring 680 kΩ 22 kΩ/2W BYT51K 470 kΩ 180Ω TIC 226 Load 68 kΩ Set point 100 nF10 nF 50 kΩ 220 kΩ GND 100 µF 25V + - L Soft start 4.7 µF/25V N U2008B R1 D1 -VS R10 C4C3 αmax

4712C–AUTO–07/07 U2008B 2. Pin Configuration Figure 2-1. Pinning

2.1 Mains Supply, Pin 5

The integrated circuit U2008B, which also contains voltage limiting, can be connected via D1 and R1 to the mains supply, see Figure 1-2 on page 2 . Supply voltage, between Pin 4 (pos., ⊥) and Pin 5, is smoothed by C1. The series resistance R1 can be calculated as follows: where: Operation with externally stabilized DC voltage is not recommended. ISENSE Cϕ CONTROL GND OUTPUT VSYNC Rϕ -VS U2008B Table 2-1. Pin Description Pin Symbol Function

1 ISENSE Load current sensing

2C ϕ Ramp voltage

3 CONTROL Control input/compensation output

4 GND Ground

6R ϕ Ramp current adjustment

7 VSYNC Voltage synchronization

8 OUTPUT Trigger output

VM = Mains voltage VSmax = Maximum supply voltage Itot = ISmax + Ix = Total current compensation ISmax = Maximum current consumption of the IC Ix = Current consumption of the external components R1max 0.85 VM VSmax–

4712C–AUTO–07/07 U2008B

2.2 Voltage Monitoring

When the voltage is built up, uncontrolled output pulses are avoided by internal voltage monitor- ing. Apart from that, all latches of the circuit (phase control, load limit regulation) are reset and the soft start capacitor is short circuited. This guarantees a specified start-up behavior each time the supply voltage is switched on or after short interruptions of the mains supply. Soft start is ini- tiated after the supply voltage has been built up. This behavior guarantees a gentle start-up for the motor and automatically ensures the optimum run-up time.

2.3 Phase Control, Pin 6

The function of the phase control is identical to that of the well-known IC U211B. The phase angle of the trigger pulse is derived by comparing the ramp voltage V2 at Pin 2 with the set value on the control input, Pin 3. The slope of the ramp is determined by C 3 and its charging current I The charging current can be regulated, changed or altered using R8 at Pin 6. The maximum phase angle, αmax, (minimum current flow angle ϕmin) can also be adjusted by using R8 (see Figure 5-1 on page 7). When the potential on Pin 2 reaches the set point level of Pin 3, a trigger pulse is generated whose pulse width, tp, is determined from the value of C3 (tp = 9 µs/nF, Figure 5-3 on page 8). At the same time, a latch is set with the output pul se, as long as the automatic retriggering has not been activated, then no more pulses can be generat ed in that half cycle. Control input at Pin 3 (with respect to Pin 4) has an active range from -9 V to -2 V. When V 3 = -9 V the phase angle is at its maximum amax, i.e., the current flow angle is minimum. The minimum phase angle amin is set with V3 ≥ -1 V.

2.4 Automatic Retriggering

The current-detector circuit monitors the state of the triac after triggering by measuring the volt- age drop at the triac gate. A current flow through the triac is recognized when the voltage drop exceeds a threshold level of typically 40 mV. If the triac is quenched within the relevant half wave after triggering (for example owing to low load currents before or after the zero crossing of current wave, or for commutator motors, owing to brush lifters), the automatic retriggering circ uit ensures immediate retriggering, if necessary with a high repetition rate, tpp/tp, until the triac remains reliably triggered.

2.5 Current Synchronization, Pin 8

Current synchronization fulfils two functions:  Monitoring the current flow after triggering. In case the triac extinguishes again or it does not switch on, automatic triggering is activated as long as triggering is successful.  Avoiding triggering due to inductive load. In the case of inductive load operation, the current synchronization ensures that in the new half wave no pulse is enabled as long as there is a current available from the previous half wave, which flows from the opposite polarity to the actual supply voltage. A special feature of the IC is the realization of current synchronization. The device evaluates the voltage at the pulse output between the gate and reference electrode of the triac. This results in saving the separate current synchronization input with specified series resistance.

4712C–AUTO–07/07 U2008B

2.6 Voltage Synchronization with Mains Voltage Compensation, Pin 7

The voltage detector synchronizes the reference ramp with the mains supply voltage. At the same time, the mains-dependent input current at Pin 7 is shaped and rectified internally. This current activates automatic retriggering and at the same time is available at Pin 3 (Figure 5-5 on page 9 ). By suitable dimensioning, it is possible to attain the specified compensation effect. Automatic retriggering and mains voltage compensation are not activated until ⏐V7 - V 4⏐ increases to 8 V. The resistance R sync. defines the width of the zero voltage cross-over pulse, synchronization current, and hence the mains supply voltage compensation current. If the mains voltage compensation and the automatic retriggering are not required, both functions can be suppressed by limiting ⏐V 7 - V4⏐ ≤ 7 V (see Figure 2-2). Figure 2-2. Suppression of Automatic Retriggering and Mains Voltage Compensation A further feature of the IC is the selection between soft start and load-current compensation. Soft start is possible by connecting a capacitor between Pin 1 and Pin 4 ( Figure 5-4 on page 8). In the case of load-current compensation, Pin 1 is directly connected with resistance R6, which is used for sensing load current.

2.7 Load Current Detection, Pin 1

The circuit continuously measures the load current as a voltage drop at resistor R 6. The evalua- tion and use of both half waves results in a quick reaction to load-current change. Due to voltage at resistor R 6, there is an increase of input current at Pin 1. This current increase controls the internal current source, whose positive cu rrent values are available at Pin 3 (see Figure 5-7 on page 9). The output current generated at Pin 3 contains the difference from the load-current detection and the mains-voltage compensation (see Figure 5-5 on page 9). The effective control voltage is the final current at Pin 3 together with the desired value network. An increase of mains voltage causes an increase of the control angle α. An increase of load cur- rent results in a decrease of the control angle. This avoids a decrease in revolution by increasing the load as well as an increase of revolution by the increment of mains supply voltage. BZX55 C6V2 U2008B Mains

4712C–AUTO–07/07 U2008B 3. Absolute Maximum Ratings VS = 14 V, reference point Pin 4, unless otherwise specified Parameters Symbol Value Unit Current limitation Pin 5 t ≤ 10 µs -IS 30 mA -iS 100 mA Synchronous currents Pin 7 t ≤ 10 µs ±IsyncV ±isyncV mA mA Phase Control Pin 3 Control voltage -V I VS to 0 V Input current ±I I 500 mA Charge current Pin 6 -I ϕmax 0.5 mA Load Current Monitoring/Soft Start, Pin 1 Input current I I 1m A Input voltage V I -VS to +2 V Pulse output Input voltage Pin 8 +VI -VI VS V V Storage temperature range T stg -40 to +125 °C Junction temperature range T j -10 to +125 °C 4. Thermal Resistance Parameters Symbol Value Unit Junction ambient DIP8 R thJA 110 K/W SO8 on p.c. R thJA 220 K/W So8 on ceramic R thJA 140 K/W 5. Electrical Characteristics Parameters Test Conditions Symbol Min. Typ. Max. Unit Supply (Pin 5) Supply-voltage limitation -I S = 3.5 mA -IS = 30 mA -VS -VS 14.5 14.6 16.5 16.8 V V Current requirement Pins 1, 4 and 7 open -I S 3.0 mA Voltage Monitoring (Pin 5) Turn-on threshold -V TON 11.3 12.3 V Phase Control Input current Voltage sync. Pin 7 Current sync. Pin 8 ±IsyncV ±IsyncI 3 0.15 2 mA µA Voltage limitation ±I L = 2 mA Pin 7 ±V syncV 8.0 8.5 9.0 V Reference Ramp (see Figure 5-1 on page 7) Charge current Pin 7 I ϕ 1 100 µA Start voltage Pin 2 -V max 1.85 1.95 2.05 V

4712C–AUTO–07/07 U2008B Figure 5-1. Ramp Control Temperature coefficient of start voltage Pin 2 -TC R -0.003 %/K Rϕ - reference voltage I ϕ = 10 µA, Pins 6 to 5 V Rϕ 0.96 1.02 1.10 V Temperature coefficient Iϕ = 10 µA, Pin 6 Iϕ = 1 µA TCVRϕ TCVRϕ 0.03 0.06 %/K %/K Pulse Output (see Figure 5-2 on page 8) (Pin 8) Output-pulse current V 8 = -1.2, RGT = 0 Ω I0 100 125 150 mA Output-pulse width C 3 = 3.3 nF , VS = Vlimit tp 30 µs Automatic Retriggering (Pin 8) Turn-on threshold voltage ±V ION 20 60 mV Repetition rate I 7 ≥ 150 µA t pp 35 7 . 5 t p Soft Start (see Figure 5-4 on page 8) (Pin 1) Starting current V 1–4 = 8 V I 0 51 0 1 5 µ A Final current V 1–4 = -2 V I 0 15 25 40 µA Discharge current -I 0 0.5 mA Output current Pin 3 -I 0 0.2 2 mA Mains Voltage Compensation (see Figure 5-5 on page 9) Current transfer gain I7/I3 Pins 7, Pin 3 Pins 1 and 2 open Gi 14 17 20 Reverse current V (R6) = V3 = V7 = 0, Pin 3 ±I R 2µ A Load-current Detection, V7 = 0 (see Figure 5-7 on page 9) Transfer gain I 3/V1 G 0.28 0.32 0.37 µA/mV Offset current V 1 = 0, V3 = -8 V, Pin 3 I 0 036 µ A Input voltage Pin 1 -V I 300 400 mV Input offset voltage Pin 1 ±V 0 6m V 5. Electrical Characteristics (Continued) Parameters Test Conditions Symbol Min. Typ. Max. Unit 100 150 200 250 0 200 400 600 800 100 0 Rϕ(R8) (kΩ) Phase Angle α (˚) 33 nF 10 nF 6.8 nF 4.7 nF 3.3 nF 2.2 nF Cϕ/t = 1.5 nF

4712C–AUTO–07/07 U2008B 7. Package Information 6. Ordering Information Extended Type Number Package Remarks U2008B-xY DIP8 Tube, Pb-free U2008B-xFPY SO8 Tube, Pb-free U2008B-xFPG3Y SO8 Taped and reeled, Pb-free Dimensions in mm specifications according to DIN technical drawings 9.8 max. 2.54 nom. 0.3 0.36 max. B 0.4 A A B 1.54 0.65 9.6±0.1 7.62±0.15 3.6±0.1 4.2±0.3 1.8 6.7 2.5 1.2±0.3 0.53±0.05 6.3±0.1 Issue: 1; 16.01.02 Drawing-No.: 6.543-5040.01-4

4712C–AUTO–07/07 U2008B 8. Revision History Package: SO 8 Dimensions in mm specifications according to DIN technical drawings Issue: 1; 15.08.06 Drawing-No.: 6.541-5031.01-4 0.2 5±0.2 3.8±0.1 6±0.2 3.7±0.1 4.9±0.1 3.81 0.4 1.27 0.1+0.15 1.4 Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 4712C-AUTO-07/07

• Put datasheet in a new template
• Pb-free logo on page 1 deleted
• Figure 5-5 “Mains Voltage Compensation” on page 9 changed
• Figure 5-7 “Load-current Detection” on page 9 changed 4712B-AUTO-08/05
• Put datasheet in a new template
• First page: Pb-free logo added
• Page 11: Ordering Information changed

4712C–AUTO–07/07 Headquarters International Atmel Corporation

2325 Orchard Parkway

San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza

77 Mody Road Tsimshatsui

Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-en-Yvelines Cedex France Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Product Contact Web Site www.atmel.com Technical Support auto_control@atmel.com Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL ’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL ’S WEB SITE, ATMEL ASSUMES NO LI ABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTOR Y WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICU LAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR I NCIDEN- TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATME L HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or comp leteness of the contents of this document and reserves the rig ht to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained her ein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not int ended, authorized, or warranted for use as components in applications in tended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel ®, logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.