TW3DEVAL

IC-TW3 ICHAUS | Alldatasheet

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iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 1/24

FEATURES

♦ Fully differential 3-channel signal conditioning ♦ PGS inputs for differential and single-ended signals ♦ Overall gain of -3 to 57 dB, adjustable in steps of 0.08 dB ♦ Output referred offset range of ±1.2 V, adjustable in steps of 2 mV ♦ Signal bandwidth to 1 MHz and in/out latency below 1 µs ♦ Selectable automatic gain and offset control for encoder

applications

♦ On-chip or off-chip temperature sensing ♦ Temperature drift compensation for gain and offset via programmable look-up-tables ♦ Short-circuit-proof outputs: 1 Vpp to 100Ω, 2 Vpp to 1 kΩ ♦ I2C interface to restore device setup from serial EEPROM ♦ Bidirectional 1-wire interface for direct RAM and EEPROM access ♦ Optical setup link via 1-wire interface operating a photo receiver ♦ Single 3.0 V to 5.5 V supply ♦ Operating temperature range of -40 to +125 °C ♦ Programmable general purpose sensor interface ♦ Optical position sensors ♦ Magnetic position sensors ♦ Incremental position sensors ♦ Linear scales PACKAGES QFN32 BLOCK DIAGRAM Copyright © 2009 iC-Haus http://www.ichaus.com

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 2/24

DESCRIPTION

The general purpose sensor signal conditioner iC- TW3 provides highly accurate non contact trimming of three independent sine/cosine sensor signals. The differential output signals can be calibrated to 1 Vpp or to 2 Vpp, alternatively. The internal or an external temperature sensor linked to the chip can influence the gain and offset correc- tion by arbitrary temperature-dependent compensa- tion parameters sourced from a look-up table. For encoder applications an automatic gain and off- set control compensates sensor offset voltages and stabilizes the output signal level. The direct connection of sine/cosine encoders, MR sensor bridges or photosensor arrays is possible and supported by a selectable input impedance.

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 3/24 PACKAGES PIN CONFIGURATION QFN32 5 mm x 5 mm TW3 code... ... 25262728293132 9 11 12 13 14 15 16

30 PIN FUNCTIONS

No. Name Function

1 PINZ Signal Input Z+

2 NINZ Signal Input Z-

3 TESTEN Test Mode Enable Input

4 CLK External Clock Input

5 NZO Signal Output Z-

6 ZO Signal Output Z+

7 GNDB Driver Ground

8 VDDB +3...+5.5 V Driver Supply Voltage

9 NBO Signal Output B-

10 BO Signal Output B+

11 GND Digital Ground

12 SCL I2C Interface, clock line

13 SDA I2C interface, data line

14 VDD +3...+5.5 V Digital Supply Voltage

15 GNDA Driver Ground

16 n.c. not connected

17 AO Signal Output A+

18 NAO Signal Output A-

19 VDDA +3...+5.5 V Driver Supply Voltage 20 1W 1-Wire Interface, bidirectional port

21 NERR Error Message Output, active low

22 NRST External Reset Input, active low

23 NSTORE* Coefficient Store Input, active low

24 n.c. not connected

25 NINA Signal Input A-

26 PINA Signal Input A+

27 KELVIN External Temperature Sensor Input

28 GNDIN Input Ground

29 VDDIN +3...+5.5 V Input Supply Voltage

30 PINB Signal Input B+

31 NINB Signal Input B-

32 VC 1.21 V Reference Voltage Output, Reference Voltage Input TP TP** Thermal Pad Notes: *) Pin NSTORE should be wired to VDD. **) The Thermal Pad of the QFN package (bottom side) is to be connected to a ground plane on the PCB which must have GND potential.

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 4/24 ABSOLUTE MAXIMUM RATINGS These ratings do not imply operating conditions; functional operation is not guaranteed. Beyond these ratings device damage may occur. Item Symbol Parameter Conditions Unit No. Min. Max. G001 VDDx() Voltage at VDD, VDDA, VDDB, VDDINreferenced to GND, GNDA, GNDB, GNDIN -0.3 6.0 V G002 V() Voltage applied to any other pinreferenced to GND -0.3 VDD + 0.5 V G003 V() Voltage Difference VDDA, VDDB vs. VDD 0.5 V G004 V() Voltage Difference VDDIN vs. VDD 0.5 V G005 V() Voltage Difference GNDA, GNDB vs. GND 0.5 V G006 V() Voltage Difference GNDIN vs. GND 0.5 V G007 Vd ESD Susceptibility Of Signal Outputs: AO, NAO, BO, NBO, ZO, NZO HBM, 100 pF discharged through 1.5 kΩ 2 kV G008 Vd ESD Susceptibility (remaining pins)HBM, 100 pF discharged through 1.5 kΩ 2 kV G009 Tj Junction Temperature -40 150 °C G010 Ts Storage Temperature -40 150 °C THERMAL DATA Item Symbol Parameter Conditions Unit No. Min. Typ. Max. T01 Ta Operating Ambient Temperature Range -40 125 °C T02 Rthja Thermal Resistance Chip To Ambientsurface mounted to PCB according to JEDEC 51

40 K/W

All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative.

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 5/24

ELECTRICAL CHARACTERISTICS

Item Symbol Parameter Conditions Unit No. Min. Typ. Max. Total Device

001 VDDx Permissible Supply Voltage

at VDD, VDDA, VDDB, VDDIN 3.0 5.5 V 002 I(VDDx) Total Supply Current VDDx = 3.3 V 15 mA VDDx = 5.5 V 25 mA 003 Vc()hi Clamp-Voltage hi at all pinsVc()hi = V() - VDD; I() = 10 mA 0.3 1.4 V 004 Vc()lo Clamp-Voltage lo at all pinsI() = -10 mA -1.2 -0.3 V Analog Signal Inputs PINA, NINA, PINB, NINB, PINZ, NINZ 101 Vin()sig Permissible Input Voltage Range 1.4 VDD - 1.2 V V

102 Vin()os Input Offset Voltage ±5 ±15 mV

103 Iin() Input Current ENSIGAB = 0, ENSIGZ = 0 -35 35 nA

104 Rpu() Input Pull-Up Resistor ENSIGAB = 1, ENSIGZ = 1 2.0 2.5 3 M Ω 105 fg -3 dB Bandwidth PGA gain of 36 dB 1.2 MHz

106 CMRR Common Mode Rejection Ratio fc < 1 MHz 40 dB

fc < 1 kHz 60 dB

107 PSRR Power Supply Rejection Ratiofc < 1 MHz 40 dB

fc < 1 kHz 60 dB 108 en Input Voltage Noise f = 1 kHz 20 n V/√Hz f = 100 Hz 25 n V/√Hz f = 0.1 to 10 Hz 2 µ V/√Hz 109 ∆DGAIN Dynamic Gain Step Width 0.08 dB 110 ∆DOFFS Dynamic Offset Step Width 2 mV Temperature Sensor and Analog Input KELVIN 201 Tor Int. Temperature Sensor Operat- ing Range after calibration of ADC; -50 150 °C 202 Tacc Device-To-Device Temp. Sensor Variation after calibration of ADC, ± 10 °C Tj = -40 °C to 125 °C 203 Vin()low Temperature Input Voltage CELSIUS(7:0) = 10 1.7 V CELSIUS(7:0) = 245 0.9 V 204 Iin() Input Current at KELVIN V(KELVIN) = 0 .. VDD -50 50 nA

205 T()lo Lo-Temperature ADC Reading,

via Register CELSIUS(7:0) after calibration of ADC; XCELSIUS = 0, internal sensor: Tj = -40 °C 19 XCELSIUS = 1, ext. sensor: V(KELVIN) = 1.7 V 10

206 T()hi Hi-Temperature ADC Reading,

via Register CELSIUS(7:0) after calibration of ADC; XCELSIUS = 0, internal sensor: Tj = 125 °C 224 XCELSIUS = 1, ext. sensor: V(KELVIN) = 0.9 V 245 Reference Voltage Input/Output VC 301 Vout(VC) Reference Voltage Output VEXT = 0; CL = 100 nF , I() = 0 mA 1.10 1.21 1.35 V

302 Vin(VC) Permissible Input Voltage Range

VEXT = 1 0 2.21 V 303 Iin(VC) Input Current at VC VEXT = 1 -0.1 1 µA Power-On Reset and Input NRST

401 VDDon Turn-On Threshold (power-on

release) increasing voltage at VDD 3.0 V

402 VDDoff Turn-Off Threshold (power-down

reset) decreasing voltage at VDD 2.6 V 403 Vt()hi Input Threshold Voltage hi VDD = 3.3 V +/- 10 % 1.5 V 404 Vt()lo Input Threshold Voltage lo VDD = 3.3 V +/- 10 % 0.8 V 405 Ipu() Input Pull-Up Current V() = 0...VDD - 1 V -3 µA

406 Vpu() Input Pull-Up Voltage Vpu() = VDD - V(), I() = -3 µA 700 mV

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 6/24 Item Symbol Parameter Conditions Unit No. Min. Typ. Max. Oscillator CLK, TESTEN 501 Vt()hi Input Threshold Voltage hi VDD = 3.3 V +/- 10 % 1.5 V 502 Vt()lo Input Threshold Voltage lo VDD = 3.3 V +/- 10 % 0.8 V 503 Ipd() Input Pull-Down Current V() = 1 V...VDD 3 µA

504 Vpd() Input Pull-Down Voltage I() = 3 µA 700 mV

505 fosc Oscillator Frequency TEST_CLK = 1, measured at NERR; CLKDIV = 0 (low active) 2 MHz CLKDIV = 1 4 MHz 506 fin() Permissible External Clock Fre- quency at CLK

4 MHz

601 Vs()lo Saturation Voltage lo I() = 1 mA 300 mV

602 Isc()lo Short-Circuit Current lo 2 mA

603 Ipu() Input Pull-Up Current V() = 0...VDD - 1 V -3 µA

604 Vpu() Input Pull-Up Voltage Vpu() = VDD - V(), I() = -3 µA 700 mV

605 tr(), tf()Rise and Fall Time (10/90%) VDD = 3.3 V, CL = 10 pF 32 ns 606 Vt()hi Input Threshold Voltage hi VDD = 3.3 V +/- 10 % 1.5 V 607 Vt()lo Input Threshold Voltage lo VDD = 3.3 V +/- 10 % 0.8 V I2C Interface SDA, SCL

701 Vs()lo Saturation Voltage lo I() = 1 mA 400 mV

702 Isc()lo Short-Circuit Current lo V() = 1V...VDD 3 mA 703 Ipu() Pull-Up Current V() = 0...VDD - 1 V -3 µA

704 Vpu() Input Pull-Up Voltage Vpu() = VDD - V(), I() = -3 µA 700 mV

705 Vt()hi Input Threshold Voltage hi at

706 Vt()lo Input Threshold Voltage lo at

707 fclk() Write/Read Clock Frequency at SCL CLKDIV = 0 100 kHz 708 tbusy()cfgDuration Of Startup ConfigurationCLKDIV = 0, 2 LUT blocks 20 ms CLKDIV = 0, 16 LUT blocks 80 ms Digital Output NERR

901 Vs()lo Saturation Voltage lo I() = 1 mA 400 mV

902 Vs()hi Saturation Voltage hi Vs()hi = VDD - V(); I() = -1 mA 400 mV

903 Isc()lo Short-Circuit Current lo 3 mA

904 Isc()hi Short-Circuit Current hi -2.5 mA

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 7/24 Item Symbol Parameter Conditions Unit No. Min. Typ. Max. Line Driver Outputs AO, NAO, BO, NBO, ZO, NZO B01 Vpk()max Permissible Output AmplitudeVDD = 3 V, RL = 50Ω vs. VDD/2 550 mV B02 Vdc() Output DC Voltage VDD / 2 B03 ∆Vout() Output Voltage Load Depen- dency I() = 0...5 mA 50 mV B04 Isc()lo Short-Circuit Current lo pin shorten to VDD/2 12 50 mA B05 Isc()hi Short-Circuit Current hi pin shorten to VDD/2 -50 -12 mA B06 Isc() Output Current Limitation hi/loV() = 0...VDD 40 50 mA B07 SR()hi, loSlew Rate hi/lo CL() = 5 nF 3 V / µs CL() = 50 pF 4 V / µs B08 tS Settling Time CL() = 5 nF , to 0.1% of final value 1 µs B09 dbVlin Output Linearity 100 kHz sine and diff. 1 Vpp output voltage; RL() > 1 kΩ 80 dB RL() = 120Ω 60 dB B10 CLmax Maximum Capacitive Output Load no sustained oscillation 100 nF

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 8/24 PROGRAMMING CHECKSUM: EEPROM Checksum SINGLEIN: Single ended input functionality ENSIGAB: Input signal error detection control CGAINA/B: Coarse gain select for channel A/B COFSA/B: Coarse offset select for channel A/B DGAINA/B: Dynamic gain on channel A/B DOFSA/B: Dynamic offset on channel A/B OGAIN: Output amplifier gain select on chan- nel A/B FILTER: Signal path filter select PDA/B: Power down control for channel A/B SINGLEZ: Single ended input functionality for in- dex channel Z MODEZ: Channel Z output mode select BYPASSZ: Channel Z comparator bypass control GAINZ: Gain select for channel Z OFSZ: Offset select for channel Z OGAINZ: Output amplifier gain select on chan- nel Z ENSIGZ: Input signal error detection control on channel Z PDZ: Power down control for channel Z POLARITYZ: Channel Z polarity select VEXT: Target voltage select DYNAMIC: Automatic compensation control FREQ: Automatic adaption frequency GENTLE: Automatic compensation update rate XCELSIUS: Temperature sensor select FCELSIUS: Fine temperature offset value CCELSIUS: Coarse temperature offset value CELSIUS: Current temperature value ERR_SIG: Signal unconnected alarm ERR_TEMP: Temperature alarm ERR_EE: EEPROM error condition TEMP: Temperature compensation control PD_CELSIUS: Power down control for internal tem- perature sensor TEST_CLK: Internal test clock oscillator control CLKDIV: Internal clock divider select

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 9/24 REGISTER MAP Adr Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Configuration Registers 0x00 ROM Device ID[7:0] 0x01 OGAIN[1:0] SINGLEIN FREQ[1:0] GENTLE DYNAMIC TEMP 0x02 VEXT XCELSIUS OGAINZ[1:0] MODEZ BYPASSZ SINGLEINZ POLARITYZ 0x03 ERR_SIG ERR_TEMP ERR_EE TALARM[2:0] ENSIGZ ENSIGAB 0x04 EN_NSTORE* FILTER[1:0] PDZ PDB PDA 0x05 CCELSIUS[3:0] FCELSIUS[3:0] 0x06 GAINZ[2] OFSZ[5:0] 0x07 GAINZ[1:0] CGAINB[2:0] CGAINA[2:0] 0x08 COFSA[7:0] 0x09 COFSB[7:0] 0x0A DGAINA[7:0] 0x0B DGAINB[7:0] 0x0C DOFSA[7:0] 0x0D DOFSB[7:0] 0x0E VC[1:0]* CLKSLOW* CLKDIV TEST_CLK PD_CELSIUS 0x0F Internal Checksum(7:0) 0x10 TEST_ADC* TEST_VGA* TEST_PGA* VTEST1* VTEST0* PD_BG* TEST_BG* 0x11 0x12 CELSIUS[7:0] 0x13 Internal State Machine Registers 0x14 INTERNAL USE 0x15 INTERNAL USE 0x16 INTERNAL USE 0x17 INTERNAL USE 0x18 INTERNAL USE 0x19 INTERNAL USE 0x1A INTERNAL USE 0x1B INTERNAL USE 0x1C INTERNAL USE 0x1D INTERNAL USE 0x1E INTERNAL USE 0x1F INTERNAL USE 0x20 INTERNAL USE 0x21 INTERNAL USE 0x22 INTERNAL USE 0x23 INTERNAL USE 0x24 INTERNAL USE 0x25 INTERNAL USE 0x26 INTERNAL USE 0x27 INTERNAL USE Peripheral Registers 0x40 CELSIUSRAW[7:0] 0x41 CHANNEL OFS_P OFS_N GAIN_P GAIN_N 0x42 EE_ERR XERR_OUT 1OUTPUT 1INPUT XSTORE SIG_VALID

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 10/24 REGISTER MAP Adr Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x43 EE_IRQ 1INPUT_IRQ XS- TORE_IRQ Notes Only the configuration registers are user programmable. *) Bits marked by an asterisk are solely intended for IC test and must be kept on zero for normal operation. Table 4: Register layout

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 11/24 I2C INTERFACE Startup An external I2C 1-kbit EEPROM (e.g. 24xx01 family) is used to store configuration parameters permanently. On power-up and after reset is released iC-TW3 ac- cesses the external EEPROM and reads its device configuration according to Table6. EEPROM Checksum The checksum at address 0x0F contains the 8-bit sum of registers 0x01 to 0x0E plus the 8-bit sum of all LUT bytes up to and including the final block with its break- point set to 255. On startup iC-TW3 calculates the expected checksum and compares it with the value stored at EEPROM address 0x0F . If computed and stored address match normal operation begins. Otherwise, iC-TW3 asserts an error condition and pin NERR is pulled low. It is the user’s responsibility to store the correct check- sum in the EEPROM during production programming. CHECKSUM(7:0) Adr 0x0F; Bit 7:0 R/W Code Function ... Checksum of EEPROM contents Table 5: Checksum EEPROM Register Map The 14 bytes of device configuration data are followed by a minimum of 2 to a maximum of 16 lock-up-table blocks (LUT). The LUT block size is 6 bytes each and the final block is indicated by its breakpoint value of 255. Thus, a minimum of 28 bytes are read with 2 active LUT blocks and 112 bytes are read with 16 active LUT blocks during the configuration phase. Note that the checksum is only calculated up and including the last LUT block. The last LUT block ist indicated by a break- point value of 255. Further descriptions on LUTs are given in section "Temperature Compensation" on page 21. Note that the EEPROM address space maps to the 1-wire address 128. Accessing EEPROM address 0 is therefore equivalent to accessing memory location 128 via the 1-wire interface (see page12). EEPROM Address Description Corresponding Configuration Register 0x00 <reserved> - 0x01 Config. 1 0x01 0x02 Config. 2 0x02 0x03 Config. 3 0x03 0x04 Config. 4 0x04 0x05 Temp. Sensing 0x05 0x06 Config. Index 0x06 0x07 Coarse Gain 0x07 0x08 COFSA 0x08 0x09 COFSB 0x09 0x0A DGAINA 0x0A 0x0B DGAINB 0x0B 0x0C DOFSA 0x0C 0x0D DOFSB 0x0D 0x0E Test 1 0x0E 0x0F CHECKSUM 0x0F EEPROM Address Description LUT Block Number 0x10 Breakpoint 0 0 0x11 GAINA 0 0x12 GAINB 0 0x13 OFSA 0 0x14 OFSB 0 0x15 OFSZ 0 0x16 Breakpoint 1 (255) 1 0x17 GAINA 1 0x18 GAINB 1 0x19 OFSA 1 0x1A OFSB 1 0x1B OFSZ 1 0x6A Breakpoint 255 15 0x6B GAINA 15 0x6C GAINB 15 0x6D OFSA 15 0x6E OFSB 15 0x6F OFSZ 15 Table 6: EEPROM register map

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 12/24 1-WIRE INTERFACE The 1-wire interface provides read and write access to the register bank and to the external EEPROM. When read access is not required an infrared phototransistor can be directly connected to the pin in order to build a cost effective wireless write-only port for in-field or production programming. The communication bit stream is pulse-width modu- lated (PWM) as shown in Figure1. A zero-bit is en- coded as a short high followed by a long low. A one-bit is encoded as a long high followed by a short low. The modulated signal is independent of the receiver or the transmitted clock frequency. Since iC-TW3 uses a free-running oscillator it is important to implement a robust, frequency insensitive protocol. tshort tshort tshorttlong tlongtlong tdelay tidle idle start delay idle1 0 1- w ire tim ing Figure 1: Pulse width modulation bit stream Parameter Description min max tstart Low time start condition (Master only) 1 ms tlong Unit time long (Master and iC-TW3) tshort+ 10 µs 400 µs tshort Unit time short (Master and iC-TW3) 35 µs tlong- 10 µs tdelay Delay on register read (iC-TW3 only) 35 µs tidle Interface idle before next access Access was write to external EEPROM Access was not write to external EEPROM 8 ms 3 ms Table 7: 1-Wire interface timing

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 14/24 A/B SIGNAL PATH iC-TW3 incorporates two analog gain paths called channel A and B, respectively. Gain and offset of both paths are independently controlled and temperature compensated. Figure4 depicts a diagram of a single signal path, Table8 below summarizes gain and offset characteristics. FOFSA/B(7:0) CGAINA/B(2:0) OGAIN(1:0) VDD NINA/NINB VDD/2 NAO/NBO+ AO/BO ENSIGAB FGAINA/B(7:0) output FILTER(1:0) Input COFSA/B(5:0) dynamic PINA/PINB SINGLEIN Figure 4: The A/B signal path Input Amplifier Dynamic Amplifier Output Amplifier Composite Gain step 6.0 dB 0.08 dB Offset range input referred 1.24V gaininput 0.25V gaininput 1.49V gaininput Offset step input referred40mV gaininput 2mV gaininput gaininput= 10 gain_of_input_amplifier_in_dB Table 8: Overview of gain and offset characteristics Single ended signals Single ended input functionality is provided by con- necting the negative input terminal (pins NINA and NINB) to an internally generated voltage of VDD /2. This is enabled by setting the control bitSINGLEIN to 1. Al- ternatively, an externally generated reference voltage may be applied to the negative input terminals. SINGLEIN Adr 0x01; Bit 5 R/W Code Function

0 A and B inputs are differential(default)

1 A and B inputs are single ended

Table 9: Single ended input functionality Input error detection Weak input pull-up resistors are enabled by setting control bitENSIGAB to 1. The resistors are at min- imum 2.0 MΩ. When driving the input with a high impedance source it might be necessary to disable the pull-up resistors to avoid excessive signal distor- tion. The pull-up resistors are used to sense floating or damaged sensor connections. Any input terminal left unconnected is pulled to VDD and triggers a sensor error conditionerr_sig. ENSIGAB Adr 0x03; Bit 0 R/W Code Function

0 Pull-up resistors disconnected and error reporting

disabled (default)

1 Pull-up resistors and error reporting active on A/B

Table 10: Input signal error detection control Gain and offset RegistersCGAINA(2:0)and CGAINB(2:0)are used to set the coarse gain. Coarse gain is static and it is not changed by the temperature or automatic compensa- tion algorithm. The highest legal value for CGAINA(2:0) and CGAINB(2:0)is 6. Equivalently registersCOFSA(5:0) and COFSB(5:0) are used to control the static off-

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 15/24 set of the input signal. Note thatCOFSA(5:0) and COFSB(5:0) are in 2’s complement format and their value range is limited from -31 to +31. CGAINA(2:0) Adr 0x07; Bit 2:0 R/W CGAINB(2:0) Adr 0x07; Bit 5:3 R/W Code gain = cgain x 6 dB 0x00 0 dB (default) 0x01 6 dB ... 0x06 36 dB Table 11: Coarse gain select for channel A/B COFSA(7:0) Adr 0x08; Bit 7:0 R/W COFSB(7:0) Adr 0x09; Bit 7:0 R/W Code 2’K Code 5:0, and decimal offset = cofs x 40 mV 0xE1 0x21, -31 -1240 mV 0xFF 0x3F , -1 -40 mV 0x00 0x00, 0 0 mV (default) 0x01 0x01, +1 40 mV 0x1F 0x1F , +31 1240 mV Table 12: Coarse offset select for channel A/B DGAINA(7:0) Adr 0x0A; Bit 7:0 R/W DGAINB(7:0) Adr 0x0B; Bit 7:0 R/W Code gain = dgain x 0.08 dB - 2 dB 0x00 -2 dB (default) ... 0x19 0 dB 0x1A 0.08 dB ... 0xFF 18.4 dB Table 13: Dynamic gain select for channel A/B DOFSA(7:0) Adr 0x0C; Bit 7:0 R/W DOFSB(7:0) Adr 0x0D; Bit 7:0 R/W Code offset = cofs x 2 mV 0x81 -254 mV ... 0xFF -2 mV 0x00 0 mV (default) 0x01 2 mV ... 0x7F 254 mV Table 14: Dynamic offset select for channel A/B ValueFGAINA/B and FOFSA/B are fine gain and off- set control respectively. They are calculated dynam- ically according to the temperature compensation al- gorithm.In case temperature compensation is not enabled the values ofFGAINA/B and FOFSA/B are equal to the register values inDGAINA/B(7:0) and DOFSA/B(7:0). Refer to chapter "Temperature Com- pensation" on page21 for a detailed explanation of fine gain and fine offset calculations.DGAINA/B(7:0)and DOFSA/B(7:0)can be programmed to a fixed value or it is automatically updated when dynamic adaption is enabled. Output driver The output amplifier is capable of driving a 100Ω dif- ferential load and is stable with capacitive loads of up to 100 nF . Control registerOGAIN(1:0)is used to se- lect the output amplifier gain. A gain of -3 dB is useful to accommodate input signals larger than 1 V and gain of +6 dB will provide a 1 Vpp single-ended output. Note that the selected output amplifier gain will influence the automatic gain compensation. Refer to section "Auto- matic Compensation" on page18 for details. OGAIN(1:0) Adr 0x01; Bit 7:6 R/W Code Function 0x00 0 dB (default) 0x01 reserved 0x02 +6 dB 0x03 -3 dB Table 15: Output amplifier gain on channel A/B A programmable 1st-order low-pass filter can be en- abled to limit the path bandwidth. The filter cut-off fre- quency can be set via theFILTER(1:0)register. FILTER(1:0) Adr 0x04; Bit 4:3 R/W Code Function 0x00 1 MHz (default) 0x01 500 kHz 0x02 200 kHz 0x03 reserved Table 16: Signal path filter In order to save power the complete signal path can be disabled using the control bitsPDA and PDB respec- tively. When disabled the outputs are high impedance. The dynamic adaption should be disabled when either channel A or B is disabled. PDA Adr 0x04; Bit 0 R/W PDB Adr 0x04; Bit 1 R/W Code Function

0 Channel A/B is enabled (default)

1 Channel A/B is powered down

Table 17: Power down control on channel A/B

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 16/24 Z SIGNAL PATH (INDEX) A third analog path is used for index signal processing frequently found in encoder applications. Refer to Fig- ure 5 for an overview. An input amplifier with a gain range of 0 to 36 dB is used to amplify the index signal to an intermediate level. The input amplifier employs output referred offset correction. This is used to elimi- nate inherent amplifier offset as well as sensor offset. Additionally, the same offset correction is used to skew the comparator shift point to a desired level. The offset correction is temperature compensated with a LUT. 1Vpp VDD ENSIGZ BYPASSZ output NZO ZO OGAINZ(1:0) VDD/2 SINGLEINZ GAINZ(2:0) MODEZ PINZ NINZ POLARITYZ OFSZ(5:0) Figure 5: The Z signal path Input Amplifier Output Amplifier Composite Gain range 0..36 dB -3 dB, 0 dB, 6 dB -3..42 dB Gain step 6 dB Offset Range (input referred* 1.86V gaininput 1.86V gaininput Offset step input referred60mV gaininput *: gaininput= 10 gain_of_input_amplifier_in_dB Table 18: Gain and offset characteristics for channel Z A single ended input referenced to VDD /2 is provided by setting bitSINGLEINZ of register 0x02. Alterna- tively, pin NINZ can be biased with an external voltage. SINGLEINZ Adr 0x02; Bit 1 R/W Code Function 0 channel Z input is differential (default) 1 channel Z is single ended Table 19: Single ended input functionality A zero-crossing comparator generates a 1.0 Vpeak-peak output signal or a rail-to-rail signal depending on con- trol bitMODEZ . The comparator can be bypassed which allows using the Z Path as a regular amplifier path. Bypassing can be toggled via bitBYPASSZ of register 0x02. MODEZ Adr 0x02; Bit 3 R/W Code Function 0 1 Vpp out (default)

1 Rail-to-rail output

(requires OGAINZ(1:0) set to 0x2) Table 20: Channel Z output mode select BYPASSZ Adr 0x02; Bit 2 R/W Code Function

0 Comparator is enabled (default)

1 Comparator is bypassed

Table 21: Channel Z comparator bypass

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 17/24 Gain and offset Gain and offset selections on channel Z are made available by providing control bitsGAINZ(2:0) and OFSZ(5:0). Note that the maximum value for gain on channel Z is 6 which corresponds to a total gain of 36 dB. GAINZ(2:0)is split up amongst register 0x06 which holds the MSB and register 0x07 holding the other two bits.OFSZ(5:0)is the correction value to the output of the input amplifier and is interpreted as 2’s comple- ment. The input referred offset is therefore gain de- pendent. The output gain on channel Z can be set via control bits OGAINZ(1:0). For more details again refer to section "A/B PATH" on page14. GAINZ(2:0) Adr 0x06; Bit 7 R/W Adr 0x07; Bit 1:0 Code gain = gainz x 6 dB 0x00 0 dB (default) 0x01 6 dB ... 0x06 36 dB Table 22: Gain select for channel Z OFSZ(5:0) Adr 0x06; Bit 5:0 R/W Code 2’K Decimal offset = cofs x 60 mV 0x21 -31 -1860 mV 0x3F -1 -60 mV 0x00 0 0 mV (default) 0x01 +1 60 mV 0x1F +31 1860 mV Table 23: Offset select for channel Z OGAINZ(1:0) Adr 0x02; Bit 5:4 R/W Code Function 0x00 0 dB (default) 0x01 reserved 0x02 +6 dB 0x03 -3 dB Table 24: Output amplifier gain on channel Z Input error detection Pull-up resistor and error detection on channel Z can be controlled by bitENSIGZ of register 0x03, disabling of the complete Z path can be achieved by setting bit PDZ of register 0x04 to 1. For more detailed informa- tion on pull-up and power control refer to section "A/B PATH" on page14 as the behaviour of index path and signal path equal regarding these matters. ENSIGZ Adr 0x03; Bit 1 R/W Code Function disabled (default)

1 Pull-up resistors and error reporting active oninZ

Table 25: Input signal error detection control PDZ Adr 0x04; Bit 2 R/W Code Function

0 Channel Z is enabled (default)

1 Channel Z is powered down

Table 26: Power-down control on channel Z Polarity of channel Z Furthermore, the polarity on channel Z can be inverted by setting or not setting bitPOLARITYZ . POLARITYZ Adr 0x02; Bit 0 R/W Code Function

0 Channel Z has normal polarity (default)

1 Channel Z has inverted polarity

Table 27: Channel Z polarity select

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 18/24 AUTOMATIC COMPENSATION Automatic gain and offset correction is available for dual sensor bridges that are 90° out of phase. These types of sensors are used for encoder applications. Automatic compensation removes any sensor offset and sets the gain to achieve a fixed output voltage. The target output voltage depends on the output gain OGAIN(1:0)as well as on the control bitVEXT . When using an external reference voltage, the appropriate voltage must be applied to pin VC. VEXT Adr 0x02; Bit 7 R/W Code Function

0 Internally generated 1 V or 2 V is used as output

target voltage, depending on registerOGAIN(1:0).

1 Voltage applied to pin VC defines target output

voltage (see Table29). Table 28: Target voltage selection OGAIN(1:0) Output Gain VEXT Target Output Voltage Vppdiff 00 0 dB 0 1 V 01 reserved 0 10 6 dB 0 2 V 11 -3 dB 0 1 V 00 0 dB 1 2.21 V - V(VC) 01 reserved 1 10 6 dB 1 (2.21 V - VC) x 2 11 -3 dB 1 2.21 V - VC Table 29: Target output voltages Automatic compensation is enabled by setting control bitDYNAMIC of register 0x01 to 1. If enabled, it will constantly alter registerDOFSA/B and DGAINA/B to maintain zero offset and the target output amplitude. Control bitsFREQ(1:0) of register 0x01 are used to limit the tracking rate. If the input frequency increases above the limit tracking will stop. Normally, it is not re- quired to limit the tracking frequency although it can be useful for certain bandwidth limited sensors. DYNAMIC Adr 0x01; Bit 1 R/W Code Function

0 Automatic function is disabled

1 Automatic function is enabled

Table 30: Automatic compensation enable Note that settingFREQ(1:0) to other values than 0 does not affect the signal bandwidth of the amplifier. It merely limits the rate of automatic adaption. FREQ(1:0) Adr 0x01; Bit 4:3 R/W Code Function 00 no tracking limit (default) 01 200 kHz 10 20 kHz 11 2 kHz Table 31: Automatic compensation adaption rate In normal operation the compensation algorithm will adjust both gain and offset simultaneously in order to achieve fast convergence. If control bitGENTLE of register 0x01 is set, gain and offset registers are up- dated alternately. This reduces output jumpiness at the expense of slower convergence. GENTLE Adr 0x01; Bit 2 R/W Code Function

0 Gain and offset are updated simultaneously

1 Gain and offset are updated alternately

Table 32: Automatic compensation sequence control Automatic compensation can be used in conjunction with temperature compensation. Automatic compen- sation will then remove any residual offset or gain mis- match not corrected by the temperature correction al- gorithm.

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 19/24 TEMPERATURE SENSING iC-TW3 contains an on-chip temperature sensor. Op- tionally, an external sensor can be used by setting bit XCELSIUS of register 0x02 to 1. An external temper- ature sensor is useful for remote temperature sensing or in situations where the internal sensor does not pro- vide adequate accuracy. Also, device self-heating due to heavy output loads can have an impact on the inter- nal sensor readings. Connect the external temperature sensor with its analog output to pin KELVIN. XCELSIUS Adr 0x02; Bit 6 R/W Code Function

0 Select internal temperature sensor (default)

1 Select external temperature sensor

Table 33: Temperature sensor select An ADC converts the analog temperature signal into an 8-bit digital word. In case the on-chip sensor is used the 8-bit value spans a temperature range of -50 °C to 150 °C. It is recommended to calibrate the ADC using register 0x05 even when using an external tempera- ture sensor. Calibrating the temperature ADC The raw ADC value can be accessed through register 0x40. A ±2 increment hysteresis is applied to the ADC value to remove conversion noise and the offset regis- ter 0x05 is added. The final value is stored in register 0x12 and is used for temperature compensation. To achieve best temperature accuracy it is required to calibrate the ADC by correctly programming register 0x05. At any known ambient temperature the register 0x05 is programmed such to read the expected ADC value. As an example, consider the product assem- bly floor with an ambient temperature of 20 °C. Due to device variation the ADC value read before calibration can be anything between 0 °C to 40 °C. Register 0x05 is now used to tune the ADC output value to the correct binary representation of 20 °C. CCELSIUS(3:0) Adr 0x05; Bit 3:0 R/W Code Bit 3 is sign, bits 2:0 are magnitude of correction 1111 most negative correction 1001 least negative correction 1000 no correction 0000 no correction (default) 0001 least positive correction 0111 most positive correction Table 34: Coarse offset correction FCELSIUS(3:0) Adr 0x05; Bit 7:4 R/W Code Value added to ADC reading is FCELSIUS(3:0) - 8 0000 -8 (default) 0001 -7 1111 7 Table 35: Fine offset correction CELSIUS(7:0) Adr 0x12; Bit 7:0 R Data Function 0x00 Current temperature ADC value that is used for compensation calculations. Value of this register is 0x40 +FCELSIUS(3:0)- 8 0xFF Table 36: Temperature data Temperature alarm The iC-TW3 features a built-in temperature alarm sys- tem. An alarm threshold can be specified by the user via theTALARM(2:0) bits in register 0x03. A tempera- ture alarm is asserted once the temperature value gen- erated by the ADC is above the defined threshold. The alarm is indicated by theERR_TEMP bit set to 1 as well as by pin NERR going low. TALARM(2:0) Adr 0x03; Bit 4:2 R/W Code tempthreshold= (TALARM(2:0) x 16) + 144 000 144 (default) 001 160 110 240

111 Alarm disabled

Table 37: Temperature alarm threshold

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 20/24 ERROR CONDITIONS iC-TW3 maintains three status bits reporting system error conditions. These bits areERR_EE, ERR_TEMP and ERR_SIG of register 0x03. If any error condition is triggered, i.e. indicated by any of these bits being set to 1, this will also assert pin NERR pulling it low. ERR_EE Adr 0x03; Bit 5 R Code Error message

0 No error since the last reset

1 One of the following error conditions has occurred

since the last reset: 1. EEPROM checksum error* 2. EEPROM read error 3. EEPROM write error Notes This error message can not be disabled and its bit status is maintained until the device is reset. *) A permanent logic zero read at SDA does not lead to a checksum error. Table 38: EEPROM data error ERR_TEMP Adr 0x03; Bit 6 R Code Error message

0 ADC reading is below value defined in register

TALARM(2:0)

1 ADC reading is above value defined in register

TALARM(2:0) Notes This error is not latched. Disabling temperature monitoring is possible by settingTALARM(2:0) to ’111’. Table 39: Temperature alarm ERR_SIG Adr 0x03; Bit 7 R Code Error message

0 All input terminals are connected

1 An input terminal is left unconnected

Notes This error is not latched. To enable this alarm ENSIGAB orENSIGZ must be set 1. Table 40: Signal unconnected alarm

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 21/24 TEMPERATURE COMPENSATION Temperature compensation is enabled by setting con- trol bitTEMP of register 0x01. A piece-wise linear in- terpolation of values stored in a look-up-table (LUT) is employed to calculate the gain and offset for a given temperature. Figure6 shows a sample configuration with seven breakpoints. TEMP Adr 0x01; Bit 0 R/W Code Function

0 Temperature compensation is disabled (default)

1 Temperature compensation is enabled

Table 41: Temperature compensation enable bp0 ofsZ ofsB ofsA gainB gainA gain/ofs AD C value bp1 bp2 bp3 bp4 bp5 bp6 255 Figure 6: LUT with seven breakpoints There can be a minimum of two up to a maximum of 16 temperature breakpoints within the LUT. Each breakpoint has five interpolation values associated to it namely GAINA, GAINB, OFSA, OFSB and OFSZ . For more details on the layout of the LUT refer to section "EEPROM" on page 11. Breakpoints can be placed freely across the temper- ature axis except for the first and the last breakpoint. The first breakpoint must be located at ADC value 0 (which roughly corresponds to -50 °C when using the internal sensor), the last breakpoint must be located at ADC value 255 (150 °C with the internal sensor). The LUT is stored in the off-chip EEPROM from mem- ory location 0x10 onward. Note that the EEPROM ad- dress space maps to the 1-wire address 128. Access- ing EEPROM address 0 is therefore equivalent to ac- cessing memory location 128 through the 1-wire inter- face. The breakpoint entry with a value of 255 marks the last valid LUT entry. All addresses thereafter in- cluding their data will be ignored. Temperature dependent gain and offset is determined by performing linear interpolation between break- points. Temperature dependent gain and offset are TGAINA/B and TOFSA/B respectively. Fine gainFGAINA/B and fine offsetFOFSA/B (see fig- ure4 on page14) are calculated as follows: fgain= tgain+ dgain fofs= tofs+ dofs Whereas TGAIN and TOFS are the temperature de- pendent values calculated using the LUT andDGAIN and DOFS are registers updated either manually or by the automatic compensation function.

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 22/24 gainA gainB ofsA ofsB ofsZ 16 + 128 = 144 1-wire address EEPROM address gainA gainB ofsA ofsB ofsZ 22 + 128 = 150 255 gainA gainB ofsA ofsB ofsZ 28 + 128 = 156 3 breakpoint look-up table gainA gainB ofsA ofsB ofsZ 16 + 128 = 144 1-wire address EEPROM address gainA gainB ofsA ofsB ofsZ 22 + 128 = 150 255 gainA gainB ofsA ofsB ofsZ 106 + 128 = 234 106 16 breakpoint look-up table Figure 7: Temperature LUT memory map TEST MODES The iC-TW3 posses two registers 0x0E and 0x10 which provide access to basic testing functionality. The PD_CELSIUS bit allows powering off the internal tem- perature sensor. If powered down, the temperature sensor output value can be forced to a desired value by writing to register 0x40. The user can then test the compensation circuit without cycling the device tem- perature. PD_CELSIUS Adr 0x0E; Bit 0 R/W Code Function

0 Temperature sensor enabled (default)

1 Temperature sensor disabled

Table 42: Temperature sensor power control TEST_CLK Adr 0x0E; Bit 1 R/W Code Function

0 Clock is not driven on any pin (default)

1 Clock is driven on pin NERR

Table 43: Internal clock oscillator CLKDIV Adr 0x0E; Bit 2 R/W Code Function 1 fsystem = fosc (default) 0 fsystem = fosc / 2 Table 44: Internal clock divider selection

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 23/24 TYPICAL APPLICATIONS A typical application is shown in figure8. Three dif- ferential MR sensor bridges are connected to the iC- TW3. A, B and Z outputs are driving 120Ω terminated transmission lines. Sensor GND PINB 24xx01 Index +3...5.5V SDA SCL 0.1 μ F NZO PINA Bridge 0 iC-TW3 Sensor +3...5.5V NAO PINZ VDD SDA NBO BO GNDIN/A/B VDDIN/A/B SCL 120 Ω 0.1 μ F VDD termination Bridge 1 R R NINA R Sensor 10k NINZ NINB AO ZO EEPROM Figure 8: Typical application MR Sensors iC-Haus expressly reserves the right to change its products and/or specifications. An Infoletter gives details as to any amendments and additions made to the relevant current specifications on our internet websitewww.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by email. Copying – even as an excerpt – is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to.

iC-TW3 SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER Rev B1, Page 24/24

ORDERING INFORMATION

Type Package Order Designation iC-TW3 32 pin QFN, 5 mm x 5 mm iC-TW3 QFN32 Evaluation board TW3D EVAL For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Tel.: +49 (61 35) 92 92-0 Am Kuemmerling 18 Fax: +49 (61 35) 92 92-192 D-55294 Bodenheim Web: http://www.ichaus.com GERMANY E-Mail: sales@ichaus.com Appointed local distributors:http://www.ichaus.com/sales_partners