TVS3V3L4U INFINEON | Alldatasheet
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Power Management & Multimarket Data Sheet Revision 2.4, 2013-02-06 Final TVS3V3L4U Low Capacitance ESD / Transient / Surge Protection Array TVS3V3L4U TVS Diodes Transient Voltage Suppressor Diodes
81726 Munich, Germany
© 2013 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
FinalData Sheet 3 Revision 2.4, 2013-02-06 Trademarks of Infineon Technologies AG AURIX™, BlueMoon™, COMNEON™ , C166™, CROSSAVE™, CanPAK™, CI POS™, CoolMOS™, CoolSET™, CORECONTROL™, DAVE™, EasyPIM™, EconoBRIDG E™, EconoDUAL™, Eco noPACK™, EconoPIM™, EiceDRIVER™, EUPEC™, FCOS™, HITFET™, HybridPACK™, ISOFAC E™, I²RF™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PROFET™, PRO-SIL™, PRIMARION™, PrimePACK™ , RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDR ION™, SMARTi™, SmartLEWIS™, TEMPFET™, thin Q!™, TriCore™, TRENCHSTOP™, X-GOLD™, XMM™, X-PMU™, XPOSYS™. Other Trademarks Advance Design System™ (ADS) of Agilent Tech nologies, AMBA™, ARM™, MU LTI-ICE™, PRIMECELL™, REALVIEW™, THUMB™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™ , FirstGPS™ of Trimble Navigation FlexRay™ is licensed by FlexRa y Consortium. HYPERTERMINAL™ of Hilgraeve Incorpor ated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATI ON. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphi cs Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Si rius Sattelite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRO NIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RI VER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-06-09 Revision History: Rev. 2.3 2012-01-11 Page or Item Subjects (major changes since previous revision) Revision 2.4, 2013-02-06
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Low Capacitance ESD / Transient / Surge Protection Array FinalData Sheet 4 Revision 2.4, 2013-02-06
1 Low Capacitance ESD / Transi ent / Surge Protection Array
1.1 Features
- ESD/Transient/Surge protection according to: IEC61000-4-2 (ESD): ±30 kV air/contact discharge IEC61000-4-4 (EFT): ± 8 0A ( 5 / 5 0n s ) IEC61000-4-5 (Surge): ±20 A (8/20 μs)
- Reverse working voltage maximum: VRWM =3 . 3V
- Low leakage current: IR <5 0n A
- Low capacitance: CL = 2 pF typ. (I/O to GND), 1 pF typ. (I/O to I/O)
- Low clamping voltage: VCL = 7.7 V typ. @ 20 A (8/20 μs)
- Pb-free (RoHS compliant) package
1.2 Application Examples
- 10/100/1000 Ethernet
- 4 lines uni-directional (Pin 2 to GND)
- 2 lines bi-directional (Pin 2 n.c.)
1.3 Product Description
Figure 1-1 Pin configuration and Schematic diagram Table 1-1 Ordering Information Type Package Configuration Marking code TVS3V3L4U SC74 4 lines, uni-directional or 2 lines, bidirectional E1s TVS3V3L4 U_PinConf_ and_ SchematicDiag1.vsd Pin 2 Pin 3 Pin 6 Pin 5 Pin 4 Pin 1 a) Pin configuration b) Schematic diagram Pin 5 n.c.Pin 1 Pin 3 Pin 4 Pin 2 GND Pin 6
Electrical Characteristics
FinalData Sheet 5 Revision 2.4, 2013-02-06
2 Electrical Characteristics
2.1 Maximum Ratings
Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Table 2-1 Maximum Ratings at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. ESD discharge1) air contact 1) V ESD according to IEC61000-4-2 VESD -30 -30 kV Peak pulse current ( tP =8 / 2 0μs)2) 2) IPP according to IEC61000-4-5. PPK is calculated by IPP x VCL. IPP -20 – 20 A Peak pulse power tP =8 / 2 0μs2) tP = 100 ns3) 3) Please refer to AN210 [1]. PPK is calculated by ITLP x VCL. PPK 154 1044 W Operating temperature TOP -55 – 125 °C Storage temperature Tstg -55 – 150 °C
FinalData Sheet 6 Revision 2.4, 2013-02-06
2.2 DC Characteristics
Figure 2-1 Definitions of electrical characteristics
2.3 RF Characteristics
Table 2-2 DC Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Note / Test ConditionMin. Typ. Max. Reverse working voltage VRWM ––3 . 3 V Reverse current IR – – 50 nA VR =3 . 3V Table 2-3 RF Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbo l Values Unit Note / Test ConditionMin. Typ. Max. Line capacitance I/O to GND I/O to I/O CL pF VR =0V , f =1M H z /g1/g2 /g3/g4/g5/g6 /g7/g1 /g7/g8 /g8/g9/g10/g11 /g1/g3 /g8/g2 /g8/g3 /g8/g11/g11 /g1/g2/g12 /g1/g9/g10/g11 /g8/g9/g10/g11 /g8/g11/g11 /g8/g3/g13/g14 /g1/g3/g13/g14/g1/g15/g16/g1/g17 /g1/g3/g12 /g1/g9/g10/g11 /g7/g1 /g7/g8 /g3/g4/g5/g6 /g7/g1 /g7/g8 /g1/g2 /g18/g18/g18/g1/g2/g3/g4/g5/g3/g6/g7/g8/g2/g9/g10/g5/g11/g12 /g1/g3 /g18/g18/g18/g13/g12/g8/g12/g3/g14/g12/g7/g8/g2/g9/g10/g5/g11/g12 /g8/g3 /g18/g18/g18/g13/g12/g8/g12/g3/g14/g12/g7/g15/g16/g3/g3/g12/g17/g10 /g8/g2 /g18/g18/g18/g1/g2/g3/g4/g5/g3/g6/g7/g15/g16/g3/g3/g12/g17/g10 /g18/g19/g2/g6/g12/g20/g21/g22/g5/g3/g5/g15/g10/g12/g3/g19/g14/g10/g19/g15/g20/g21/g16/g3/g8/g12/g20/g4/g19/g10/g22/g20/g14/g17/g5/g23/g24/g5/g15/g25/g20/g26/g17/g19/g27/g6/g19/g3/g12/g15/g10/g19/g2/g17/g5/g9/g28/g14/g8/g11 /g7/g8 /g7/g1 /g3/g4/g5/g6/g18/g18/g18/g18/g29/g17/g5/g30/g19/g15/g7/g3/g12/g14/g19/g14/g10/g5/g17/g15/g12 /g1/g2/g12/g18/g18/g18/g1/g2/g3/g4/g5/g3/g6/g7/g15/g9/g5/g30/g23/g19/g17/g11/g7/g8/g2/g9/g10/g5/g11/g12 /g1/g17 /g18/g18/g18/g31/g2/g9/g6/g19/g17/g11/g7/g8/g2/g9/g10/g5/g11/g12 /g1/g15/g16/g18/g18/g18/g32/g3/g19/g11/g11/g12/g3/g7/g8/g2/g9/g10/g5/g11/g12 /g1/g3/g13/g14/g18/g18/g18/g13/g12/g8/g12/g3/g14/g12/g7/g4/g2/g3/g25/g19/g17/g11/g7/g8/g2/g9/g10/g5/g11/g12/g7/g30/g5/g33/g28 /g1/g9/g10/g11/g18/g18/g18/g32/g34/g35/g7/g8/g2/g9/g10/g5/g11/g12 /g8/g11/g11/g18/g18/g18/g35/g12/g5/g25/g7/g23/g16/g9/g14/g12/g7/g15/g16/g3/g3/g12/g17/g10 /g8/g9/g10/g11/g18/g18/g18/g32/g34/g35/g7/g15/g16/g3/g3/g12/g17/g10 /g8/g3/g13/g14/g18/g18/g18/g13/g12/g8/g12/g3/g14/g12/g7/g4/g2/g3/g25/g19/g17/g11/g7/g15/g16/g3/g3/g12/g17/g10/g7/g30/g5/g33/g28 /g1/g3/g12/g18/g18/g18/g13/g12/g8/g12/g3/g14/g12/g7/g15/g9/g5/g30/g23/g19/g17/g11/g7/g8/g2/g9/g10/g5/g11/g12
FinalData Sheet 7 Revision 2.4, 2013-02-06
2.4 ESD Characteristics
Table 2-4 ESD Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbo l Values Unit Note / Test ConditionMin. Typ. Max. Reverse clamping voltage1) I/O to GND I/O to GND I/O to GND I/O to GND I/O to GND 1) IPP according to IEC61000-4-5 VCL 4.2 4.9 5.8 6.7 7.7 V tp = 8 / 2 0μs IPP =1A IPP =5A IPP =1 0A IPP =1 5A IPP =2 0A Reverse clamping voltage2) I/O to GND 2) Please refer to Application Note AN210 [1]. TLP parameter: Z0 =5 0 Ω , tp = 100ns, tr = 300ps, averaging window: t1 =3 0n s to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristics between IPP1 = 10 A and IPP2 =4 0A . –5 . 8 – tp = 1 0 0n s IPP =1 6A PP Forward clamping voltage1) GND to I/O GND to I/O VFC 1.1 V tp = 8 / 2 0μs IPP =1A IPP =2 0A Forward clamping voltage2) GND to I/O – 3.1 – tp =1 0 0n s IPP =1 6A Dynamic resistance1) I/O to GND RDYN –0 . 1 5 – Ω tp = 8 / 2 0μs Dynamic restiance2) I/O to GND – 0.09 – tp =1 0 0n s
FinalData Sheet 8 Revision 2.4, 2013-02-06
3 Typical Characteristic
Figure 3-1 Line capacitance CL = f(VR) Figure 3-2 Forward characteristic, IF = f(VF) 1.5 2.5 0 0.5 1 1.5 2 2.5 3 3.5 CL [pF] VR [V] 10-9 10-8 10-7 10-6 10-5 10-4 10-3 10-2 10-1 0.2 0.4 0.6 0.8 1 IF [A] VF [V]
Package Information
FinalData Sheet 14 Revision 2.4, 2013-02-06
4 Package Information
Figure 4-1 SC74 Package outline Figure 4-2 SC74 Footprint (Reflow Soldering) Figure 4-3 SC74 Footprint (Reflow Soldering) Figure 4-4 SC74 Packing SC74-PO V04 546 321 1.1 MAX. (0.35) (2.25) ±0.22.9 B 0.2 +0.1 -0.050.35Pin 1 marking M B 6x 0.95 1.9 0.15-0.06 +0.1 1.6 A ±0.1 2.5 0.25 ±0.1 ±0.1 A0.2 M 0.1 MAX. 0.5 0.95 1.9 2.9 SC74-FPR V04 0.5 0.95 1.6 1.3 MIN. 2.9 SC74-FPW V04 Transport direction SC74-TP 2.7 3.15Pin 1 marking 0.2 1.15
FinalData Sheet 15 Revision 2.4, 2013-02-06 References [1] Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level using VF-TLP Characterization Methodology [2] Infineon AG - Recommendations for PCB A ssembly of Infineon TSLP and TSSLP Packages
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