TPK1031

TPK1031 3PEAK | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 17

Technical content

Features

◼ Input Voltage Range: 2.7 V to 5.5V ◼ Power-Up and Power-Down Sequence Control ◼ Single Enable Control Signal Input Channel ◼ Three Power Sequence Channels: ◆ Open-Drain Output ◆ Adjustable Timing Controlled by Capacitor ◆ Support Invert Output ◼ Support Cascaded Device Output ◼ Low Power Consumption ◼ Junction Temperature: –40°C to +125°C ◼ Small MSOP-8 Package

Applications

◼ Video Surveillance ◼ Network Equipment and Servers ◼ Industrial Control ◼ FPGA/ASIC/CPLD Power Sequence Control ◼ Multi-channel Power Supply Sequence Control

Description

The TPK1031 series products are simple power sequencers, which provide power -up and power -down sequence control of multi-channel power supplies. Furthermore, the TPK1031 series support maximum three devices cascaded to control sequence of nine-channel power rails in one system. The TPK103 1 series products have three open-drain output channels, and all the channels can be pulled up to any required voltage level equal or lower than VCC. When the TPK1031 series are enabled with EN pin goes high, the three output channels toggle with the sequence of FLAG1-FLAG2-FLAG3 after the delay period individually set by the external capacitor; when the TPK1031 series are disabled with EN pin goes low, the thre e output channels toggle following a reverse sequence after the delay period individually set by the external capacitor. The TPK1031 series products provide small MSOP-8 package with guaranteed junction temperature range (T J) from –40°C to +125°C. Typical Application Schematic VCC EN GND FLAG1 FLAG2 FLAG3 TPK103 1 Power Supply FLAG1 FLAG2 FLAG3 Enable Signal CTSET TSET INV R1 R2 R3

3-Channel Simple Power Sequencer with Adjustable Timing Control Product Family Table Part Number Orderable Number Package Transport Media, Quantity MSL Marking information TPK1031-S TPK1031L1-VS1R-S MSOP-8 3,000 MSL1 K1031

3-Channel Simple Power Sequencer with Adjustable Timing Control Table of Contents

3-Channel Simple Power Sequencer with Adjustable Timing Control

Revision History

2019/05/31 Rev.Pre Preliminary Version 2019/08/31 Rev.A Initial Release 2019/12/20 Rev.A.1 Upgrade HBM ESD Ratings to ±2000 V (Page 6) 2021/07/09 Rev.A.2 1. Correct the Mistake Pin Number of EN from 3 to 2 (Page 5) 2. Add Tape and Reel Information (Page 16)

3-Channel Simple Power Sequencer with Adjustable Timing Control Pin Configuration and Functions TPk1031 Series 8-Pin MSOP Top View VCC 1 EN 2 GND 3 INV 4 5

8 FLAG1

NAME PIN NUMBER TYPE DESCRIPTION EN 2 I Device enable pin. FLAG1 8 O Open-drain output pin. FLAG 2 7 O Open-drain output pin. FLAG 3 6 O Open-drain output pin. GND 3 – Ground reference pin. INV 4 I Invert output set pin. TSET 5 O Delay time set pin. VCC 1 I Input power supply.

3-Channel Simple Power Sequencer with Adjustable Timing Control Specifications Absolute Maximum Ratings MIN MAX UNIT VCC, EN, INV, TSET –0.3 6 V FLAG1, FLAG2, FLAG3 –0.3 6 V TJ Junction Temperature Range –40 150 °C TSTG Storage Temperature Range –65 150 °C TL Lead Temperature (Soldering 10 sec) 260 °C (1) Stresses beyond the Absolute Maximum Ratings may permanently damage the device. (2) All voltage values are with respect to GND. ESD Ratings Condition Minimum Level UNIT HBM Human Body Model ESD ANSI/ESDA/JEDEC JS-001 ±2000 V CDM Charged Device Model ESD ANSI/ESDA/JEDEC JS-002 ±500 V Recommended Operating Conditions MIN MAX UNIT VCC 2.7 5.5 V EN, INV, TSET 0 VCC + 0.3 V FLAG1, FLAG2, FLAG3 0 VCC + 0.3 V TJ Junction Temperature Range –40 125 °C Thermal Information PACKAGE θJA θJC UNIT MSOP-8 247 118 °C/W

3-Channel Simple Power Sequencer with Adjustable Timing Control

Electrical Characteristics

TJ = −40°C to +125°C (typical value at TJ = +25°C), VCC = 3.3 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power Supply VCC Input supply voltage 2.7 5.5 V ICC Operating quiescent current INV = GND 55 100 µA INV = VCC 85 130 µA Enable VEN_TH EN pin threshold voltage 1 1.23 1.5 V IEN EN pin pull-up current VEN = 0 V 5 6.5 8 µA Open-Drain Output VOL FLAGx pin output low level IFLAGx = 1.2 mA 0 0.4 V IFLAGx FLAGx pin leakage current VFLAGx = 3.3 V 0.3 1 µA Delay Time Setup ITSET_SOURCE TSET pin source current 7 11 15 µA ITSET_SINK TSET pin sink current 7 11 15 µA VTSET_H TSET pin high-level threshold 1 1.14 1.4 V VTSET_L TSET pin low-level threshold 0.4 0.5 0.7 V TCLK Clock cycle CTSET = 10 nF 0.9 1.16 1.4 ms Timing Delays td1, td4 Timing delays 9 10 Cycles td2, td3, td5, td6 Timing delays 8 Cycles Invert Output Setup VINV_IH Invert pin high-level input 90% Of VCC VINV_IL Invert pin low-level input 10% Of VCC

3-Channel Simple Power Sequencer with Adjustable Timing Control Detailed Description Overview The TPK1031 series products are simple power sequencers, which provide power -up and power-down sequence control of multi - channel power supplies. Furthermore, the TPK1031 series support maximum three devices cascaded to control sequence of nine - channel power rails in one system. The TPK1031 series products have three open-drain output channels, and all the channels can be pulled up to any required voltage level equal or lower than V CC. When the TPK1031 series are enabled with EN pin goes high, the three output channels toggle with the sequence of FLAG1 -FLAG2-FLAG3 after the delay period individually set by the external capacitor ; when the TPK1031 series are disabled with EN pin goes low, the three output channels toggle following a reverse sequence after the delay period indiv idually set by the external capacitor. Functional Block Diagram VCC GND EN + VREF Clock Timing Delay Control Power Up/Down Sequence Control td1 td2 td3 td4 td5 td6 FLAG1 FLAG2 FLAG3 TSET INV Feature Description Device Enable (EN) The timing sequence of TPK103 1 series is controlled by the enable (EN) signal. An internal comparator connected at EN pin , with referenced to the bandgap voltage, set the enable threshold precisely at 1.2 3 V. With this precision enable threshold, the TPK1031 series can be enabled after a certain delay period set by external capacitor or a certain voltage value determined by external resistor divider.

3-Channel Simple Power Sequencer with Adjustable Timing Control Design Parameters For this design example, use the parameters listed in Table 1. Table 1 Design Parameters PARAMETERS VALUE Power supply voltage range, VCC 2.7 V to 5.5 V Enable signal voltage LOW (< 10% of VCC), HIGH (>90% of VCC) Pull-up resistors, R1, R2, R3 100 kΩ Timing delay capacitor, CTSET (1) 10 nF td1, td4 (1) 10.44 ms to 11.60 ms td2, td3, td6, td6 (1) 9.28 ms (1) See Adjustable Timing Delay section for more details Application Waveform INV = GND Figure 16 Power Up and Power Down Sequence

3-Channel Simple Power Sequencer with Adjustable Timing Control Layout Requirements

• FLAGx pull-up resistors, recommended 100 kΩ, should be placed closely to the flag output pins and the pull-up power supply. The traces should be equal to each other, and the trace length should be as short as possible.
• Timing delay capacitor should be placed as close as possible to the TSET pin, and straight trace without via is recommended.

3-Channel Simple Power Sequencer with Adjustable Timing Control Tape and Reel Information Order Number Package D1 W1 A0 B0 K0 P0 W0 Pin1 Quadrant TPK1031L1-VS1R-S MSOP-8 330 17.6 5.2 3.3 1.5 8 12 Q1

3-Channel Simple Power Sequencer with Adjustable Timing Control Package Outline Dimensions MSOP-8 3PEAK and the 3PEAK logo are registered trademarks of 3PEAK INCORPORATED. All other trademarks are the property of their respective owners.