TP1946-VR

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Technical content

Features

V Supply Voltage: 1.8V to 5.5V Low Supply Current : 4 μ A per Channel High to Low Pr opagation Delay n s Offset Voltage: ± 3.0 mV Maximum Offset Voltage Temperature Drift: 0. μV/°C Input Bias Current: 6 pA Typical Input Common Mode R ange Extends mV Internal Hysteresis Ensures Clean Switching No Phase Reversal for Overdriven Inputs Open Drain Outp ut for Maximum Flexibility Green, Space Saving SC70 Package Available App lic ations Threshold Detectors/Discriminators Sensing at Ground or Supply Line Peak and Zero crossing D etectors Logic L evel S hifting or T ranslation Window C omparators IR Receivers Clock and D ata S ignal R estoration Telecom Portable Communications Portable and B attery P owered S ystems

Description

rail inputs and outputs, and fully specified single supply operation down to +1. The devices draw only μA per comparator while reaching 70ns high to low response time an d have open drain outputs that c an be pulle d beyond V to 6V (max) above ground for maximum flexibility In addition, their rail to rail input common mode voltage range makes these comparators suitable for ultra low voltage operation. The input common mode voltage range extends 200mV be low ground and 200mV above supply, allowing both ground and supply sensing. The internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. A +1. V to +5.5V single supply operating voltage range makes t he TP194x family of comparators ideal for 2 cell battery powered applications. The TP1945 single comparator is available in tiny SC70 package for space conservative designs. All chip s are specified for the temperature range of 40° C to +85° C. 3PEAK and the 3PEAK logo are registered trademarks of 3PEAK I NCORPORATED . All other trademarks are the property of their respective owners. VIN VOUT RPU VDD TP194x VPU Typical Application of the TP194x Comparator s Related P roduct s Fast 30ns, Low Power, Internal Hysteresis, ± 3mV Maximum VOS, –0.2V to VDD + 0.2V RRI, Push-Pull (CMOS/TTL) Output Comparators TP1951/TP1951N /TP1952/TP1954 Fast 30ns, Low Power, Internal Hysteresis, ± 3mV Maximum VOS, –0.2V to VDD + 0.2V RRI, Open-Drain Output Comparators TP1955/TP1955N /TP1956/TP1958 950ns, 3µ A, 1.8V, ± 2.5mV VOS-MAX, Internal Hysteresis, RRI, Push-Pull Output Comparators TP1931 /TP1932/TP1934 950ns, 3µ A, 1.8V, ± 2.5mV VOS-MAX, Internal Hysteresis, RRI, Open-Drain Comparators TP1935 /TP1936/TP1938 Ultra-low 200nA, 13µ s, 1.6V, ± 2mV VOS-MAX, Internal Hysteresis, RRI, Push-Pull (CMOS/TTL) Output Comparators TP2011 /TP2012/TP2014 Ultra-low 200nA, 13µ s, 1.6V, ± 2mV VOS-MAX, Internal Hysteresis, RRI, Open-Drain Output Comparators TP2015 /TP2016/TP2018 DEVICE DESCRIPTION Fast 68ns, 46µ A Micropower, Internal Hysteresis, ± 3mV Maximum VOS, –0.2V to VDD + 0.2V RRI, Push-Pull (CMOS/TTL) Output Comparators TP1941/TP1941N /TP1942/TP1944

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn Pin Configuration (Top View) TP1945 5-Pin SOT23/SC70 (-T and -C Suffixes) 1Out +In -In TP1945U 5-Pin SOT23/SC70 (-T and -C Suffixes) 1+In -In Out V+ 8 Out A ﹢In A ﹣In A ﹢In B ﹣In B Out BA B TP1946 8-Pin SOT23/SOIC/MSOP (-T, -S and -V Suffixes) Out A ﹢In A ﹣In A DA CB Out D ﹢In D ﹣In D Out B ﹢In B ﹣In B Out C ﹢In C ﹣In C TP1948 14-Pin SOIC/TSSOP (-S and -T Suffixes) NC ﹢In ﹣In V+ Out NC NC TP1945 8-Pin SOIC (-S Suffix) TP1945U2 5-Pin SOT23 (-T Suffix) 1Out +In -In Order Information Model Name Order Number Package Transport Media, Quantity Marking Information TP 1945 TP194 TR Pin SOT23 Tape and Reel, 3000 CT YW (1) TP194 CR Pin S C70 Tape and Reel, 3000 C C YW (1) TP194 SR Pin SO IC Tape and Reel, 000 194 S TP1945 U TP194 U TR Pin SOT23 Tape and Reel, 3000 C A YW (1) TP194 U C R Pin S C70 Tape and Reel, 3000 C B YW (1) TP194 TP194 U TR Pin SOT23 Tape and Reel, 3000 C E YW (1) TP 194 TP194 T R Pin SOT23 Tape a nd Reel, 000 C46 YW (1) TP194 SR Pin SO IC Tape and Reel, 000 C S TP194 VR Pin MSOP Tape and Reel, 000 C V TP 194 TP194 SR Pin SO IC Tape and Reel, 194 S TP194 TR Pin TSSOP Tape and Reel, 000 1948T Note (1) ‘YW’ is date codin g scheme. 'Y' stands for calendar year, and 'W' stands for single workweek coding scheme. Pin Functions IN: Inverting Input of the Comparator Voltage range of this pin can go from V V to V + 0. +IN: Non Inverting Input of Comparator. This pi n has the same voltage range as IN. NC: No Connection. DD the Typically Positive Power Supply. voltage is from 1.8 V to 5.5V. Split supplies are possible as long as the voltage between V+ and V is between 1.8 V and 5.5V. A bypass capacitor of 0.1μF as close to the part as possible should be used between power supply pins or between supply pins and ground. V SS Negative Power Supply. It is normally tied to ground. It can also be tied to a voltage other than ground as long as the voltage between V and V is from 1.8 V to 5.5V. If it is not connected to ground, bypass it with a capacitor of 0.1μF as close to the part as possible. OUT: range voltage The Output. Comparator extends to within millivolts of each supply rail.

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV Absolute Maximum Ratings N ote 1 Supply Voltage: V V 6.0V Open 6.0V 0.3 to V + 0.3 Difference Input Voltage V 0.3 to V + 0.3 Input Current: +IN, IN, Note 2 Output Short Circuit Current 5mA Output Short Circuit Duration Note 3 mA Operating Temperature Range.... ... 40° C to 85° C Maximum Junction Tempera 65° C to 150° C Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input exten ds more than 0mV b eyo nd the power supply, the input current should be limited to les s than 10mA. Note 3 : A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply v oltage and how many ampli fiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. ESD, Electrostatic Discharge Protection Symbol Parameter Condition Minimum Level Unit HBM Human Body Model ESD MIL STD 883H Method 3015.8 kV CDM Charged Device Model ESD JEDEC EIA/JESD22 C101E kV

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Electrical Characteristics

denotes the specifications which apply over the full operating temperature range, otherwise specific ations are at T A = 27° C. V DD +1.8V to + V IN+ = V DD , V IN 1.2 V R PU kΩ , C L =15pF SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V DD Supply Voltage 1.8 5.5 V V OS Input Offset Voltage Note 1 V CM 1.2V ± 0. mV V OS TC Input Offse t Voltage Drift Note 1 V CM 1.2V μ V/° C V HYST Input Hysteresis Voltage Note 1 V CM 1.2V mV V HYST TC Input Hysteresis Voltage Drift Note 1 V CM 1.2V μ V/° C I B Input Bias Current V CM 1.2V pA I OS Input Offset Current pA R IN Input Resistance > 100 GΩ C IN Input Capacitance Differential Common Mode pF CMRR Common Mode Rejection Ratio V CM = V SS to V DD dB V CM Common mode Input Voltage Range V 0.2 V 0.2 V PSRR Power Supply Rejection Ratio d B V O L Low Level Output Voltage I OUT =1mA V 0.3 V I OH_leak High Level Output Current leakage 0.2 n A I SC Output Short Circuit Current Sink or source current m A I Q Quiescent Current per Comparator μA t F Falling Time Note 2 n s t PD Propagation Delay ( High to Low Input Overdrive=100mV, V IN V SS ns Note 1: The input offset voltage is the average of the input referred trip points. The input hysteresis is the difference between the input referred trip points. Note Rising time t R and low to high propagation delay t PD+ dependent on the pull up resistor R L and load capacitor C L Typical Performance Characteristics Input Offset Voltage V.S. Temperature -2.0 -1.0 0.0 1.0 2.0 -50 0 50 100 Temperature ( ℃) Input Offset Voltage (mV)VCM=1.2V 1.8V Input Hysteresis Voltage V.S. Temperature 0.0 2.0 4.0 6.0 8.0 10.0 -50 0 50 100 Temperature ( ℃) Input Hysteresis Voltage (mV) 1.8V VCM=1.2V

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV Typical P erformance Characteristics Quiescent Current V.S. Temperature -50 0 50 100 Temperature ( ℃) Quiescent Current (μA) 1.8V VCM=1.2V Propagation Delay V.S. Temperature 100 -50 0 50 100 Temperature ( ℃) Propagation Delay (ns) tpd- @VDD=5V tpd- @VDD=1.8V VCM=VSS Propagation Delay V.S. Overdrive Voltage 100 1000 10000 1 10 100 1V Overdrive (mV) Propagation Delay (ns) tpd+ @VDD=5V tpd- @VDD=1.8V VCM=VSS Propagation Delay V.S. Capacitor Loading 100 150 200 250 300 350 400 1 10 100 1n Capacitive Load (pF) Propagation Delay (ns) tpd- @VDD=5V tpd- @VDD=1.8V VCM=VSS Quiescent Current V.S. Common mode Voltage 100 0 1 2 3 4 5 Common Mode Voltage (V) Quiescent Current (μA) -40℃ 27℃ 85℃ VDD=5V Vin-=0V Vin+=Vcm Quiescent Cur rent V.S. Common mode Voltage 100 Common Mode Voltage (V) Quiescent Current (μA) 85℃ 27℃ -40℃VDD=5V Vin-=0V Vin+=Vcm

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn Typical Performance Characteristics Input Offset Voltage V.S. Common mode Voltage 0 1 2 3 4 5 Common Mode Voltage (V) Input Offset Voltage (mV)VDD=5V 27℃ -40℃ 85℃ Input Offset Voltage V.S. Common mode Voltage Common Mode Voltage (V) Input Offset Voltage (mV)VDD=1.8V 27℃ -40℃ 85℃ Input Hysteresis Voltage V.S. Common mode Voltage 0 1 2 3 4 5 Common Mode Voltage (V) Input Hysteresis Voltage (mV) VDD=5V -40℃ 27℃ 85℃ Input Hysteresis Voltage V.S. Common mode Voltage Common Mode Voltage (V) Input Hysteresis Voltage (mV) VDD=1.8V -40℃ 27℃ 85℃ Input Offset Voltage Distribution 10% 15% 20% 25% 30% 35% 40% 45% -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 Input Offset Voltage (mV) Percentage of Occurences

1626 Samples

VCM=1.2V 100mV overdrive 1.8V Input Hysteresis Voltage Distribution 10% 20% 30% 40% 50% 60% 70% 80% 90% 0 1 2 3 4 5 6 7 8 9 10 11 12 Input Hysteresis Voltage (mV) Percentage of Occurences VCM=1.2V 100mV overdrive 5V 1.8V

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV Typical Performance Characteristics Quiescent Current Distribution 10% 20% 30% 40% 50% 60% 70% 20 25 30 35 40 45 50 55 60 65 70 75 80 Quiscent Current (uA) Percentage of Occurences VCM=1.2V 100mV overdrive 5V1.8V Input Bias and Offset Current V.S. Temperature 100 1000 -50 0 50 100 TEMPERATURE (℃) Input Bias & Offset Current (pA) Ibias Ios VDD=5V Input Bias& Offset Current V .S. Common mode Voltag e 0 1 2 3 4 Common Mode Voltage (V) Input Bias & Offset Current (pA) VDD=5V Ibias Ios Output Short Circuit Current V.S. Temperature -40 -20 -40 -15 10 35 60 85 TEMPERATURE (℃) Short Circuit Current (mA) Isource @5V Isource @1.8V Isink@1.8V Isink@5V Output Short Circuit Current V.S. Supply Voltage -40 -20 1 2 3 4 5 Supply Voltage (V) Short Circuit Current (mA) 85℃27℃-40℃ Isource Isink Output Voltage Headroom V.S. Output Current 0.0 0.2 0.4 0.6 0.8 1.0 0 2 4 6 8 10 Output Current (mA) Output Voltage V OL (V) VDD=5V 85℃ 27℃ -40℃

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn Typical Performance Characteristics Output Voltage Headroom V.S. Output Curr ent 0.0 0.2 0.4 0.6 0.8 1.0 0 1 2 3 4 5 Output Current (mA) Output Voltage V OL (V) VDD=1.8V 85℃ 27℃ -40℃ Input Offset Voltage V.S. Supply Voltage 1 2 3 4 5 Supply Voltage (V) Input Offset Voltage (mV) 85℃ -40℃ 27℃ Input Hysteresis Voltage V.S. Supply Voltage 1 2 3 4 5 Supply Voltage (V) Input Hysteresis Voltage (mV) 85℃ 27℃ -40℃ Quiescent Current V.S. Supply Voltage 1 2 3 4 5 Supply Voltage (V) Quiescent Current (μA) 85℃ 27℃ -40℃ High to low Propagation Delay V.S. Supply Voltage 100 1 2 3 4 5 Supply Voltage (V) Propagation Delay t pd- (ns) -40℃ 27℃ 85℃ VCM=VSS Output Leakage Current V.S. Pull up Voltage 100 1000 1 2 3 4 5 Pull-up Voltage (V) Output Leakage Current (pA)VDD=5V 85℃ 27℃

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV Operation The TP194x family single supply comparators feature internal hysteresis, high speed, and low power. I nput signal range extends beyond the negative and positive power supplies. The output can even extend all the way to the negative supply. The input stag e is active over different ranges of common mode input voltage. Rail to rail input voltage range and low voltage single supply operation make these devices ideal for portable equipment. Applications Information Inputs The TP194x comparator family uses CMOS transistors at the input which prevent phase inversion when the input pins exceed the supply voltages. Fig ure shows an input voltage exceeding both supplies with no resulting phase inversion. Time (100μs/div) Vout Voltage (mV) VDD=5V Input Voltage Output Voltage Fig ure Comparator Response to Input Voltage The electrostatic discharge (ESD) protection input structure o f two back to back diodes and 1 kΩ series resistors are used to limit the differential input voltage applied to the precision input of the comparator by clamping input voltages that exceed supply voltages , as shown in Fig ure Large differential voltage s exceeding the supply voltage should be avoided to prevent damage to the input stage. Chip 1 kΩ 1 kΩ Core +In -In Fig ure . Equivalent Input Structure

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn Internal H ysteresis Most high speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This tends to occur when the voltage on one input is at or equal to the volta ge on the other input. To counter the parasitic effects and noise, the TP194x implements internal hysteresis. The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input voltage. The difference bet ween the trip points is the hysteresis. When the comparator’s input voltages are equal, the hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking the input out of the region where oscillation occurs. Figure illustrates the case where IN is fixed and IN+ is varied. If the inputs were reversed, the figure would look the same, except the output would be inverted. Vin- Vtr Vtf VDD Hysteresis Band Vi Time Non-Inverting Comparator Output Vhyst=Vtr-Vtf Vos= Vtr+Vtf 2 -Vin- VDD Inverting Comparator Output Vin- Vtr Vtf Hysteresis Band Vi Time Vhyst=Vtr-Vtf Vos= Vtr+Vtf 2 -Vin- Figure . Comparator’s hysteresis and offset External H ysteresis Greater flexibility in selecting hysteresis is achieved by using external resistors. Hysteresis reduces output chattering when one input is slowly moving past the other. It also helps in system s where it is best not to cycle between high and low states too frequently (e.g., air conditioner thermostatic control). Output chatter also increases the dynamic supply current. N on I nverting Comparator with Hysteresis A non inverting comparator with hys teresis requires a two resistor network, as shown in Fig ure and a voltage reference (V r ) at the inverting input. Vr Vi Vo Vr Vtr Vo V+=Vr Vr Vtf Vo V+=Vr VPU RPU VPU RPU VPU RPU TP1945 TP1946 TP1948 TP1945 TP1946 TP1948 TP1945 TP1946 TP1948 Fig ure Non Inverting Configuration with Hyst eresis When V i is low, the output is also low. For the output to switch from low to high, V i must rise up to V tr When V i is high, the output is also high. In order for the comparator to switch back to a low state, V i must equal V tf before the non invertin g input V is again equal to V r trV R2R1 rV tfV 1)tfVDD(VrV  RPURR R

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV rV trV RR  DDV rV tfV RPUR R RPUR RPURR DDV hystV RPUR R if R PU <<R I nverting Comparator with Hysteresis The inverting comparator w ith hysteresis requires a three resistor network that is referenced to the comparator supply voltage (V DD ), as shown in Fig ure Vi Vo VDD Vtr Vo VDD V+=Vtr Vtf Vo VDD V+=Vtf VPU RPU VPU RPU VPU RPU TP1945 TP1946 TP1948 TP1945 TP1946 TP1948 TP1945 TP1946 TP1948 Fig ure Inverting Configuration with Hysteresis When V i is greater than V , the output voltage is low. In this case, the three network resistors can be presented as paralleled resistor R || R in series with R When V i at the inverting input is less than V , the output voltage is high. The three network resi stors can be represented as R ||R in series with R DDV 23||1 trV RRR R DDV 13||2 3||2 tfV RRR RR DDV 32||1 2||1 tfVtrVhystV RRR RR  Low Input Bias Current The TP194x family is a CMOS comparator family and features very low input bias current in pA range. The low input bias current allows the comparator s to be used in applications with high resistance sources. Care must be taken to minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details. PCB Surface Leakage In applications w here low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 10 Ω. A 5V difference would cause 5pA of current to flow,

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn which is greater than the TP 194 x’s input bias current at +27°C (± pA, typical). It is recommended to use multi layer PCB layout and rout e the comparator IN and +IN signal under the PCB surface. The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Fig ure for Inverting configuration application. 1. For Non Inverting Configuration a) Connect the non inverting pin (V IN +) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting in put pin (V IN ). This biases the guard ring to the same reference as the comparator 2. For Inverting Configuration a) Connect the guard ring to the non inverting input pin (V IN +). This biases the guard ring to the same reference voltage as the comparator (e.g., V DD /2 or ground). b) Connect the inverting pin (V IN ) to the input with a wire that does not touch the PCB surfac VIN+ VIN- +VSGuard Ring Fig ure Example Guard Ring Layout for Inverting Comparator Ground Sensing and Rail to Rail Output The TP 194 x family implements a rail to rail topology that is capable of swinging to within 10mV of either rail. Since the inputs can go 00mV beyon d either rail, the comparator can easily perform ‘true ground’ sensing. The maximum output current is a function of total supply voltage. As the supply voltage of the comparator increases, the output current capability also increases. Attention must be pai d to keep the junction temperature of the IC below 150° C when the output is in continuous short circuit condition . The output of the amplifier has reverse biased ESD diodes connected to each supply. The output should not be forced more than 0.5V beyond eit her supply, otherwise current will flow through these diodes. ESD The TP 194 x family has reverse biased ESD protection diodes on all inputs and output. Input and out put pins can not be biased more than 00mV beyond either supply rail. Power Supply Layout a nd Bypass The TP 194 x family ’s power supply pin should have a local bypass capacitor (i.e., 0.01μF to 0.1μF) within 2mm for good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger) within 100mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. Good g round layout improves performance by decreasing the amount of stray capacitance and noise at the comparator inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and place exter nal components as close to the comparator ’ pins as possible. Proper Board L ayout The TP 194 x family is a series of fast s witching, high speed comparator and require s high speed layout considerations. For best results, the following layout guidelines shoul d be follow ed: 1. Use a printed circuit board (PCB) with a good, unbroken low inductance ground plane. 2. Pl ace a decoupling capacitor (0.1 μF ceramic, surface mount capa citor) as close as possible to supply 3. On the inputs and the output, keep lead lengt hs as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from the output. 4. Solder the device directly to the PCB rather than using a socket.

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV 5. For slow moving input signals, take care to prevent parasitic feed back. A small capacitor (1000 pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to propagation delay when the impedance is low. The topside ground plane should be placed b etween the output and inputs. 6. The ground pin ground trace should run under the device up to the bypass capacitor, thus shielding the inputs from the outputs. Typical Applications IR R eceiver The TP1945 is an ideal candidate to be used as an infrared receiver shown in Figure The infrared photo diode creates a current relative to the amount of infrared light present. The current creates a voltage across R D . When this voltage level cross the voltage applied b y the voltage divider to the inverting input, the output transitions. Optional R o provides additional hysteresis for noise immunity. Vo Ro VDD TP1945 RD VDD RPU Figure IR Receiver Logic Level Translator Fig ure shows an application that converts 5V logic to 3V logic levels. The TP1945/TP1946/TP1948 is powered by the +5V supply voltage, and the pull u p resistor for open drain output is connected to the +3V supply voltage. This configuratio n allows the full 5V logic swing without creating overvoltage on the 3V logic inputs. For 3V to 5V logic level translations, simply connect the 3V supply voltage to V and the 5V supply voltage to the pullup resistor. Vr Vo 5V(3V) 3V(5V) RPU TP1945 TP1946 TP1948 Fig ure Logic Level Translator

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn W indowed Comparator Fig ure shows one approach to designing a windowed comparator using a single TP201946 chip Choose different thresholds by changing the values of R , R , and R When input voltage V i reaches the overvoltage threshold V OH , the OutB gets low. Once V i falls to the undervoltage threshold V UH , the OutA gets low. When V UH i OH , the output PowerGood gets high. 1)/R3R2R1(RrVOHV  )2R1)/(R3R2R1(RrVUHV  OutA+InB +InA -InB -InA TP1946 OutB Vr Vi RPU VDD Power Good Fig ure Windowed Comparator

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV D e E b θ Package Outline Dimensions SOT23 SOT23 Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max 0.000 0.100 0.000 0.004 1.050 1.150 0.041 0.045 b 0.300 0.400 0.012 0.016 D 2.820 3.020 0.111 0.119 E 1.500 1.700 0.059 0.067 2.650 2.950 0.104 0.116 e 0.950TYP 0.037TYP 1.800 2.000 0.071 0.079 0.300 0.460 .012 0.024 θ

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn D e E b C θ Package Outline Dimensions SC 5 / SC SOT 353 / SOT 363 Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max 0.000 0.100 0.000 0.004 0.900 1.000 0.035 0.039 b 0.150 0.350 0.006 0.014 C 0.080 0.150 0.003 0.006 D 2.000 2.200 0.079 0.087 E 1.150 1.350 0.045 0.053 2.150 2.450 0.085 0.096 e 0.650TYP 0.026TYP 1.200 1.400 0.047 0.055 0.260 0.460 0.010 0.018 θ

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV D b E e θ C Package Outline Dimensions SO SOIC Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max 0.100 0.250 0.004 0.010 1.350 1.550 0.053 0.061 b 0.330 0.510 0.013 0.020 C 0.190 0.250 0.007 0.010 D 4.780 5.000 0.188 0.197 E 3.800 4.000 0.150 0.157 5.800 6.300 0.228 0.248 e 1.270TYP 0.050TYP 0.400 1.270 0.016 0.050 θ

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn Package Outline Dimensions MSOP Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.800 1.200 0.031 0.047 0.000 0.200 0.000 0.008 0.760 0.970 0.030 0.038 b

0.30 TYP

0.012 TYP

C

0.15 TYP

0.006 TYP D 2.900 3.100 0.114 0.122 e

0.65 TYP

0.026 E 2.900 3.100 0.114 0.122 4.700 5.100 0.185 0.201 0.410 0.650 0.016 0.026 θ e E A D L1 L2 L R θ b

1.8V Micropower, RRIO, Open Drain Output Comparators www.3peakic.com.cn REV θ e b E1 E D A A2 L Package Outline Dimensions SO SOIC Symbol Dimensions In Millimeters MIN T YP MAX A 1.35 1.60 1.75 0.10 0.15 0.25 1.25 1.45 1.65 b 0.36 0.49 D 8.53 8.63 8.73 E 5.80 6.00 6.20 3.80 3.90 4.00 e

1.27 BSC

L 0.45 0.60 0.80

1.04 REF

0.25 BSC

θ

1.8V Micropower, RRIO, Open Drain Output Comparators REV www.3peakic.com.cn Package Outline Dimensions TSSOP Symbol Dimensions In Millimeters MIN TYP MAX A 1.20 0.05 0.15 0.90 1.00 1.05 b 0.20 0.28 c 0.10 0.19 D 4.86 4.96 5.06 E 6.20 6.40 6.60 4.30 4.40 4.50 e

0.65 BSC

L 0.45 0.60 0.75

1.00 REF

R 0.09 θ E e A D L1 L2 L R θ c