TMP86C829

TMP86C829U TOSHIBA | Alldatasheet

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TOSHIBA Original CMOS 8-bit Microcontroller - TLCS-870/C series TMP86C829U/F, TMP86CH29U/F, TMP86CM29U/F, TMP86PM29U/F ; Databook 10th Edition TOSHIBA CORPORATION

TOSHIBA Under Development TMP86C829/H29/M29 CMOS 8-Bit Microcontroller TMP86C829U/F, TMP86CH29U/F, TMP86CM29U/F The 86C829/H29/M29 are the high-speed, high-performance and low power consumption 8-bit microcomputer, including large-capacily ROM, RAM, LCD driver, multi-function timer / counter, serial interface (UART/SIO), a 10-bit A/D converter and two clock generators on chip. |__ PartNo [rom RAM Package Tc arenacit TMP UF K i 12 x Bbit -TMPBGCE20WF | BK x Sbit | S12x Bbit | o¢p64-1010-0.50 TMP86CH29U/F_] 16K x B-bit TMP86PM29U/F penn m nnn and 15K x Bbit | P-QFPG4-1414-0.80A Tupsscm29u/F_| 32K x &bit __ Features P-LOFP64-1010-0.50 © #8-bil single chip microcumputer TLCS-870/C series @ Instruction execution time: 0.25 xs (at 16 MHz) _ 122 ys (at 32.768 kHz) aN 132 types & 781 basic instructions > REGO @ 18interrupt sources (External: 5, Internal: 13) . . TMP86CB29U @ Input/Output ports (39 pins) TMP86CH29U at cM © 18-bit timer counter: 1 ch TMPESCM29U © Timer, Eveut counter, Pulse width measurement, P-QFP64-1414-0.80A, Frequencymeasurement modes ® 8&-bit timer counter: 4ch @ Timer, Event counter, PWM output, Programmable Divider _—- Output PPG modes K - @ TimeBaseTimer SS @ Divider output function ° TMP86C829F @ Watchdog Timer TMPBECH29F © Interrupt source /reset output (programmable) a Serial interface @ 8bit UART/SIO: 1ch @ 10-bit successive approximation type A/D converter @ Analoginput: 8ch 9e0g10c8P1 @For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality and Reliability Assurance/ Handling Precautions. @ TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress It is ‘the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product, could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the mast recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. @ Ihe products described in this document are subject to the foreign exchange and foreign trade laws. @ The information contained herein is presented only as 2 guide for the applications of our products. No responsibility is assumed. by TOSHIBA CORPORATION for any infringements of intellectual property. or ‘other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual Property or other rights of TOSHIBA CORPORATION or others. @ ine intormation coritainea nerein Is subject to change without notice.

TOSHIBA Under Development TMP86C829/H29/M29 ee Et @ Four Key On Wake Up pins @ LCD driver/controller @ Built-in voltage booster for LCD driver @ With displaymemory @ LCD direct drive capability (Max 32 seg x 4.com) © 41/4, 1/8, 1/2duues or static drive are programmably selectable @ Dual clock operation ® Single /Dual-clock mode @ Nine power saving operating modes @ STOP mode: Oscillation stops. Battery / Capacitor back-up. Port output hold / High- impedance. © SLOW 1,2mode: Low power consumption operation using low-frequency clock (32.768 kHz) @ IDLEOmode: CPU stops, and peripherals operate using high-frequency clock of Time-Base- Timer, Release by INTTBT interruput. @ IDLE 1 mode: CPU stops, and peripherals operate using high-frequency clock. Release by interruputs. e@ IDLE 2 mode: CPU stops, and peripherals operate using high and low frequency clock. Release by interruputs. @ SLEEP0 mode: CPU stops, and peripherals operate using low-frequency clock of Time-Base- Timer. Release by INTTBT interruput. © SLEEP 1mode: CPU stops, and peripherals operate using low-frequency clock. Release by interrupts, @ SLEEP 2mode: CPU stops, and peripherals operate using high and low frequency clock. Release by interrupts. @ Wide operating voltage: 1.8 to 5.5 V at 4.2 MHz/32.768 kHz, 2.7 to 5.5 V at 8 MHz/32.768 kHz, 4.5 to 5.5 V at 16 MHz/32.768 kHz

TOSHIBA Under Development TMP86C829/H29/M29 Pin Assignments (Top View) scaaseers P-LQFP64-1010:0.50 88ss5csGscs P-QFP64-1414-0.80A pesussucaus BSGSSrecesrnrenes HOA BARRA OO R Ree se62 —tanrfag FFE REESE SRR RHR caiccois) SEG1 =—C1)50 +31 PIT p53 (SEG10) . SEGO -—C1) 51 30fTT += P52 (SEG21) com3 C152 29, —-» P54 (SEG22) com2 <—(053 28] e-+ P50 (SEG23) cont Cosa 97 free 17 @ea2akZ7) como -—CoIUss 26,IT ++ P16 (SEG25/TxD/SO) v3 —-CoOs6 25-1 P15 (SEG26RXDS5I) v2 —=C—Os7 224A = P14 (SEG27ANT3) vi —-C ss 23D =~ P13 (SEG284NT2) 1 ed 39 2p ria evasive) co > 60 21+ P14 (56630) (OVO) P30 = C61 20 =— P10 (SEG31) (PWM3PDOSITC3) P31 C0 62 19h0——avop (PWMEPDOMPPGATCA) P32 ~-- 1] 63 19} — varer (ewMErDOB/FPGETCE) P33 «CTL 64) 17 FL P67 (AIN7STOPS) Wane won ea 2i eases QHOOGOUGHOUOOO0UU ER OBERRRERERERS, gz S858 R8sscse3 oS REOREPEEEEEGE

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TOSHIBA Under Development TMP86C829/H29/M29 Block Diagram vO Fort segment Output) Common outputs Segment ovtpute P77 ow) ps7 (este) P17 CSG28) COM3 to COMO SEG7 to SEGO P7O(SEG1S) PSO(SEG23) P10(SEG31) power {voo a ae ‘Supply VSS [rs] [rs] ; i t ft fi icopower St fF] tcovohtage Addcess/Date Bus Supply V2 fa] Leortor circuit a a i rics.870¢ | | datamemory | [Program cru RAM Memory ROM Reset uO RESET. TestPin TEST | ‘System Control Circuit: Standby Control Cieuit neomeser Sysy Twp wort Connecting 9 xour HST eatery | Clock Timer TimertCounter | | TimeriCounter | | VARTSIO Genetor | Twas fakesicshed [Se [oar] Timer au [__Adsrenoatoous fT TT [2] robit | i [rs] AD Converter 7 P22 to P20 AVDD P67 (AIN7) P23 to P30 VAREF to P60 (AINO) VOPorts Analog reference vine WO Ports

TOSHIBA Under Development TMP86C829/H29/M29 Pin Function [_Pinname Tinoutsoutour[| Function’ P17 (SEG24, SCR) vo (vO) Serial clock input / output UART data output P16 (SEG25,TxD,SO) | VO(VO) | 4 sit input/output port with latch. _| Serial data output When used as input port, an externat : P15 (SEG26, RxD, SI) | VO(VO) _|interruput input, serial clock input /| genet dota moet sete srsstiusstennefemserecstenssseese| OUtPUt, Serial data input / output and see Ptisnesccsaseeneenn| LED segment P14 (SEG27,INT3)__|__VO(VO) | UART data input / output, the latch | External interrupt3 input | outputs. P13 (SEG28, INT2) VO (VO) _| Must be set to "1". External Interrupt 2 Input “ ooo] When used @y @ LGU segment output, Poon enc P12 (SEG29,INT!) ||. VOLO) | the PILCR must be set to "1", External interrupt input FIO (36031) wo (OuTpUD P22 (XTOUT) VO (Output) Resonator connecting pins (32.768 kHz) Srtonnnrnranneneunnfemmnnneed 3.bit input / output port with latch. | For inputting external clock, XTIN is used and P21 (XTIN) 10 (Input) When used as an input port, the latch | XOUT is opened. coseeesesceeeseceenane a must be set to "1". External interrupt input 5 or STOP mode release P20 (INTS, STOP) W/O (Input) signal input —— ; ; S-bit (16-bit) PWM output, 8 (16) bit P33 CWRIG, PODS, vowvoy | &bit programmable input / output | programmable divider output, @ (16) bit PPG s TCH) Ports (high current output). output, Timercounter 6 input jeccrcsrscrmineeinnmeenneond Each bit of these ports can be [mtbatinnnacetmne ccnp tennessee P32 (PWM, PDO4, vo(vo) _ | individually configured as an input or | 6-bit PWM output, &-bit programmable divider cee PGE TCA) |" |an output under software control. | Output, 16-bit PPG output, Timer counter 4 input P31 (PWM3, PDO3, voto) [Yen used as a umer comer Inpuc, | @-bit (16-bit) PW output, 8(16) programmable C3) timer / taaaihead ouput. a once divider output, Timer counter 3 input. P30 (DVO) VOCOurputy | ONtPYE the latch must be set to Divider output B-bit Input / output port with latch, por See SEG23) VO (Output) | When used as a LCD segment output, | LCD segment outputs the PSLCR must be set to "1". P67(AIN7,STOPS) | VO (Input) Key on wake up input 5 P66 (AIN6, STOPS) vO (Input) | 8-bIt programmable input / output | Key on wake up input a POS (AINS, STOP). |. VO.InpUt) | ports can be individually configured | <eYonwakeupinput3. P64 (AIN4, STOP2) VO(input) | as an input or an output under | Key on wake up input 2 AND converter P63 (AIN3, INTO) 1/0 (Input) _| Software control. When used as a key | External interrupt input 0 analog inputs aeoeaeei inet eewnnefntentnee tod on wake up input, an external bonis P62 (AIN2, ECNT) |. WO Input) | interrupt input and timer / counter | timer/ counter 1input P61 (AIN1, ECIN) VO (input) | input, the PECR must be set to "1". P60 (AINO) YO (input) 8-bit input / output port with latch. P77 (SEG8) to s£G15) | YO(Ourpud) | When used as a LCD segment output, | LCD segment outputs 6 the P7LCR must be set to "1". SEG7 to SEGO LCD segment outputs See Ee cece] QUEUE setae ee utes a atamninnstantninminintiinnstinsinenenneneeee COM3 to COMO LCD common outputs \\V3toV1 | LeD voltage | LCD voltage booster pin. Capacitors are required between CO and C1 pin and V1/V2/V3 Cito co booster pin | pinand GND. Resonator connecting pins for high-frequency clock. For inputting external clock, XIN is XIN, XOUT Input Output | iced and XOUT is opened. Test pin for out-going test. Be fixed to low. VDD, vss +5V, 0 (GND) MAREE acne] MONEE SUPPLY | Auialuy reference voltage inputs (High, Low) sevstetintnteteeeetneneneee AVDD. +5, 0 (GND) A/D circuit power supply