TLF4277 INFINEON | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 22
Technical content
Low Drop Out Linear Voltage Regulator Integrated Current Monitor Data Sheet, Rev. 1.0, May 2009 Automotive Power
Data Sheet 2 Rev. 1.0, 2009-05-07 TLF4277 Table of Contents Table of Contents
TLF4277EL PG-SSOP14 EP TLF4277 Data Sheet 3 Rev. 1.0, 2009-05-07 Low Drop Out Linear Voltage Regulator Integrated Current Monitor TLF4277 1O v e r v i e w
Features
- Integrated Current Monitor
- Adjustable Current Limitation
- Adjustable Output Voltage
- Overvoltage Detection
- Output Current up to 200 mA
- Very Low Current Consumption
- Very Low Dropout Voltage
- Wide Input Voltage Range up to 40 V
- Reverse Polarity Protection
- Short Circuit Protected
- Overtemperature Shutdown
- Automotive Temperature Range -40 °C ≤ Tj ≤ 150 °C
- Green Product (RoHS and WEEE compliant)
- AEC Qualified
Description
The TLF4277 is the ideal companion IC to supply active antennas for car infotainment applications. The adjustable output voltage makes the TLF4277 capable of supplying the majority of standard active antennas such as:
- F M / A M
- D A B
- X M
- SIRIUS The TLF4277 is a monolithic integrated low drop out volt age regulator capable of supplying loads up to 200 mA. For an input voltage up to 40 V the TLF4277 provides an adjustable output voltage in a range from 5 V up to 12 V. The integrated current monitor function is a unique feature that provides diagnosis and system protection functionality. Fault conditions such as overtemperature and output overvoltage are monitored and indicated at the current sense output. The maximum output current limit of the device is adjustable to provide additional protection to the connected load. Via the enable function the IC can be disabled to lower the power consumption. The PG-SSOP14 EP package provides an enhanced thermal performance within a SO8 body size.
Data Sheet 4 Rev. 1.0, 2009-05-07
2 Block Diagram
Figure 1 Block and simplified applicati on diagram TLF4277 (Package PG-SSOP14 EP) Bandgap Reference GND Q I B lockDiagram .vsd CQ VBAT Regulated Output Voltage ADJ RCS 1 Current Monitor Internal Supply RSHUNT Protection circuits CSO CSO CI Load E.g. Antenna Amplifier RSO TLF4277CS1 EN CS2
Data Sheet 5 Rev. 1.0, 2009-05-07 TLF4277 Pin Configuration
3 Pin Configuration
3.1 Pin Assignment
Figure 2 Pin Configuration (top view)
3.2 Pin Definitions and Functions
current monitor and power stage input 3C S 1 Current Sense In 1 current monitor input 5I IC Supply Place a capacitor from I (Pin 5) to GND close to the IC for compensating line influences. 7C S O Current Sense Out current monitor and status output 8E N Enable high signal enables the regulator; low signal disables the regulator; connect to I, if the Enable function is not needed
10 GND Ground
connect pin to PCB and heat sink area
12 ADJ Voltage Adjust
connect an external voltage divider to configure the output voltage
14 Q Regulator Output
connect a capacitor between Q (Pin 8) and GND close to the IC pins, respecting the values given for its capacitance C Q and ESR in the table Chapter 4.2 PAD Heat sink connect to PCB heat sink area and GND 2,4,6 NC Not Connected Internally not connected; Connect to PCB GND 9,11,13 NC Not Connected Internally not connected; Connect to PCB GND *1' $'- &62
General Product Characteristics Data Sheet 6 Rev. 1.0, 2009-05-07
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Note: Stresses above the ones listed her may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) 1) Not subject to production test, specified by design. Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Voltage Ratings
4.1.1 IC Supply I
VI -42 45 V –
4.1.2 Enable Input EN VEN -42 45 V –
4.1.3 Voltage Adjust Input ADJ VADJ -0.3 10 V –
4.1.4 Regulator Output Q VQ -1 40 V –
4.1.5 Current Monitor Input CS1 VCS1 -42 45 V –
4.1.6 Current Monitor Input CS2 VCS2 -42 45 V –
4.1.7 Current Monitor Out CSO VCSO -0.3 5 V – Temperatures
4.1.8 Junction Temperature Tj -40 150 °C–
4.1.9 Storage Temperature Tstg -55 150 °C–
4.1.10 ESD Resistivity to GND
VESD -2 2 kV HBM 2) 2) ESD susceptibility, HBM accord ing to AEC-Q-100-002-JESD22-A114
4.1.11 ESD Resistivity VESD -1 1 kV CDM 3)
3) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1
Data Sheet 7 Rev. 1.0, 2009-05-07 TLF4277 General Product Characteristics
4.2 Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.
4.3 Thermal Resistance
Pos. Parameter Symbol Limit Values Unit Conditions Min. Max.
4.2.1 Input Voltage VI 54 0 V –
4.2.2 Input Voltage Power Stage VCS2 VQ + 0.5 40 V VQ = VCS2 - Vdr 4.2.3 Differential Input Voltage VSHUNT 00 . 5 V VSHUNT = VCS1 - VCS2
4.2.4 Output Voltage Range VQ 51 2 V –
4.2.5 Reference Resistor RCS1 100 1000 Ω –
4.2.6 Current Sens e Output Resistor RCSO 1k 5k Ω –
4.2.7 Current Sense Output Capacitor CCSO 14 . 7 µ F –
4.2.8 Junction Temperature Tj -40 150 °C–
4.2.9 Output Capacitor Requirements CQ 10 – µF – 1)
1) The minimum output capacitance requ irement is applicable for a worst case capacitance tolerance of 30%
4.2.10 ESRCQ –3 Ω –2)
2) Relevant ESR value at f = 10 kHz Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. exposed pad
4.3.2 Junction to Ambient 1)
1) Not subject to production test, specified by design RthJA – 150 – K/W Footprint only 2) 2) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu). 4.3.3 – 64 – K/W 300 mm 2 PCB heat sink area2) 4.3.4 – 55 – K/W 600 mm 2 PCB heat sink area2) 4.3.5 – 50 – K/W 2s2p PCB 3) 3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet 8 Rev. 1.0, 2009-05-07
5 Voltage Regulator
5.1 Description Voltage Regulator
The output voltage VQ is controlled by comparing the feedback voltage (VADJ) to an internal reference voltage and driving a PNP pass transistor accordingly. The control loop stability depends on the output capacitor CQ, the output capacitor ESR, the load current and the chip temperature. To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistor ESR requirements given in the Table 4.2 “Functional Range” on Page 7 have to be maintained. For stability details please refer to the typical performance graph “Output Capacitor Series Resistivity ESRCQ” on Page 11. In addition the output capacitor may need to be sized larger to buffer load transients. An input capacitor CI is not needed for the control loop stability, but recommended to bu ffer line influences. Connect the capacitors close to the IC terminals. In general a buffered supply voltage is recommended for the device. For details see Chapter 9. Protection circuitry prevents the IC as well as the application from destruction in case of catastrophic events. The integrated safeguards consist of output current limitation, reverse polarity protection as well as thermal shutdown in case of overtemperature. In order to avoid excessive power dissipation that could never be handled by the pass element and the package, an integrated safe operation monitor lowers the maximum output current input voltages above VBAT =2 2V . The thermal shutdown circuit prevents the IC from i mmediate destruction under fault conditions (e.g. output continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator restarts. This leads to an oscillatory behavior of the output volt age until the fault is re moved. However, junction temperatures above 150 °C are outside the maximum ratings and therefore significantly reduce the IC lifetime. The TLF4277 allows a negative supply voltage. However, several small currents are flowing into the IC increasing its junction temperature. This reverse current has to be considered for the thermal design, respecting that the thermal protection circuit is not operating during reverse polarity condition. Figure 3 Block Diagram Volt age Regulator Circuit Bandgap Reference GND QCS2 BlockDiagram_VoltageRegulator.vsd Saturation Control Current Limitation Temperature Shutdown CQ LOAD Regulated Output VoltageIQICS2 ADJ
Data Sheet 9 Rev. 1.0, 2009-05-07 TLF4277 Voltage Regulator
5.2 Electrical Character istics Voltage Regulator
Electrical Characteristics: Voltage Regulator VBAT = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 7 “Measuring Circuit” on Page 19 (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 5.2.1 Reference Voltage VREF,int –1 . 2 2 –V 1)– 1) Parameter not subject to produ ction test; specified by design.
5.2.2 Output Voltage Tolerance 2)
2) Referring to the device tolerance only, the tolerance of the resistor divider can cause additional deviation. VQ -2 – 2 % 1 mA ≤ IQ ≤ 200 mA;
9 V ≤ VBAT ≤ 16 V
5.2.3 -2 – 2 % 1 mA ≤ IQ ≤ 150 mA;
6 V ≤ VBAT ≤ 16 V
5.2.4 -2 – 2 % 1 mA ≤ IQ ≤ 100 mA;
16 V ≤ VBAT ≤ 32 V3)
3) See typical performance graph for details. 5.2.5 -2 – 2 % 1 mA ≤ IQ ≤ 10 mA;
32 V ≤ VBAT ≤ 45 V3)
5.2.6 Load Regulation
dVQ,load -30 -5 – mV IQ = 1 mA to 150 mA; VBAT = 6 V VQ = 5 V
5.2.7 Line Regulation
dVQ,line –52 0 m V VBAT = 6 V to 32 V; IQ = 5 mA VQ = 5 V
5.2.8 Power Supply Ripple
Rejection1) PSRR 60 65 – dB fripple = 100 Hz; Vripple = 1 Vpp
5.2.9 Dropout Voltage
Vdr = VCS2 - VQ Vdr – 120 250 mV IQ = 50 mA4) 4) Measured when the output voltage VQ has dropped 100 mV from its nominal value. 5.2.10 – 250 500 mV IQ = 150 mA4) 5.2.11 Output Cu rrent Limitation IQ,max 300 – 600 mA 0 V ≤ VQ ≤ 0.95 * VQ,nom; CSO pin connected to GND
5.2.12 Reverse Current
IQ -2 -1 – mA VBAT = VCS2 = 0 V; VQ = 5 V
5.2.13 Reverse Current
IBAT -10 -6 – mA VBAT = -16 V; VQ = 0 V
5.2.14 Overtemperature Shutdown
Tj,sd 151 – 200 °C Tj increasing1)
5.2.15 Overtemperature Shutdown
Tj,hy –2 5 –K Tj decreasing1)
Data Sheet 10 Rev. 1.0, 2009-05-07
5.3 Application Information for the setting the variable output voltage
The output voltage of the TLF4277 can be adjusted between 5 V and 12 V by an external output voltage divider, closing the control loop to the voltage adjust pin ADJ. The voltage at pin ADJ is compared to the internal referenc e of typical 1.22 V in an error amplifier. It controls the output voltage. Figure 4 Application Detail External Components at Output for Variable Voltage Regulator The output voltage is calculated according to Equation (1): VQ = (R1 + R2)/R2 x VREF,int, neglecting IADJ (1) VREF,int is typically 1.22 V. To avoid errors caused by leakage current IADJ, we recommend to choose the resistor value for R2 < 27 kΩ. The accuracy of the resistors for the external voltage divider can lead to a higher tolerance of the output voltage.To achieve a reasonable accura cy resistors with a tolerance of 1% or lower are recommended for the feedback divider. Bandgap Reference GND Q BD_V oltageRegulator _Adjust.vsd Saturation Control Current Limitation CQ IQ ADJ
Data Sheet 11 Rev. 1.0, 2009-05-07 TLF4277 Voltage Regulator
5.4 Typical Performance Characteristics Voltage Regulator
Reference Voltage VREF,int vs. Junction Temperature Tj Dropout Voltage Vdr vs. Output Current IQ Output Capacitor Series Resistivity ESRCQ vs. Output Current IQ Power Supply Ripple Rejection PSRR Vref_Tj.vsd TJ [°C] Vref,int [V] 1.20 1.21 1.22 1.23 -40 0 40 80 120 150 Vdr -T j. vsd IQ = 150 mA 300 200 Vdr [mV ] 100 150 TJ [°C] 1200-40 40 80 150 IQ = 50 mA ESR - I Q. vsd Stable Region Unstable Region 0 50 100 150 200 0,1 0, 01 100 C Q = 10 µF T j = -40..150 °C V I = 6..28 V IQ [mA] ESR(CQ)[Ω] PSRR .vsd 0,01 0,1 1 10 f [kHz] PSRR [dB] 100 T j T j = 25 °C T j = -40 °C I Q = 10 mA C Q = 10 µF ceramic V I = 13.5 V V ripple = 0.5 Vpp = 150 °C 100
Data Sheet 12 Rev. 1.0, 2009-05-07
6 Current Consumption
6.1 Electrical Characteris tics Current Consumption
Electrical Characteristics: Current Consumption VBAT = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground; direction of currents as shown in Figure 7 “Measuring Circuit” on Page 19 (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
6.1.1 Current Consumption Iq,on – 150 200 μA IQ ≤ 200 μA; Tj ≤ 25 °C;
VEN = 5 V; Iq = II + ICS2 - IQ 6.1.2 – 175 250 μA IQ ≤ 200 μA; Tj ≤ 85 °C; VEN = 5 V; Iq = II + ICS2 - IQ 6.1.3 – 1.2 2.6 mA IQ = 50 mA VEN = 5 V; Iq = II + ICS2 - IQ 6.1.4 – 3.5 6 mA IQ = 100 mA VEN = 5 V; Iq = II + ICS2 - IQ 6.1.5 – 5 10 mA IQ = 150 mA VEN = 5 V; Iq = II + ICS2 - IQ
6.1.6 Current Consumption Iq,off ––3 μA Tj ≤ 25 °C
VEN = 0.8 V Iq = II + ICS2 - IQ VEN = 0.8 V Iq = II + ICS2 - IQ
Data Sheet 13 Rev. 1.0, 2009-05-07 TLF4277 Current Consumption
6.2 Typical Performance Gr aphs Current Consumption
Current Consumption Iq,off vs. Junction Temperature Tj Current Consumption Iq,on vs. Output Current IQ Current Consumption Iq,on vs. Junction Temperature Tj Iq ,off-Tj.vsd TJ [°C] 60-20-40 20 40 100 08 0 3,0 2,0 Iq [µA ] 1,0 1,5 0,5 VBAT = 13.5 V VEN = 0 .8 V Iq-IQ.vsd IQ [mA] 400 80 120 160 4,5 2,0 Iq [mA ] 1,0 1,5 0,5 2,5 3,0 T= 85 °C T= 25°C VBAT = 13.5 V VEN = 5 V Iq-Tj(IQ200µA).vsd TJ [°C] -40 40 08 0 1 2 0 1 5 0 300 250 Iq [µA ] 100 150 VBAT = 13.5 V VEN = 5 V IQ = 200 µA
Current and Protection Monitor Functions Data Sheet 14 Rev. 1.0, 2009-05-07
7 Current and Protection Monitor Functions
7.1 Functional Description Curre nt and Protection Monitors
The TLF4277 provides a set of advanc ed monitor functionality. The current flowing into the power stage can be monitored at the CSO output. In addition the current limitation can be adjusted via external resistors. Events of the implemented protection functions are reported throug h dedicated voltage levels at the CSO output. This information can be processed by an external µC for system analysis and failure identification. The monitored events are over-current, overvoltage, and temperature shutdown. Figure 5 Block diagram current and protection monitor To reduce possible effects from the supply voltage VBAT additional filtering in of the supply voltage is recommended. A combination of a 100 nF capacitor and an a dditional buffer capacitor of 10 µF or higher should be placed as close a possible to the IC terminal, which are connected to VBAT. Figure 6 shows the output level at the CSO pi n versus the operation or fault condition. The graph is valid for the following set up of external components: RSHUNT = 1Ω RCS1 = 100 Ω CCSO = 2.2 µF RCSO = 1.5 kΩ GNDCurrent _ Monitor .vsd VBAT RCS1 Current Monitor RSHUNT CSO CCSO RCSO CS1 CS 2 Buffer OV-Detection TSD-Detection OC-Detection Monitor Circuits ICS2ICS 1 ICSO to power stage
Data Sheet 15 Rev. 1.0, 2009-05-07 TLF4277 Current and Protection Monitor Functions Figure 6 Output levels and functionality of the CSO output 1)
7.1.1 Linear Current Monitor
Inside the linear current monitor area the current driven out of the CSO pin is proportional to the voltage which is measured between pin CS1 and CS2. The level of the current ICSO can be adjusted according to Equation (2): Adjustment ICSO (2) Adjustment of the voltage level for VCSO (3) 1) The graph is just an example and only valid for an certain configuration of the external components Short Circuit to VBAT
3.1 V typical
[mA] VCSO [V] Linear Current Sense Band up to 2.45 V 3,2 3,0 2,95 2,65 2,45 Thermal Shut Down
2.80 V typical
Current limitation and SC to GND
2.55 V typical
VCS1 VCS2– RCS1 RSHUNT RCS1 VCSO VCS1 VCS2–() RCSO× RCS1 RCSO RCS1
Current and Protection Monitor Functions Data Sheet 16 Rev. 1.0, 2009-05-07
7.1.2 Adjustable Output Current Limitation
The TLF4277 has an adjustable current limitation for the current flowing into the power stage (pin CS2). If the level of the voltage drop across the sense resisto r RSHUNT is higher than the desired linear monitor range the output current of the TLF4277 will be limited. Setting of the adjustable current limitation (4) A voltage level as defined in Table 7.2.6 on Page 17 will be applied at the CSO pin. To achieve a current limitation of 170mA the following configuration can be used: RSHUNT = 1Ω RCS1 = 100Ω RCSO = 1.5kΩ
7.1.3 Overvoltage Detection
To detect a possible short circuit of the output to a higher supply rail the TLF4277 has an overvoltage detection implemented. An overvoltage will be detected, if the vo ltage level at the ADJ pin is 20% higher than the internal reference voltage VREF,int defined in Table 5.2.1 on Page 9. Under this condition the CSO pin will be driven through an internal voltage buffer with a voltage level as defined in Table 7.2.7 on Page 17.
7.1.4 Thermal Shut down Detection
If the junction temperature will exceed the limits defined in the Table 5.2.14 on Page 9 the TLF4277 will disable the output voltage. In this case a voltage level as defined in Table 7.2.8 on Page 17 will be applied at the CSO pin. ICS2,lim 2.55V R CS1× RSHUNT R× CSO ICS2,lim 2.55V 100 Ω×
Data Sheet 17 Rev. 1.0, 2009-05-07 TLF4277 Current and Protection Monitor Functions
7.2 Electrical Characteristics Cu rrent and Protection Monitor
Electrical Characteristics: Current Monitor Function VBAT = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 7 “Measuring Circuit” on Page 19 (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Linear Current Monitor
7.2.1 Current Sense Output Current ICSO
(VSHUNT = 10 mV) ICSO 0.08 0.1 0.12 mA Tj =25°C RSHUNT = 1Ω RCS1 = 100 Ω RCSO = 1.5 kΩ1) 1) Referring to the device tolerance only, the tolerance of the external components can cause additional deviation 7.2.3 (VSHUNT = 100 mV) 0.97 1 1.03 mA Adjustable Current Limitation
7.2.5 Adjustable Current Limit
ICS2,lim 162 170 187 mA RSHUNT = 1Ω RCS1 = 100 Ω RCSO = 1.5 kΩ VQ < 0,95 * VQ,nom
7.2.6 CSO Voltage Level
VCSO,cur_lim 2.45 2.55 2.65 V Output Level Overvoltage Detected
7.2.7 CSO Voltage Level
VCSO,OV 3.0 3.1 3.2 V VADJ > 1.2 * VREF,nom Output Level Overtemperature Detected
7.2.8 CSO Voltage Level
Overtemperature Detected 2) 2) Specified by design; not subject to production test VCSO,TSD 2.65 2.8 2.95 V 150 °C < Tj < 180 °C
Data Sheet 18 Rev. 1.0, 2009-05-07
8 Enable Function
8.1 Description Enable Function
The TLF4277 can be turned on or turned off via the EN Input. With voltage levels higher than VEN,high applied to the EN Input the device will be complete ly turned on. A volt age level lower than VEN,low sets the device to low quiescent current mode. In this condition the device is turned off and is not functional. The Enable Input has an build in hysteresis to avoid toggling between ON/OFF state, if signals with slow slope are applied to the input.
8.2 Electrical Character istics Enable Function
Electrical Characteristics: Enable Function VBAT = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 7 “Measuring Circuit” on Page 19 (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
8.2.1 Enable
VEN,low ––0 . 8 V –
8.2.2 Enable
VEN,high 2––V VQ settled
8.2.3 Enable
VEN,hyst 5 0 ––m V –
8.2.4 Enable
IEN ––2µ A VEN = 5 V
8.2.5 Enable
internal pull-down resistor REN 34 . 5 6M Ω –
Data Sheet 19 Rev. 1.0, 2009-05-07 TLF4277
Application Information
9 Application Information
9.1 Measurement Circuit
Figure 7 Measuring Circuit Measurement Set Up: RSHUNT = 1Ω RCS1 = 100 Ω CCSO = 2.2 µF RCSO = 1.5 kΩ R1 = 38 kΩ R2 = 12 kΩ CQ = 10 µF GND Q I Measuring _Circuit. vsd CQ ADJ RCS1 Current Monitor Internal Supply RSHUNT CSO CSO CI RSO TLF4277CS1 EN CS2 RL VAdj IQ VCSO VEN IEN II ICSO VQ ICS1 ICS2 VSHUNT VBAT IBAT IADJ Monitor Circuits
Data Sheet 20 Rev. 1.0, 2009-05-07 Figure 8 PG-SSOP14 EP Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). PG-SSOP-14-1,-2,-3-PO V02 1 7 14 8 14x0.25±0.05 2) M0.15 DC A-B 0.65 C Stand Off 0 ... 0.1 (1.45) 1.7 MAX. 0.08 C A B 4.9±0.11) A-BC0.1 2x 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion Bottom View ±0.23 ±0.22.65 0.2 ±0.2 D 6 M D 8x 0.64±0.25 3.9±0.11) 0.35 x 45˚ 0.1 CD +0.06 0.19 8˚ MAX. Index Marking Exposed Diepad For further information on Infineon packages, please visit our website: http://www.infineon.com/packages. Dimensions in mm
Data Sheet 21 Rev. 1.0, 2009-05-07 TLF4277
Revision History
1.0 2009-05-07 Data Sheet
81726 Munich, Germany
© 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.