TLF1963TB

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Technical content

Rev. 1.0, 2012-11-08 TLF1963 Low Dropout Linear Voltage Post Regulator TLF1963TB TLF1963TE

Data Sheet 2 Rev. 1.0, 2012-11-08 TLF1963 Table of Contents Table of Contents

TLF1963TB PG-TO263-5 T1963V TLF1963TE PG-TO252-5 T1963V PG-TO263-5 PG-TO252-5 Data Sheet 3 Rev. 1.0, 2012-11-08 Low Dropout Linear Voltage Post Regulator TLF1963 1O v e r v i e w

Features

• Adjustable Output Voltage
• Output Voltage Tolerance at small loads of ±1.5 %
• Output Current Capability up to 1.5 A
• Very Low Dropout Voltage of 340 mV
• Extended Operating Range Starting at 1.7 V
• Low Noise of typ. 40 µV RMS (10 Hz to 100 kHz)
• Small Output Capacitor for Stability 10 µF
• Suitable for Ceramic Output Capacitors
• Enable Functionality
• Overtemperature Shutdown
• Reverse Polarity Protection
• Output Current Limitation
• Wide Temperature Range From -40 °C up to 150 °C
• Suitable for use in automotive electronics as Post Regulator
• Green Product (RoHS compliant)
• AEC Qualified Functional Description TLF1963 is a low dropout voltage regulator available in PG-TO263-5 and PG-TO252-5 SMD package. The IC regulates an input voltage VI in the range of 2.5 V < VI < 20 V to an adjustable output voltage of 1.21 V < VQ,nom < VI -Vdr. The device is capable to supply loads up to 1.5 A. The regulator can be enabled and disabled via the Enable input. The in tegrated output curr ent limitation and the overtemperature shutdown will protect the device against failures like output short circuit to GND, overcurrent and overtemperature. The TLF1963 provides the ideal solution for systems requiring several supply voltages. With its adjust feature the regulator can provide all supply voltages between 1.21 V and the available input voltage, this offers a high flexibility to the system designer. Choosing External Components The input capacitor CI is necessary for compensating line influences. The output capacitor CQ is necessary for the stability of the re gulating circuit. Stability is guara nteed at values specified in “Functional Range” on Page 8 within the whole operating temperature range.

Data Sheet 4 Rev. 1.0, 2012-11-08 TLF1963 Block Diagram

2 Block Diagram

Q ADJ Error Amplifier Reverse Polarity Protection Temperature Protection Saturation Control Over Current Protection

Data Sheet 5 Rev. 1.0, 2012-11-08

3 Pin Configuration

3.1 Pin Assignment TLF1963TB

Figure 2 Pin Configuration PG-TO263-5

3.2 Pin Definitions an d Functions TLF1963TB

1E N Enable; A low signal disables the IC. A high signal switches it on. Connect to the input I, if enable functionality is not required. 2I Input voltage; IC supply. For compensating line influences, a capacitor close to the IC pins is recommended. 3G N D Ground 4Q Output voltage; Connect a capacitor between Q and GND close to the IC terminals, respecting the values given for its capacitance CQ and ESR given in the table “Functional Range” on Page 8 5A D J Adjust Input; Connect an external voltage divider from Q to GND to determine the output voltage. By connecting the output pin Q directly to the adjust pin ADJ without resistors an ouput voltage equal to the reference voltage VADJ = 1.21 V is determined. TAB GND Ground GND GNDEN IQ ADJ

Data Sheet 6 Rev. 1.0, 2012-11-08 TLF1963 Pin Configuration

3.3 Pin Assignment TLF1963TE

Figure 3 Pin Configuration PG-TO252-5

3.4 Pin Definitions an d Functions TLF1963TE

1E N Enable; A low signal disables the IC. A high signal switches it on. Connect to the input I, if enable functionality is not required. 2I Input voltage; IC supply. For compensating line influences, a capacitor close to the IC pins is recommended. 3G N D Ground 4Q Output voltage; Connect a capacitor between Q and GND close to the IC terminals, respecting the values given for its capacitance CQ and ESR given in the table “Functional Range” on Page 8 5A D J Adjust Input; Connect an external voltage divider from Q to GND to determine the output voltage. By connecting the output pin Q directly to the adjust pin ADJ without resistors an ouput voltage equal to the reference voltage VADJ = 1.21 V is determined. TAB GND Ground EN GND IQ ADJ 1 5

General Product Characteristics Data Sheet 7 Rev. 1.0, 2012-11-08

4 General Product Characteristics

4.1 Absolute Maximum Ratings

Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Table 1 Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground (unless otherwise specified) 1) Not subject to production test, specified by design. Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Input, Enable

4.1.1 Voltage VI, VEN -20 20 V –

4.1.2 Voltage

VADJ -7 7 V – Output

4.1.3 Voltage VQ -20 20 V –

4.1.4 Junction Temperature Tj -40 150 °C–

4.1.5 Storage Temperature Tstg -50 150 °C–

4.1.6 ESD Resistivity VESD -2 2 kV HBM 2)

2) ESD HBM Test according AEC-Q100-002 - JESD22-A114 (1.5 kOhm, 100 pF)

4.1.7 ESD Resistivity VESD -750 750 V CDM 3)

3) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101 or ESDA STM5.3.1

Data Sheet 8 Rev. 1.0, 2012-11-08 TLF1963 General Product Characteristics

4.2 Functional Range

Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table.

4.3 Thermal Resistance

Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 2 Functional Range Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. 4.2.1 Input voltage VI 2.5 20 V –

4.2.2 Output Capacitor’s Requirements

CQ 10 – µF – 1) 1) the minimum output capacitance requirement is appl icable for a worst case capacitance tolerance of 30% ESR(CQ) –3 Ω –2) 2) relevant ESR value at f = 10 kHz

4.2.3 Junction temperature Tj -40 150 °C

Table 3 Thermal Resistance Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.

4.3.1 Junction to Case 1)

1) Not subject to production test, specified by design. RthJC – 0.84 – K/W measured to heat slug

4.3.2 Junction to Ambient 1) RthJA –1 9 –K / W 2)

2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 4.3.3 – 64 – K/W footprint only 3) 3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70 µm Cu). 4.3.4 – 36 – K/W 300 mm² heatsink area3) 4.3.5 – 29 – K/W 600 mm² heatsink area3) 4.3.6 Junction to Case 1) RthJC – 0.78 – K/W measured to heat slug

4.3.7 Junction to Ambient 1) RthJA –2 4 –K / W 2)

4.3.8 – 95 – K/W footprint only 3) 4.3.9 – 50 – K/W 300 mm² heatsink area3) 4.3.10 – 38 – K/W 600 mm² heatsink area3)

Electrical Characteristics

Data Sheet 9 Rev. 1.0, 2012-11-08

5 Electrical Characteristics

5.1 Electrical Character istics Voltage Regulator

Table 4 Electrical Characteristics: VI = 2.5 V - 20 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing out of the pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. IQ = 1 mA; Tj = 25 °C 5.1.5 Line regulation 1) ΔVQ,line –1 . 0 3m V VI = 2.21 to 20 V; IQ = 1 mA 5.1.6 Load regulation 1) ΔVQ,load –2 8m V IQ = 1 mA to 1.5 A; VI = 2.5 V; Tj = 25 °C 5.1.7 – – 12 mV IQ = 1 mA to 1.5 A; VI = 2.5 V

5.1.8 Dropout voltage 2) 4) 5)

VI = VQ,nom Vdr –0 . 0 1 0 . 0 3 V IQ = 1 mA; Tj = 25 °C 5.1.9 – – 0.04 V IQ = 1 mA 5.1.10 – 0.03 0.05 V IQ = 100 mA; Tj = 25 °C 5.1.11 – – 0.09 V IQ = 100 mA 5.1.12 – 0.13 0.25 V IQ = 500 mA; Tj = 25 °C 5.1.13 – – 0.27 V IQ = 500 mA Tj = 25 °C 5.1.15 – – 0.55 V IQ = 1.5 A

5.1.16 GND Pin Current 4) 6)

VI = VQ,nom + 1 V Iq –1 . 0 1 . 5 m A IQ = 0 mA 5.1.17 – 1.1 1.7 mA IQ = 1 mA 5.1.18 – 3.8 5.0 mA IQ = 100 mA 5.1.19 – 15 22 mA IQ = 500 mA 5.1.20 – 80 130 mA IQ = 1.5 A 5.1.21 Output Voltage Noise VQ,noise –4 0 –µ VRMS CQ = 10 µF; IQ = 1.5 A; BW = 10 Hz to 100 kHz

5.1.22 ADJ Pin Bias Current 1) 7) IADJ –1 2µ A –

5.1.23 Enable Threshold VEN,LH –1 . 4 2V VQ = Off to On 5.1.24 VEN,HL 0.8 1.3 – V VQ = On to Off 5.1.25 EN Pin current 8) IEN –0 0 . 2 µ A VEN = 0 V 5.1.26 – 2.5 20 µA VEN ≤ 20 V

Data Sheet 10 Rev. 1.0, 2012-11-08

5.1.27 Quiescent Current in

Shutdown 9) Iq,off –0 . 0 1 1µ A VI = 6 V; VEN = 0 V; Tj ≤ 85 °C

5.1.28 Power Supply ripple rejection 10) PSRR 55 67 – dB Tj = 25 °C;

fr = 120 Hz; IQ = 0.75 A; VI - VQ = 1.5 V; Vr = 0.5 Vpp

5.1.29 Output current limitation IQ –2 –A Tj = 25 °C;

VI = 7 V; VQ = 0 V 5.1.30 IQ 1.6 – – A VI = VQ,nom + 1 V; dVQ = -0.1 V

5.1.31 Input Reverse Leakage Current II,rev –– 2m A VI = -20 V;

VQ = 0 V

5.1.32 Reverse Output Current 11) IQ,rev – 300 600 µA Tj = 25 °C;

VQ = 1.21 V; VI < 1.21 V 5.1.33 – – 1 mA VQ = 1.21 V; VI < 1.21 V 1) The TLF1963 is tested and specified for these c onditions with the ADJ pin connected to the Q pin. 2) For TLF1963 dropout voltage will be limited by the minimu m input voltage specification under some output voltage/load conditions. 3) Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. 4) To satisfy requirements for minimum input voltage, the TLF1963 is tested and specified for these conditions with an external resistor divider (two 4.12 kΩ resistors) for an output voltage of 2.4 V. The external resistor divider will add a 300 µA DC load on the output. 5) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to: VI – Vdr 6) GND pin current is tested with VI = VQ,nom + 1 V and a current source load. 7) ADJ pin bias current flows into the ADJ pin. 8) EN pin current flows into the EN pin. 9) Specified by design, tested at Tamb = 25 °C 10) Not subject to production test, specified by design. 11) Reverse output current is tested with the IN pin grounded and the Q pin forced to the rated output voltage. This current flows into the Q pin and out the GND pin Table 4 Electrical Characteristics: (cont’d) VI = 2.5 V - 20 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing out of the pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.

Data Sheet 11 Rev. 1.0, 2012-11-08

5.2 Typical Performance Characteristics

Dropout Voltage VDR versus Output Current IQ Guaranteed Dropout Voltage Vdr versus Output Current IQ Dropout Voltage Vdr versus Temperature Tj Quiescent Current Iq versus Temperature Tj 0 0.5 1 1.5 100 150 200 250 300 350 400 450 500 550 IQ [A] Vdr [mV] Tj = −40 °C Tj = 25 °C Tj = 125 °C Tj = 150 °C 0 0.5 1 1.5 100 150 200 250 300 350 400 450 500 550 IQ [A] Vdr [mV] Δ : Testpoint Tj = 25 °C Tj = 150 °C −50 0 50 100 150 100 150 200 250 300 350 400 450 500 550 Tj [°C] Vdr [mV] IQ = 100 mA IQ = 500 mA IQ = 1.5 A −50 0 50 100 150 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 Tj [°C] Iq [mA] VI = 6 V IQ = 0 mA . VEN = VI

Data Sheet 12 Rev. 1.0, 2012-11-08 Adjustable Voltage VADJ versus Temperature Tj Quiescent Current Iq versus Input Voltage VI (VQ,nom = 2.5 V) Quiescent Current Iq versus Input Voltage VI (VQ,nom = 1.21 V) GND Pin Current IGND versus Output Current IQ −50 0 50 100 150 1.19 1.195 1.2 1.205 1.21 1.215 1.22 Tj [°C] VADJ [V] IQ = 1 mA IQ = 100 mA IQ = 500 mA IQ = 1.5 A 0 2 4 6 8 10 VI [V] Iq [mA] VQ,nom = 2.5 V Tj = 25 °C IQ = 0 mA 0 2 4 6 8 100 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 VI [V] Iq [mA] VQ,nom = 1.21 V Tj = 25 °C IQ = 0 mA 0 0.5 1 1.5 100 120 IQ [A] IGND [mA] VI = VQ,nom + 1 V Tj = −40 °C Tj = 25 °C Tj = 125 °C Tj = 150 °C

Data Sheet 13 Rev. 1.0, 2012-11-08 GND Pin Current IGND versus Input Voltage VI (VQ,nom = 2.5 V) GND Pin Current IGND versus Input Voltage VI (VQ,nom = 1.21 V) GND Pin Current IGND versus Input Voltage VI (VQ,nom = 2.5 V) GND Pin Current IGND versus Input Voltage VI (VQ,nom = 1.21 V) 0 2 4 6 8 10 VI [V] IGND [mA] VQ,nom = 2.5 V Tj = 25 °C IQ = 1 mA IQ = 100 mA IQ = 500 mA 0 2 4 6 8 10 VI [V] IGND [mA] VQ,nom = 1.21 V Tj = 25 °C IQ = 1 mA IQ = 100 mA IQ = 500 mA 0 2 4 6 8 10 100 VI [V] IGND [mA] VQ,nom = 2.5 V Tj = 25 °C IQ = 1 mA IQ = 100 mA IQ = 500 mA IQ = 1.5 A 0 2 4 6 8 10 100 VI [V] IGND [mA] VQ,nom = 1.21 V Tj = 25 °C IQ = 1 mA IQ = 100 mA IQ = 500 mA IQ = 1.5 A

Data Sheet 14 Rev. 1.0, 2012-11-08 EN Pin Thresholds VEN,th versus Temperature Tj EN Pin Input Current IEN versus EN Pin Voltage VEN EN Pin Input Current IEN versus Temperature Tj Adjustable Pin Bias Current IADJ versus Temperature Tj −50 0 50 100 1500.8 1.2 1.4 1.6 1.8 Tj [°C] VEN,th [V] Threshold Off−to−On Threshold On−to−Off 0 5 10 15 20 0.5 1.5 2.5 3.5 VEN [V] IEN [µA] Tj = 25 °C VI = 20 V −50 0 50 100 150 0.5 1.5 2.5 3.5 4.5 Tj [°C] IEN [µA] VEN = 20 V . −50 0 50 100 1500 0.2 0.4 0.6 0.8 1.2 Tj [°C] IADJ [µA]

Data Sheet 15 Rev. 1.0, 2012-11-08 Current Limit IQ,max versus Input / Output Differential VIN - VQ Current Limit IQ,max versus Temperature Tj Reverse Output Current IQ,rev versus Output Voltage VQ Reverse Output Current IQ,rev versus Temperature Tj 0 5 10 15 20 0.5 1.5 2.5 VIN − VQ [V] IQ,max [A] ΔVQ = −100 mV . Tj = −40 °C Tj = 25 °C Tj = 125 °C Tj = 150 °C −50 0 50 100 150 0.5 1.5 2.5 3.5 Tj [°C] IQ,max [A] VI = 7 V VQ = 0 V . 0 2 4 6 8 10 0.5 1.5 2.5 3.5 4.5 VQ [V] IQ,rev [mA] VI = 0 V Tj = 25 °C . VQ.nom = 1.21 V VQ.nom = 2.5 V −50 0 50 100 150 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Tj [°C] IQ,rev [mA] VIN = 0 V VQ = 1.21 V .

Data Sheet 16 Rev. 1.0, 2012-11-08 Ripple Rejection PSRR versus Frequency f Ripple Rejection PSRR versus Temperature Tj Minimum Input Voltage VI,min versus Temperature Tj Load Regulation dVLoad versus Temperature Tj 10 100 1k 10k 100k 1M f [Hz] PSRR [dB] IL = 0.75 A VI = VQnom + 1 V Tj = 25 °C CQ = 10 µF Ceramic . −50 0 50 100 150 Tj [°C] PSRR [dB] IL = 0.75 A VI = VQ,nom + 1 V . fRipple = 120 Hz −50 0 50 100 150 0.5 1.5 2.5 Tj [°C] VI,min [V] IQ = 1 mA IQ = 500 mA IQ = 1.5 A −50 0 50 100 150 Tj [°C] dVLoad [mV] dILoad = 1 mA to 1.5 A . VI = 2.7 V VQ,nom = 1.21 V

Data Sheet 17 Rev. 1.0, 2012-11-08 Equivalent Series Resistance ESR(CQ) vs Load Current IQ Max ESR Min ESR 1m 10m 100m 1 IQ [A] ESR(CQ) [Ω] CQ = 10 µF .

Application Information

Data Sheet 18 Rev. 1.0, 2012-11-08

6 Application Information

Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The TLF1963 is an 1.5 A low dropout regulator optimized for fast transient response. The device is capable of supplying 1.5 A at a very low dropout voltage up to a Junction Temperature of 150 °C. The low operating quiescent current of 1 mA drops to less than 1 µA in case the device is disabled. In addition to the low quiescent current, the TLF1963 incorporates several protection features which make them ideal for use in battery-powered systems. The device is protected against both reverse input and reverse output voltages. Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Figure 4 Application Diagram

6.1 Adjustable Operation

The TLF1963 has an output voltage range of 1.21 V to VI - Vdr < 20 V. The output voltage is set by the ratio of two external resistors as shown in Figure 4. The device serves the output to maintain the voltage at the ADJ pin at 1.21 V referenced to ground. The current in R1 is then equal to 1.21 V / R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 1 µA at 25 °C, flows through R2 into the ADJ pin. The output voltage can be calculated using the formula in Equation (1). (1) VADJ = 1.21 V typical IADJ = 1 µA at 25 °C The value of R1 is recommended to be smaller than 12 kΩ to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown the output is turned off and the divider current will be zero. The adjustable device is mainly tested and specified with the ADJ pin connected to the Q pin for an output voltage of 1.21 V. Specifications for output voltages adjusted to greater values than 1.21V will be proportional to the ratio of the desired output voltage to 1.21 V. For example, load regulation for an output current change of 1 mA to 1.5 A is ΔVQ,load = 2 mV typical at VQ,nom = 1.21 V. At VQ,nom = 5 V, load regulation is: ΔVQ,load,5V = (5 V / 1.21 V)•(2 mV) = 8.3 mV TLF1963 GND 2VBat 4Q 10µF VQ EN ADJ I 10µF VQ VADJ 1 R2 ⎛⎞⋅ IADJ R2⋅+=

Data Sheet 19 Rev. 1.0, 2012-11-08 TLF1963

6.2 Output Capacitance and Transient Response

The TLF1963 is designed to be stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 10 µF with an ESR in the range of 10 mΩ to 3 Ω is recommended to prev ent oscillations. Larger values of ou tput capacitance can decrease the peak deviations and provide improved transient response for larger load current changes.

6.3 Overload Recovery

The TLF1963 has a safe operating area protection. The devi ce protects itself by limit ing the output current to a maximum and prevent it self against destruction due to ov erload or short circuits conditions. In this cases the current is limited and the resulting output voltage decrease s according to the load down to 0V in a short circuit condition. The TLF1963 can supply the application for all input voltag es between 2.5 V up to 20V with currents up to 1.5 A. Of course it needs to be ensured, that the junction temperature stays within the operating range up to 150 °C. For startup conditions with a high load current the TLF1963 is able to start up properly without exeeding the safe operating area. Even imediatly after removal of a short circui t failure case the device is able to start if the load current is very high. The characteristic of the current lim itation can by seen in the typical perfomance graphs on Page 15.

6.4 Output Voltage Noise

The TLF1963 has been designed to provide low output voltage noise over the 10 Hz to 100 kHz bandwidth while operating at full load. Output voltage noise is typically 40 µVRMS over this frequency bandwidth. For higher output voltages (generated by using a resistor divider), the output voltage noise will be gained up accordingly. Higher values of output voltage noise may be measured w hen care is not exercised with regards to circuit layout and testing. Crosstalk from nearby traces can induce unwanted noise onto the output of the TLF1963. Power supply ripple rejection must also be considered, becau se the TLF1963 does not have unlimited power supply ripple rejection and will pass a small portion of the input noise through to the output.

6.5 Protection Features

The TLF1963 has several protection features which makes him ideal for use in battery-powered circuits. In addition to the normal protection features as sociated with monolithic regulators, su ch as current limiting and thermal limiting, the device is protected against reverse input voltages and reverse output voltages. Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation, the junction temperature should not exceed 150 °C. The input of the device will withstand reverse voltages of 20 V. Current flow out of the device will be limited to less than 2 mA in case of an input voltage of -20 V at the Input and no negative voltage will appear at the output. The device will protect both itself and the load. This provides protection against batteries that can be plugged in backward. The output of the TLF1963 can be pulled below ground without damaging the device. If the input is left open circuit or grounded, the output ca n be pulled below ground by 20 V. The out put will act like an open circuit, no current will flow out of the pin. If the input is powered by a voltage source, the outpu t will source the short-circuit current of the device and will prot ect itself by thermal limiting. In this case, grounding the EN pin will turn off the device and stop the output from sourcing the short-circuit current. The ADJ pin of the adjustable device can be pulled above or below ground by as much as 7 V without damaging the device. If the input is left open circuit or grounded, the ADJ pin will act like an open circuit when pulled below ground and like a resistor (typically 4 kΩ) in series with a diode when pulled above ground. In situations where the ADJ pin is connected to a resistor divider that would pull the ADJ pin above its 7 V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5 mA. For example, a resistor divider is used to provide a regulated 1.5V output from the 1.21 V reference when the output is forced to

Data Sheet 20 Rev. 1.0, 2012-11-08 20 V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5 mA when the ADJ pin is at 7 V. The 13 V difference betw een Q and ADJ pins divided by the 5 mA maximum current into the ADJ pin yields a minimum top resistor value of 2.6 kΩ.

6.6 Further Application Information

• For further information you may contact http://www.infineon.com/

Data Sheet 21 Rev. 1.0, 2012-11-08 TLF1963 Package Outlines

7 Package Outlines

Figure 5 PG-TO263-5 SMD Package BA0.25 M ±0.2 GPT09113 8.5 1) (15) ±0.29.25 ±0.31 0...0.15 5 x 0.8 ±0.1 ±0.11.27 4.4 B 0.5 ±0.1 ±0.32.7 4.7 ±0.5 2.4 1.7 0...0.3 A 1)7.55 4 x All metal surfaces tin plated, except area of cut. Metal surface min. X = 7.25, Y = 6.9 Typical1) 0.1 B 0.1 0.05 8˚ MAX.

Data Sheet 22 Rev. 1.0, 2012-11-08 Figure 6 PG-TO252-5 SMD Package Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Gree n products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). -0.05 +0.156.5 -0.10 +0.05 2.3 -0.04 +0.08 0.5 -0.01 +0.20 0.9 (5) -0.26.22 A -0.04 +0.080.5 1.14 4.56 A0.25 M B 0.8±0.15 5 x 0.6±0.1 1±0.1 9.98±0.5 B All metal surfaces tin plated, except area of cut. 1) Includes mold flashes on each side. 5.7 MAX. 0.1 B 0.15 MAX. per side 0.51 MIN. 0...0.15 (4.24) PG-TO252-5-13-PO V0.1 For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Dimensions in mm

Data Sheet 23 Rev. 1.0, 2012-11-08 TLF1963

Revision History

8 Revision History

1.0 2012-11-08 Initial Ve rsion of Data Sheet

81726 Munich, Germany

© 2012 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.