TLE6252G

TLE6252G SIEMENS | Alldatasheet

Document overview

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Technical content

Features

• Data transmission rate up to 125 kBaud
• Very low current consumption in stand-by and sleep mode
• Optimized EMI behavior due to limited and symmetric dynamic slopes of CANL and CANH signals
• Switches to single-wire mode during bus line failure events
• Supports one-wire transmission mode with ground offset voltages up to 1.5 V
• Preventation from bus occupation in case of CAN controller failure
• Fully-integrated receiver filters
• Short-circuit detection to battery and ground in 12 V powered systems
• Thermal protection
• Bus line error protection against transients in automotive environment ▼ New type Functional Description The CAN Transceiver works as the interface between the CAN protocol controller and the physical differential CAN bus. Figure 1 shows the principle configuration of a CAN network. The TLE 6252 is optimized for low-speed data transmission (up to 125 kBaud) in automotive and industrial applications. In normal operation mode a differential signal is transmitted/received. When bus wiring failures are detected the device automatically switches in single-wire mode to maintain communication. While no data is transferred, the power consumption can be minimized by multiple low power modes. Type Ordering Code Package ▼ TLE 6252 G Q67006-A9337 P-DSO-14-2 (SMD)

Semiconductor Group 2 1998-11-01 TLE 6252 G Figure 1 CAN Network Example Controller 1 RxD TxD Transceiver 1 Local Area 1 Transceiver 2 Local Area 2 Controller 2 Bus Line AES02410 TxD 2RxD 2

Semiconductor Group 3 1998-11-01 Pin Configuration (top view) Figure 2 11 4 AEP02411 TxD INH WAKE ENT NSTB NERR RxD RTL CANL CANH GND BATV CCV RTH P-DSO-14-2

Semiconductor Group 4 1998-11-01 Table 1 Pin Definitions and Functions Pin No. Symbol Function 1I N H Inhibit output; For controlling an external 5 V regulator 2T x D Transmit data input; LOW: bus is dominant, HIGH: bus is recessive 3R x D Receive data output; LOW: bus is dominant

4 NERR Error flag output;

LOW: bus error

5 NSTB Not stand-by input;

Digital control signal for low power modes 6E N T Enable transfer input; Digital control signal for low power modes

7 WAKE Wake-up input;

If level of VWAKE changes the device initials a wake-up from sleep mode by switching INH HIGH 8R T H Termination resistor output; For CANH line, controlled by internal failure management 9R T L Termination resistor output; For CANL line, controlled by internal failure and mode management

10 VCC Supply voltage;

+5 V

11 CANH Bus line H;

HIGH: dominant state, external pull-down for termination

12 CANL Bus line L;

LOW: dominant state, external pull-up for termination

13 GND Ground

14 VBAT Battery voltage;

+ 12 V

Semiconductor Group 5 1998-11-01 Functional Block Diagram Figure 3 Block Diagram RTL CANH CANL RTH NSTB ENT L Termination Driver Temperature Protection H Termination Receiver Failure Detect Wake - Up Time - Out Stand - By Sleep Wake - Up Failure Management Output Stage TxD RxD NERR INH WAKE GND Filter V V BATCC AEB02412 10 14 Contol Unit

Semiconductor Group 6 1998-11-01 General Operation Modes In addition to the normal operation mode, the CAN transceiver offers three multiple low power operation modes to save power when there is no bus achieved: sleep mode, VBat stand-by mode and VCC stand-by mode (see Table 2 and Figure 4). Via the control inputs NSTB and ENT the operation modes are selected by the CAN controller. In sleep operation mode the lowest power consumption is achieved. To deactivate the external voltage regulator for 5 V supply, the INH output is switched to high impedance in this mode. Also CANL is pulled-up to the battery voltage via the RTL output and the pull-up paths at input pins TxD and RxD are disabled from the internal supply. On a wake-up request either by bus line activities or by the input WAKE, the transceiver automatically switches on the voltage regulator (5 V supply). The WAKE input reacts to rising and falling edges. As soon as VCC is provided, the wake-up request can be read on both the NERR and RxD outputs, upon which the microcontroller can activate the normal operation mode by setting the control inputs NSTB and ENT high. In VCC -stand-by mode the wake up request is only reported at the RxD-output. The NERR output in this mode is set low when the supply voltage at pin Vbat was below the battery voltage threshold of 1 V. When entering the normal mode the Vbat-Flag is reseted and the NERR becomes high again. In addition the Vbat-Flag is set at a first connection of the device to battery voltage. This feature is usefull e.g. when changing the ECU and therefore a presetting routine of the microcontroller has to be started. If either of the supply voltage drop below the specified limits, the transceiver automatically goes to a stand-by mode.

Semiconductor Group 7 1998-11-01 Table 2 Truth Table of the CAN Transceiver NSTB ENT Mode INH NERR RxD RTL

00 VBAT stand-by 1) Vbat active LOW wake-up interrupt if

0 0 sleep mode 2) floating switched to VBAT 0 1 go to sleep command floating switched to VBAT

10 VCC stand-by 3) Vbat active LOW

1 1 normal mode Vbat active LOW error flag HIGH = receive; LOW = dominant receive data switched to VCC 1) Wake-up interrupts are released when entering normal operation mode. 2) If go to sleep command was used before. ENT may turn LOW as VCC drops, without affecting internal functions. 3) VBAT power-on flag will be reseted when entering normal operation mode.

Semiconductor Group 8 1998-11-01 Figure 4 State Diagram The transceiver will stay in a present operating mode until a suitable condition disposes a state change. If not otherwise defined all conditions are AND-combined. The signals VCC and VBAT show if the supply is available (e.g. VCC = 1 : VCC voltage is present). If at minimum one supply voltage is switched on, the start-up procedure begins (not figured). After a delay time the device changes to normal operating or stand-by mode. Normal Operation NSTB NSTB ENT =1V CC V CC ENT 1CCV = ENT = NSTB = 0 V NSTB =CC 0 or (NSTB = 0 ENT = 0) =V CC 0 or NSTB = 1 1V =CC =ENT 1 ENT V CC = =ENT NSTB 1=ENT t > th (Wake-Up from bus or via WAKE pin) BATV tt> WO AED02413 ENT INH HIGH11 NSTB INH HIGH ENT

00 HIGH1

0 float.1 ENT Go to Sleep NSTB INH INH float. NSTB Sleep Mode ENT 0 0 BATV Stand-ByStand-ByCCV ENT CCV = NSTB = NSTB V CC 1= CC NSTB ENT V =1 CC NSTB V = =0ENT h<tt

Semiconductor Group 9 1998-11-01 Bus Failure Management The TLE 6252 detects the bus failures as described in the following (Table 3, failures listed according to ISO 11519-2) and automatically switches to a dedicated CANH or CANL single wire mode to maintain data transmission if necessary. Therefore, it is equipped with one differential receiver and 4 single ended comparators, two for each bus line. To avoid false triggering by external RF influences the single wire modes are activated after a certain delay time. As soon as the bus failure disappears the transceiver switches back to differential mode after another time delay. Bus failures are indicated in the normal operation mode by setting the NERR output to LOW. To reduce EMI the dynamic slopes of the CANL and CANH signals are both limited and symmetric. This allows the use of an unshielded twisted or parallel pair of wires for the bus. During single-wire transmission the EMI performance of the system is degraded from the differential mode. The differential receiver threshold is set to – 2.8 V. This ensures correct reception in the normal operation mode as well as in the failure cases 1, 2 and 4 with a noise margin as high as possible. For these failures, further failure management is not necessary. Detection of the failure cases 1, 2 and 4 is only possible when the bus is dominant. Nevertheless, they are reported on the NERR output until transmission of the next CAN word on the bus begins. When one of the bus failures 3, 5, 6, 6a and 7 is detected, the defective bus wire is disabled by switching off the affected bus termination and the respective output stage. A wake-up from sleep mode via the bus is possible either via a dominant CANH or CANL line. This ensures that a wake-up is possible even if one of the failures 1 to 7 occurs. In case the transmission data input, TxD from the CAN controller is permanently dominant, both, the CANH and CANL transmitting stage, are deactivated after a delay time. This is necessary to prevent blocking the bus by a defective protocol unit. The transmit time out error is flagged on NERR.

Semiconductor Group 10 1998-11-01 Table 3 Specified Wiring Failure Cases on the Bus Line 1) (according to ISO 11519-2) CANH CANL Wire Interrupted Wire Short-Circuited to GND CANL CANH GND CCV AES02414 Failure case 2: TxD 1 RxD 2 CANL CANH GND CCV AES02415 Failure case 1: TxD 1 RxD 2 CANL CANH GND CCV AES02416 Failure case 4: GND TxD 1 RxD 2 CANL CANH GND CCV AES02417 Failure case 5: GND TxD 1 RxD 2

Semiconductor Group 11 1998-11-01 Wire Short-Circuited to Battery CANL Mutually Short-Circuited to CANH 1) The images represent a communication between two participants of the network (see Figure 1). The controller of the local area 1 transmits data (T×D 1) to the receiver of the local area 2 (R×D 2). When a single failure of cases 1 to 7 occurs, the error handling enables communication through appreciated reactions. Table 3 Specified Wiring Failure Cases on the Bus Line (cont’d) 1) (according to ISO 11519-2) CANH CANL CANL CANH GND V BAT CCV AES02418 Failure case 6: Failure case 6a: > 7.2 V 1.8 V < < 7.2 V (no ISO failure) V CANH CANHV TxD 1 RxD 2 CANL CANH GND V BAT CCV AES02419 Failure case 3: Failure case 3a: > 7.2 V 1.8 V < < 7.2 V (no ISO failure) V CANL CANLV TxD 1 RxD 2 CANL CANH GND CCV AES02420 Failure case 7: TxD 1 RxD 2

Semiconductor Group 12 1998-11-01 Circuit Protection A current limiting circuit protects the CAN transceiver output stages from damage by short-circuit to positive and negative battery voltages. The CANH and CANL pins are protected against electrical transients which may occur in the severe conditions of automotive environments. The transmitter output stage generates the majority of the power dissipation. Therefore it is disabled if the junction temperature exceeds the maximum value. This effectively reduces power dissipation, and hence will lead to a lower chip temperature, while other parts of the IC can remain operating. Note: Maximum ratings are absolute ratings; exceeding one of these values may cause irreversible damage to the integrated circuit. Absolute Maximum Ratings Parameter Symbol Limit Values Unit Notes min. max. Input voltage at VBAT VBAT – 0.3 40 V – Logic supply voltage VCC VCC – 0.3 6 V – Input voltage at TxD, RxD, NERR, NSTD and ENT VIN – 0.3 VCC + 0.3 V – Input voltage at CANH and CANL VBUS – 10 27 V – Input voltage at CANH and CANL VBUS – 40 40 V 1) 1) VCC = 0 to 5.5 V; VBAT > 0 V; t < 0.1 ms; load dump Transient voltage at CANH and CANLVBUS – 150 100 V 2) 2) See ISO 7637 Input voltage at WAKE VIN – VBAT + 0.3 V – Input current at WAKE IIN – 15 – mA 3) 3) Negative currents flowing out of the IC. Input voltage at INH, RTH and RTLVIN – 0.3 VBAT + 0.3 V – Termination resistances at RTL and RTH RRTL/H 500 16000 Ω – Junction temperature Tj – 40 150 °C– Storage temperature Tstg – 55 155 °C– Electrostatic discharge voltage at any pin Vesd – 4000 4000 V 4) 4) Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor.

Semiconductor Group 13 1998-11-01 Operating Range Parameter Symbol Limit Values Unit Notes min. max. Logic input voltage VCC 4.75 5.25 V – Battery input voltage V BAT 62 7 V – Junction temperature Tj – 40 150 °C– Thermal Resistance Junction ambient Rthja –1 2 0 K / W –

Semiconductor Group 14 1998-11-01 Static Characteristics 4.75 V≤ VCC ≤ 5.25 V; VNSTB = VCC ; 6 V≤ VBAT ≤ 27 V; – 40≤ Tj≤ +1 2 5°C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max. Supplies V CC , V BAT Supply current ICC – 3.5 10 mA recessive; TxD = VCC ; normal operating mode – 6 20 mA dominant; TxD = 0 V; no load; normal operating mode Supply current VCC stand-by) ICC + IBAT – 120 500 µA VCC = 5 V; VBAT = 12 V; TA < 90 °CSupply current (VBAT stand-by) IBAT + ICC –5 5 1 0 0 µA Supply current (sleep operation mode) IBAT –1 5 3 0 µA VCC = 0 V; VBAT = 12 V; TA < 90 °C Battery voltage for setting power-on flag VBAT ––1 . 0 V VCC stand-by mode Battery voltage low time for setting power-on flag tpw(on) –2 0 0 – µs VCC stand-by mode Receiver Output R×D and Error Detection Output NERR HIGH level output voltage (pin NERR) VOH VCC – 0.9 – VCC V I0 = – 100 µA HIGH level output voltage (pin RxD) VOH VCC – 0.9 – VCC V I0 = – 250 µA LOW level output voltageVOL 0–0 . 9 V I0 = – 1.25 mA

Semiconductor Group 15 1998-11-01 Transmission Input T×D, Not Stand-By NSTB and Enable Transfer ENT HIGH level input voltage threshold VIH 0.7 × VCC – VCC + 0.3 V 500 mV hysteresis LOW level input voltage threshold VIL – 0.3 – 0.3 × VCC V 500 mV hysteresis HIGH level input current (pins NSTB and ENT) IIH –92 0 µA Vi = 4 V LOW level input current (pins NSTB and ENT) IIL 01– µA Vi = 1 V HIGH level input current (pin TxD) IIH – 200 – 50 – 25 µA Vi = 4 V LOW level input current (pin TxD) IIL – 800 – 200 – 100 µA Vi = 1 V Forced battery voltage stand-by mode (fail safe) VCC 2.75 – 4.5 V – Minimum hold time for Go-To-Sleep command thSLP 42 2 3 8 µs– Wake-up Input WAKE Input current IIL –3 –2 –1 µA– Wake-up threshold voltage VWK(th) 2 . 03 . 04 . 0V VNSTB = 0 V Static Characteristics (cont’d) 4.75 V≤ VCC ≤ 5.25 V; VNSTB = VCC ; 6 V≤ VBAT ≤ 27 V; – 40≤ Tj≤ + 125°C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 16 1998-11-01 Inhibit Output INH HIGH level voltage drop ΔVH = VBAT – VINH ΔVH –0 . 5 0 . 8 V IINH = – 0.18 mA; Leakage current ILI – 5 – 5.0 µA sleep operation mode; VINH = 0 V Bus Lines CANL, CANH Differential receiver recessive-to-dominant threshold voltage VdRxD(rd) –2 . 8 –2 . 5 –2 . 2 V VCC =5 . 0V Differential receiver dominant-to-recessive threshold voltage VdRxD(dr) – 3 . 1 7– 2 . 8 7– 2 . 5 8VVCC =5 . 0V CANH recessive output voltage VCANHr 0 . 10 . 20 . 3VT x D = VCC ; RRTH < 4 kΩ CANL recessive output voltage VCANLr VCC – 0.2 ––V T x D = VCC ; RRTL < 4 kΩ CANH dominant output voltage VCANHd VCC – 1.4 – VCC VT x D = 0 V ; normal mode; ICANH = – 40 mA CANL dominant output voltage VCANLd –1 . 1 1 . 4 V T x D = 0 V ; normal mode; ICAN L = 40 mA CANH output current ICANH – 130 – 90 – 50 mA VCANH = 0 V; TxD = 0 V –0– µA sleep operation mode; VCANH = 12 V Static Characteristics (cont’d) 4.75 V≤ VCC ≤ 5.25 V; VNSTB = VCC ; 6 V≤ VBAT ≤ 27 V; – 40≤ Tj≤ +1 2 5°C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 17 1998-11-01 CANL output current ICANL – 50 90 130 mA VCANL = 5 V; TxD = 0 V –0– µA sleep operation mode; VCANL = 0 V; VBAT = 12 V Voltage detection threshold for short-circuit to battery voltage on CANH and CANL Vdet(th) 6.5 7.3 8.0 V normal operation mode Voltage detection threshold for short-circuit to battery voltage on CANH Vdet(th) VBAT – 2.5 VBAT VBAT V stand-by/ sleep operation mode CANH wake-up voltage threshold VWAKEH 1 . 21 . 92 . 7V– CANL wake-up voltage threshold VWAKEL 2 . 43 . 13 . 8V– Wake-up voltage threshold difference ΔVWAKE 0 . 2 ––V ΔVSLP = VSLPL – VSLPH CANH single-ended receiver threshold VCANH 1.5 1.9 2.3 V failure cases 3, 5 and 7 CANL single-ended receiver threshold VCANL 2.8 3.1 3.8 V failure case 6 and CANH leakage current ICANHl –05 µA VCC =0V , Vbat =0V , VCANL =1 3 . 5V , RRTL = 100Ω, Tj<8 5°C Static Characteristics (cont’d) 4.75 V≤ VCC ≤ 5.25 V; VNSTB = VCC ; 6 V≤ VBAT ≤ 27 V; – 40≤ Tj≤ + 125°C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 18 1998-11-01 CANL leakage current ICANLl –05 µA VCC = 0 V, Vbat= 0 V, VCANH = 5 V, RRTH =1 0 0Ω, Tj<8 5°C Termination Outputs RTL, RTH RTL to VCC switch-on resistance RRTL –4 3 9 5 Ω Io =–1 0 m A ; normal operating mode RTL output voltage VoRTL VCC – 1.0 VCC – 0.7 –V | Io| < 1 mA; VCC stand-by mode RTL to BAT switch series resistance RoRTL 10 16 35 k Ω VBAT stand-by or sleep operation mode RTH to ground switch-on resistance RRTH –4 3 9 5 Ω Io = 10 mA; normal operating mode RTH output voltage VoRTH –0 . 7 1 . 0 V Io = 1 mA; low power mode RTH pull-down currentIRTHpd –7 5 – µA normal operating mode, failure cases 6 and 6a RTL pull-up current IRTLpu –– 7 5 – µA normal operating mode, failure cases 3, 3a, 5 and 7 RTH leakage current IRTHl –05 µA VCC = 0 V, Vbat= 0 V, VCANH = 5 V, RRTH =1 0 0Ω, Tj<8 5°C Static Characteristics (cont’d) 4.75 V≤ VCC ≤ 5.25 V; VNSTB = VCC ; 6 V≤ VBAT ≤ 27 V; – 40≤ Tj≤ +1 2 5°C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 19 1998-11-01 RTL leakage current IRTLl –05 µA VCC =0V , Vbat =0V , VCANL =1 3 . 5V , RRTL = 100Ω, Tj<8 5°C Thermal Shutdown Shutdown junction temperature TjSH 150 – – oC– Static Characteristics (cont’d) 4.75 V≤ VCC ≤ 5.25 V; VNSTB = VCC ; 6 V≤ VBAT ≤ 27 V; – 40≤ Tj≤ + 125°C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 20 1998-11-01 Dynamic Characteristics VCC = 4.75 V to 5.25 V; VNSTB = VCC ; VBAT = 6 V to 27 V; TA = – 40 to + 125 oC (unless otherwise specified). All voltages are defined with respect to ground. Positive current flows into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max. CANH and CANL bus output transition time recessive-to-dominant trd 0.6 1.4 2.0 µs 10% to 90%; C 1 = 10 nF; C 2 = 0; R1 = 100 Ω CANH and CANL bus output transition time dominant-to-recessive tdr 0.7 1.0 1.3 µs 10% to 90%; C 1 = 1 nF; C 2 = 0; R1 = 100 Ω Minimum dominant time for wake-up on CANL or CANH twu(min) 82 2 3 8 µs stand-by modes VBAT = 12 V Minimum WAKE Low time for wake-up tWK(min) 20 36 60 µs Low power modes VBAT = 12 V Failure cases 3 and 6 detection time tfail 30 55 80 µs normal operating mode Failure case 6a detection time 2 4.8 8 ms normal operating mode Failure cases 5, 6, 6a and 7 recovery time 30 55 80 µs normal operating mode Failure cases 3 recovery time 150 450 750 µs normal operating mode Failure cases 5 and 7 detection time 0.75 1.8 4.0 ms normal operating mode Failure cases 5, 6, 6a and 7 detection time 0.8 3.6 8.0 ms stand-by modes; VBAT = 12 V Failure cases 5, 6, 6a and 7 recovery time –2– µs stand-by modes; VBAT = 12 V

Semiconductor Group 21 1998-11-01 Propagation delay TxD-to-RxD LOW (recessive to dominant) tPD(L) –0 . 8 1 . 5 µs C 1 = 100 pF; C 2 = 0; R1 = 100 Ω ; no failures and bus failure cases 1, 2, 3a and 4 –0 . 8 1 . 5 µs C 1 = C 2 = 3.3 nF; R1 = 100 Ω; no bus failure and failure cases 1, 2, 3a and –1 . 2 1 . 8 µs C 1 100 pF; C 2 = 0; R1 = 100 Ω ; bus failure cases 3, 5, 6, 6a and 7 –1 . 2 1 . 8 µs C 1 = C 2 = 3.3 nF; R1 =100 Ω ; bus failure cases 3, 5, 6, 6a and 7 Dynamic Characteristics (cont’d) VCC = 4.75 V to 5.25 V; VNSTB = VCC ; VBAT = 6 V to 27 V; TA = – 40 to + 125 oC (unless otherwise specified). All voltages are defined with respect to ground. Positive current flows into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 22 1998-11-01 Propagation delay TxD-to-RxD HIGH (dominanat to recessive) tPD(H) –1 . 5 2 . 0 µs C 1 = 100 pF; C 2 = 0; R1 =100 Ω ; no failures and bus failure cases 1, 2, 3a and 4 –2 . 5 3 . 0 µs C 1 = C 2 = 3.3 nF; R1 = 100 Ω ; no bus failure and failure cases 1, 2, 3a and –1 . 0 1 . 5 µs C 1 100 pF; C 2 = 0; R1 = 100 Ω ; bus failure cases 3, 5, 6, 6a and 7 –1 . 4 2 . 1 µs C 1 = C 2 = 3.3 nF; R1 = 100 Ω ; bus failure cases 3, 5, 6, 6a and 7 Minimum hold time to go sleep command th(min) 42 2 3 8 µs– Edge-count difference (falling edge) between CANH and CANL for failure cases 1, 2, 3a and 4 detection NERR becomes LOW n e –4–– n o r m a l operating mode Edge-count difference (rising edge) between CANH and CANL for failure cases 1, 2, 3a and 4 recovery –2–– TxD permanent dominant disable time tTxD 1 2.5 4 ms normal mode Dynamic Characteristics (cont’d) VCC = 4.75 V to 5.25 V; VNSTB = VCC ; VBAT = 6 V to 27 V; TA = – 40 to + 125 oC (unless otherwise specified). All voltages are defined with respect to ground. Positive current flows into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max.

Semiconductor Group 24 1998-11-01 Figure 6 Application of the TLE 6252 G TLE 6252 CAN Transceiver Microcontroller with On - Chip CAN Module C 505C / C 515C / C 164CJ TLE 4271 / TLE 4276 Low Drop Voltage Regulator +5 V 7 6 5 4 3 2 1 WAKE ENT NSTB NERR RxD TxD INH RTH RTL CANH CANL GND CAN Bus Line 22 F 8 9 10 11 12 13 14 V VCC BAT V BAT RTH RTL AES02422 R R µ 100 nF 100 nF

Semiconductor Group 25 1998-11-01 Package Outlines 1.27 1.45-0.2 8.75-0.2 14 8 1.75 max 0.2 6 ±0.2 0.35 x 45˚ -0.24 0.1 -0.1 0.4+0.8 Index Marking +0.150.35 2) 2) Does not include dambar protrusion of 0.05 max. per side 1) Does not include plastic or metal protrusion of 0.15 max. per side 0.2 14x 0.19 +0.06 8˚ max. GPS05093 P-DSO-14-2 (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mmSMD = Surface Mounted Device