TLE4267

TLE4267_12 INFINEON | Alldatasheet

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5-V Low Drop Voltage Regulator TLE 4267 Data Sheet 2 Rev. 2.51, 2012-01-20 Type Package Type Package TLE 4267 PG-TO220-7-11 TLE 4267 S PG-TO220-7-12 TLE 4267 G PG-TO263-7-1 TLE 4267 GM PG-DSO-14-30 P-TO220-7-3 P-TO 220-7-180 (TO-220 AB/7, Option E3180) P-TO220-7-230

Features

• Output voltage tolerance ≤ ±2%  400 mA output current capability  Low-drop voltage  Very low standby current consumption  Input voltage up to 40 V  Overvoltage protection up to 60 V ( ≤ 400 ms)  Reset function down to 1 V output voltage  ESD protection up to 2000 V  Adjustable reset time  On/off logic  Overtemperature protection  Reverse polarity protection  Short-circuit proof  Wide temperature range  Suitable for use in automotive electronics  Green Product (RoHS compliant)  AEC Qualified Functional Description TLE 4267 is a 5-V low drop voltage regulator for automotive applications in the PG-TO220-7 or PG-DSO-14-30 package. It supplies an output current of > 400 mA. The IC is shortcircuit-proof and has an overtemperature protection circuit.

Data Sheet 3 Rev. 2.51, 2012-01-20 Application The IC regulates an input voltage VI in the range of 5.5 V < VI < 40 V to a nominal output voltage of VQ = 5.0 V. A reset signal is generated for an output voltage of VQ < VRT (typ. 4.5 V). The reset delay can be set with an ex ternal capacitor. The device has two logic Depending on the voltage on pin E6 the IC may be hold in active-state even if VE2 goes to low level. This makes it simple to implement a self-holding circuit without external components. When the device is turned off, the output voltage drops to 0 V and current consumption tends towards 0 μA. Design Notes for External Components The input capacitor CI is necessary for compensation of line influences. The resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 Ω in series with CI. The output capacitor is necessary for the stability of the regulating circuit. Stability is guaranteed at values of ≥ 22 μF and an ESR of ≤ 3 Ω within the operating temperature range. Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturating of the power element. The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or equal VUD. The delay capacitance CD is charged with the current ID for output voltages greater than the reset threshold VRT. If the output voltage gets lower than VRT a fast discharge of the delay capacitor CD sets in and as soon as VCD gets lower than VLD the reset output RO is set to low-level (see Figure 6). The reset delay can be set within wide range by dimensioning the capacitance of the external capacitor.

Data Sheet 4 Rev. 2.51, 2012-01-20 TLE 4267 Inhibit: E2 Enable function, active High Hold: E6 Hold and release function, active Low Table 1 Truth Table for Turn-ON/Turn-OFF Logic E2, Inhibit E6, Hold VQ Remarks L X OFF Initial state, Inhibit internally pulled-up H X ON Regulator switched on via Inhibit, by ignition for example H L ON Hold clamped active to ground by controller while Inhibit is still high X L ON Previous state remains, even ignition is shut off: self-holding state L L ON Ignition shut off while regul ator is in self-holding state L H OFF Regulator shut down by releasing of Hold while Inhibit remains Low, final state. No active clamping required by external self- holding circuit (μC) to keep regulator in off-state.

Data Sheet 5 Rev. 2.51, 2012-01-20 Figure 1 Pin Configuration (top view) Table 2 Pin Definitions and Functions Pin Symbol Function 1I Input; block to ground directly at the IC by a ceramic capacitor 2E 2 Inhibit; device is turned on by High signal on this pin; internal pull-down resistor of 100 kΩ 3R O Reset Output; open-collector output internally connected to the output via a resistor of 30 kΩ 4G N D Ground; connected to rear of chip 5D Reset Delay; connect via capacitor to GND 6E 6 Hold; see Table 1 for function; this input is connected to output voltage via a pull-up resistor of 50 kΩ 7Q 5-V Output; block to GND with 22-μF capacitor, ESR < 3 Ω AEP02123 Ι RO GND D Q 43215 6 7 E6AEP01481 Ι RO GND D Q 43215 6 7 PG-TO220-7-11 PG-TO220-7-12 7651234 AEP01724 QD GND RO Ι PG-TO263-7-1

Data Sheet 6 Rev. 2.51, 2012-01-20 TLE 4267 Figure 2 Pin Configuration (top view) Table 3 Pin Definitions and Functions Pin Symbol Function 1I Input; block to ground directly at the IC by a ceramic capacitor 2E 2 Inhibit; device is turned on by High signal on this pin; internal pull-down resistor of 100 kΩ 7R O Reset Output; open-collector output internally connected to the output via a resistor of 30 kΩ 3, 4, 5, 10, 11, 12 GND Ground; connected to rear of chip 8D Reset Delay; connect with capacitor to GND for setting delay 9E 6 Hold; see Table 1 for function; this input is connected to output voltage via a pull-up resistor of 50 kΩ

13 Q 5-V Output; block to GND with 22-μF capacitor, ESR ≤ 3 Ω

6, 14 N.C. Not Connected PG-DSO-14-30 AEP02710 GND N.C. N.C. RO GND Q GND GND GND GND Ι

Data Sheet 7 Rev. 2.51, 2012-01-20 Figure 3 Block Diagram BLOCKDIAGRAM Temperature Sensor Saturation Control and Protection Circuit Adjustment Bandgap Reference Turn-ON/Turn-OFF Logic Reset Generator Input I E6E2 RO D Q Inhibit Hold Reset Output Reset Delay Output Control Amplifier Buffer Ground GND

Data Sheet 8 Rev. 2.51, 2012-01-20 TLE 4267 Table 4 Absolute Maximum Ratings TJ = -40 to 150 °C Parameter Symbol Limit Values Unit Notes Min. Max. Input Voltage VI -42 42 V – Voltage VI –6 0 V t ≤ 400 ms Current II – – – internally limited Reset Output Voltage VRO -0.3 7 V – Current IRO – – – internally limited Reset Delay Voltage VD -0.3 42 V – Current ID ––– – Output Voltage VQ -0.3 7 V – Current IQ – – – internally limited Inhibit Voltage VE2 -42 42 V – Current IE2 -5 5 mA t ≤ 400 ms Hold Voltage VE6 -0.3 7 V – Current IE6 – – mA internally limited GND Current IGND -0.5 – A – Temperatures Junction temperature TJ –1 5 0 °C– Storage temperature Tstg -50 150 °C–

Data Sheet 9 Rev. 2.51, 2012-01-20 Table 5 Operating Range Parameter Symbol Limit Values Unit Notes Min. Max. Input voltage VI 5.5 40 V see diagram Junction temperature TJ -40 150 °C– Thermal Resistance Junction ambient Rthja – 65 K/W PG-TO220-7-11 package Junction-case Rthjc – 6 K/W PG-TO220-7-11 package Junction-case Zthjc –2K / W T < 1 ms PG-TO220-7-11 package Junction ambient Rthja – 70 K/W PG-TO263-7-1 (SMD) package Junction-case Rthjc – 6 K/W PG-TO263-7-1 (SMD) package Junction-case Zthjc –2K / W T < 1 ms PG-TO263-7-1 (SMD) package Junction ambient Rthja – 65 K/W PG-TO220-7-12 package Junction-case Rthjc – 6 K/W PG-TO220-7-12 package Junction-case Zthjc –2K / W T < 1 ms PG-TO220-7-12 package Junction ambient Rthja – 70 K/W PG-DSO-14-30 package Junction-pin Rthjp – 30 K/W PG-DSO-14-30 package

Data Sheet 10 Rev. 2.51, 2012-01-20 TLE 4267 Table 6 Characteristics VI = 13.5 V; -40 °C < TJ < 125 °C; VE2 > 4 V (unless specified otherwise) Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max. Output voltage VQ 4.9 5 5.1 V 5 mA ≤ IQ ≤ 400 mA

6 V ≤ VI ≤ 26 V

Output voltage VQ 4.9 5 5.1 V 5 mA ≤ IQ ≤ 150 mA

6 V ≤ VI ≤ 40 V

Output current limiting IQ 5 0 0 ––m A TJ = 25 °C Current consumption Iq = II - IQ Iq ––5 0 μA IC turned off Current consumption Iq = II - IQ Iq –1 . 0 1 0 μA TJ = 25 °C IC turned off Current consumption Iq = II - IQ Iq –1 . 3 4m A IQ = 5 mA IC turned on Current consumption Iq = II - IQ Iq ––6 0 m A IQ = 400 mA Current consumption Iq = II - IQ Iq ––8 0 m A IQ = 400 mA VI = 5 V Drop voltage VDr –0 . 3 0 . 6 V IQ = 400 mA1) Load regulation ΔVQ ––5 0 m V 5 m A ≤ IQ ≤ 400 mA Supply-voltage regulation ΔVQ – 1 52 5m V VI = 6 to 36 V; IQ = 5 mA Supply-voltage rejection SVR –5 4 –d B fr = 100 Hz; Vr = 0.5 Vpp Longterm stability ΔVQ –0–m V 1 0 0 0 h Reset Generator Switching threshold VRT 4.2 4.5 4.8 V – Reset High level – 4.5 – – V Rext = ∞ Saturation voltage VRO,SAT –0 . 1 0 . 4 V RR = 4.7 kΩ 2) Internal Pull-up resistor RRO –3 0 –k Ω – Saturation voltage VD,SAT –5 0 1 0 0 m V VQ < VRT Charge current ID 81 5 2 5 μA VD = 1.5 V Upper delay switching threshold VUD 2.6 3 3.3 V –

Data Sheet 11 Rev. 2.51, 2012-01-20 Delay time tD –2 0 –m s Cd = 100 nF Lower delay switching threshold VLD –0 . 4 3 –V – Reset reaction time tRR –2– μs Cd = 100 nF Inhibit Turn on voltage VU,INH –34V I C t u r n e d o n Turn off voltage VL,INH 2––V I C t u r n e d o f f Pull-down resistor RINH 50 100 200 k Ω – Hysteresis ΔVINH 0.2 0.5 0.8 V – Input current IINH –3 5 1 0 0 μA VINH = 4 V Hold voltage VU,HOLD 30 35 40 % Referred to VQ Turn off voltage VL,HOLD 60 70 80 % Referred to VQ Pull-up resistor RHOLD 20 50 100 k Ω – Overvoltage Protection Turn off voltage VI,OV 42 44 46 V VI increasing Turn on voltage VI,turn on 3 6 ––V VI decreasing after turn off 1) Drop voltage = VI - VQ (measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V) 2) The reset output is Low for 1 V < VQ < VRT Table 6 Characteristics (cont’d) VI = 13.5 V; -40 °C < TJ < 125 °C; VE2 > 4 V (unless specified otherwise) Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max.

Data Sheet 12 Rev. 2.51, 2012-01-20 TLE 4267 Figure 4 Test Circuit Figure 5 Application Circuit AES01483 22 F ΙQ ΙRO VE6 Ω4.7 k D RO QΙ E2Ι

1000 F 470 nF

ΙΙ VE2 DCVC GNDΙdΙ VR QVVΙ TLE 4267μμ Inhibit GND Hold APPLICATIONDIAGRAM TLE4267 IInput Q E6GND RO DInhibit; e.g. from Terminal 15 Reset to µC Output Hold from µC 22µF100nF e.g. 470nF

Data Sheet 13 Rev. 2.51, 2012-01-20 Figure 6 Time Response AET01985 t D t RR RRt< Power Reset Shutdown Thermal Voltage Drop at Input Undervoltage at Output Secondary Spike Bounce Load Shutdownon VRO, SAT LDV UDV VD, SAT RTV L, INHV VU, INH INHV ROV VD QV ΙV t t t t t =dt Vd D DC Ι

Data Sheet 14 Rev. 2.51, 2012-01-20 TLE 4267 Figure 7 Enable and Hold Behavior AET01986 V Enable inactive, clamped by int. V pull-down resistor GND by external Hold active, clamped to Power-ON reset Cμ V Hold inactive, pulled up by Enable active VRO, SAT RO t D LDV VD, SAT UDV V RT D E6V Voltage controller shutdown 10) μ was released to No switch on via Output-low reset than 4 s V for more possible after E6 E6, relV> Hold inactive, released by Pulse width smaller than Q t C s μ 1 μ RR E6V V Q, NOMV Q U, HOLDV L, HOLDV μ 4) 6) <1 s μ 10) 10<s VΙ E2V U, INH L, INHV V t t t t t t

Data Sheet 15 Rev. 2.51, 2012-01-20 TLE 4267 Output Voltage VQ versus Temperature Tj Charge Current ID versus Temperature Tj Drop Voltage VDr versus Output Current IQ Delay Switching Threshold VUD versus Temperature Tj AED01486 -40 4.70 Q T VΙ = 5.10 V 4.80 4.90 5.00 13.5 V C0 40 80 160 V j AED01485 -40 ΙD T VΙ = 13.5 V C0 40 80 160 A VC =0 V μ DΙ j AED01488 Ι Q CT 125 C =2 5 100 200 300 400 500 mV 700 100 200 300 400 mA 600 DrV j j AED01487 -40 UD T VΙ = 13.5 V C0 40 80 160 0.5 1.0 1.5 2.0 2.5 3.0 V 4.0 VUD V j

Data Sheet 16 Rev. 2.51, 2012-01-20 TLE 4267 Current Consumption Iq versus Output Current IQ Output Current Limiting IQ versus Temperature Tj Current Consumption Iq versus Input Voltage VI Output Current Limiting IQ versus Input Voltage VI AED01490 Ι Q mA 100 200 300 400 mA 600 Ι q VΙ = 13.5 V AED01489 -40 ΙQ T C0 40 80 160 mA 100 200 300 400 500 700

13.5 V=ΙV

j AED01491 qΙ = 10 20 30 50 RL ΙV V Ω25 mA AED01987 Ι Q V V i mA 100 200 300 400 500 600 700 10 20 30 40 50 125 C= = C25 jT jT

Data Sheet 17 Rev. 2.51, 2012-01-20 TLE 4267 Output Voltage VQ versus Inhibit Voltage VINH Inhibit Current IINH versus Inhibit Voltage VINH AED01988 VQ V INHV 1 2 3 4 5 6V AED01989 Ι INH V V INH 1 2 3 4 5 6 Aμ

Data Sheet 18 Rev. 2.51, 2012-01-20 TLE 4267 Package Outlines Figure 8 PG-TO220-7-11 (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requireme nts for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Typical ±0.11.27 4.4 9.25±0.20.05 All metal surfaces tin plated, except area of cut. 2.4 0.5±0.1 ±0.38.6 10.2 ±0.3 ±0.43.9 ±0.48.4 3.7±0.3 A A0.25 M 9.8±0.15 2.8 15.65±0.3 13.4 0...0.15 1.27 0.6 ±0.1 C ±0.2 17 ±0.3 8.51) 9.9±0.2 -0.153.7 10±0.2 C 1.6±0.3 GPT09083 Y ou can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mmSMD = Surface Mounted Device

Data Sheet 19 Rev. 2.51, 2012-01-20 Figure 9 PG-TO263-7-1 (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requireme nts for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). A BA0.25 M 0.1 Typical ±0.210 8.5 1) 7.551) (15) ±0.29.25 ±0.31 0...0.15 7 x 0.6 ±0.1 ±0.1 GPT09114 1.27 4.4 B 0.5±0.1 ±0.32.7 4.7±0.5 0.05 0.1 Metal surface min. X = 7.25, Y = 6.9 2.4 1.27 All metal surfaces tin plated, except area of cut. 0...0.3 B 6 x 8˚ MAX. Y ou can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mmSMD = Surface Mounted Device

Data Sheet 20 Rev. 2.51, 2012-01-20 TLE 4267 Figure 10 PG-TO220-7-12 (Plastic Transistor Single Outline) Green Product (RoHS compliant) To meet the world-wide customer requireme nts for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). GPT09084 A BA0.25 M Typical 9.8±0.15 2.8 15.65±0.3 13.4 0...0.15 1.27 0.6 ±0.1 ±0.11.27 4.4 B 9.25±0.20.05 All metal surfaces tin plated, except area of cut. C ±0.2 17±0.3 8.51) 10±0.2 3.7-0.15 C 2.4 0.5±0.1 13 ±0.5 ±0.511 Y ou can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mmSMD = Surface Mounted Device

Data Sheet 21 Rev. 2.51, 2012-01-20 Figure 11 PG-DSO-14-30 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requireme nts for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Y ou can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mmSMD = Surface Mounted Device

Revision History

Data Sheet 22 Rev. 2.51, 2012-01-20 Version Date Changes Rev. 2.51 2012-02-20 Page 1: Coverpage added. Page 7: Figure 3 “Block Diagram” updated with clear label for reset output pin. Page 12: Figure 5 “Application Circuit” updated with clear labels for inhibit, hold, reset and reset delay pin. Rev. 2.5 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4267 Page 2: AEC certified statement added Page 2 and Page 18 ff: RoHS compliance statement and Green product feature added Page 2 and Page 18 ff: Package changed to RoHS compliant version Legal Disclaimer updated

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