TLE4211 SIEMENS | Alldatasheet

Document overview

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Technical content

Features

  • Double low-side switch, 2 x 2 A
  • Power limitation
  • Overtemperature shutdown
  • Status monitoring
  • Shorted-load protection
  • Reverse polarity protection
  • Integrated clamp Z-Diodes
  • Voltage proof up to 70 V
  • Temperature range – 40 to 125°C

(top view)

Pin Definitions and Functions Pin No. Symbol Function

1 STA Status output (open collector)

for both outputs; indicates overload, open load and shorted load to ground as well as overvoltage at pin 7. In case of malfunction the status output is switched to low after a delay time (except overvoltage).

2 IN1 Control input 1 (TTL-compatible)

activates output transistor 1 in case of low-potential. 3Q 1 Output 1 Shorted-load protected, open collector output with 36 V clamp Z-diode to ground.

4 GND Ground

Wiring must be designed for a max. short-circuit current (2 x 3.5 A). 5Q 2 Output 2 Shorted-load protected, open collector output with 36 V clamp Z-diode to ground.

6 IN2 Control input 2 (TTL-compatible)

activates output transistor 2 in case of low-potential. VS Supply voltage In case of overvoltage at this pin large sections of the circuit are deactivated. The status output indicates the malfunction without delay time.

The control inputs comprise TTL-compatible Schmitt triggers with hysteresis. Driven by these stages the inverting buffer amplifiers convert the logic signal for driving the NPN power transistors. Switching Stages The output stages comprise NPN power transistors with open collectors. Since the protective circuit allocated to each stage limits the power dissipation, the outputs are shorted-load protected to the supply voltage throughout the entire operating range. Positive voltage peaks, which occur during the switching of inductive loads, are limited by the integrated clamp Z-diodes. Monitoring and Protective Functions The outputs are monitored for open load, overload, and shorted output to ground (see table below). In addition, large sections of the circuit are de-activated in case of excessive supply voltages VS. Linked via OR gate the information regarding these malfunctions effects the status output (open collector, active low). An internally determined delay time applied to all malfunctions but overvoltage prevents the output of messages in case of short-term malfunctions. Furthermore, a temperature protection circuit prevents thermal overload. An integrated reverse diode protects the supply voltage VS against reverse polarities. Similarly the load circuit is protected against reverse polarities within the limits established by the maximum ratings (no shorted load at the same time!). At supply voltages below the operating range an undervoltage detector ensures that neither the status nor the outputs are activated. Status Output (L = Error) Undervoltage Operating Range Overvoltage VI = L (active) VI = H (passive) Normal function H H H L Overload H L H L Open load H L H L Shorted output to ground H L L L

1) Refer to monitoring and protective functions 2) Lower limit = 4.6 V, if previouslyVS greater than 5.6 V (turn-on hysteresis) Absolute Maximum Ratings Tj =− 40 to 150 °C Parameter Symbol Limit Values Unit min. max. Voltages Supply voltage (pin 7) 1) Supply voltage (pin 7)t≤ 500 ms Input voltage (pin 2; pin 6) Output voltage (pin 1) VS VS VI VO –4 5 – 0.3 V V V V Currents Switching current (pin 3; pin 5) Current with reverse polarity (pin 3; pin 5) TC ≤ 85°C Output current (pin 1) IQ IQ IQ – 2.2 A mA Max. current at inductive load IQ – see Diagram Junction temperature Storage temperature Tj Tstg – 50 150 150 Operating Range Supply voltage VS 5.6 2) 20 V Supply voltage slew rate d VS/dV – 1 1 V/ µs Case temperature TC – 40 125 °C Thermal resistance junction to case junction to ambient Rth JC Rth JA K/W K/W limited internally

VS = 6 to 18 V andTj = – 40 to 125°C Parameter Symbol Limit Values Unit Test Condition min. typ. max. General Characteristics Quiescent current Supply voltage IS IS 3.5 100 180 mA mA VI =VI >VIH VI =VI <VIL Supply overvoltage shutdown threshold Open load error threshold voltage VSO VQU V mV IO =5 mA;VO < 0.4 V IO =5 mA;VO < 0.4 V Open load error threshold current IQU – 50 120 mA VQ =VQU Open load error threshold current for both channels active IQU – – 250 mA VQ1 =VQ2 =VQU Logic Control input H-input voltage L-input voltage VIH VIL 0.7 1.7 1.1 2.4 V V Hysteresis of input voltage Δ VI – 0.6 – V – H-input current L-input current IIH – IIL µA µA VI = 5 V VI = 0.5 V Status output (open coll.) L-saturation voltage VOSat – – 0.4 V IO =5 mA Status delay time tdS 12 20 30 µs 1) 1) Period from the beginning of the disturbance at one channel (exception: overvoltage) until the 50 % value of the status switching edge is reached.

Saturation voltage VQSat – 0.6 0.8 V IQ =1.6 A;VI <VIL; Tj = 25°C Leakage current IQ – – 300 µA VQ = 6 V; VI >VIH Switch-ON time Switch-OFF time tD ON tD OFF 0.5 2.5 µs µs see Timing Diagram; IQ =1 A Output voltage Negative clamp – VQF – 1.4 1.8 V IQ = – 2.0 A Power Clamp Diode (VS = 42 V;S1 open) Output voltage positive clamp VQZ 34 36 40 V IQ =0.1 A Serial resistance rz –2– Ω 0 A <IQ <2 A Characteristics (cont’d) VS = 6 to 18 V andTj = – 40 to 125°C Parameter Symbol Limit Values Unit Test Condition min. typ. max.

C * is to be dimensioned such that e.g. in case of a battery voltage failure the maximum ratings of the IC are not exceeded by the recirculation energyL1, L2.

(Plastic Transistor Single Outline) GPT05108 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mmSMD = Surface Mounted Device