TLE4206 SIEMENS | Alldatasheet

Document overview

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Technical content

Features

  • Optimized for headlight beam control applications
  • Current-peak-blanking (no electrolytic capacitor at VS)
  • Delivers up to 0.8 A continuous
  • Low saturation voltage; typ.1.2 V total @ 25°C; 0.4 A
  • Output protected against short circuit
  • Overtemperature protection with hysteresis
  • Over- and undervoltage lockout
  • No crossover current
  • Internal clamp diodes
  • Enhanced power packages Type Ordering Code Package TLE 4206 Q67000-A9303 P-DIP-16-5 TLE 4206 G Q67006-A9299 P-DSO-14-4

Semiconductor Group 2 1998-02-01 Figure 1 Pin Configuration (top view) Pin Definitions and Functions Pin No. P-DSO-14-4 Pin No. P-DIP-16-5 Symbol Function 1 1 FB Feedback Input 2 2 HYST Hysteresis I/O 3, 4, 5, 10, 11, 12 4, 5, 6, 11, 12, 13 GND Ground 6 7 OUT1 Power Output 1

78 CPB Current Peak Blanking Input

89 VS Power Supply Voltage

3, 14 N.C. Not connected AEP02261 CPB V OUT1 GND HYST FB OUT2 GND RANGE REF GND GND GND GND S AEP02262 SVCPB OUT2 10OUT1 GND N.C. HYST FB GND N.C. RANGE REF GND GND GND GND P-DSO-14-4 P-DIP-16-5

Semiconductor Group 3 1998-02-01 Figure 2 Block Diagram (Pin numbers are valid for TLE 4206 G in P-DSO-14-4) AEB02258 SV OUT1 OUT2 and Logic Protection 10,11,12 GND CPB Range- AMP AMP Hyst- AMP Servo- 13RANGE REF 14 HYST 2 FB 1 TLE 4206G 3,4,5, Half- Bridge Half- Bridge

Semiconductor Group 4 1998-02-01 Absolute Maximum Ratings Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Parameter Symbol Limit Values Unit Remarks min. max. Voltages Supply voltage VS – 0.3 45 V – Supply voltage VS – 1 – V t < 0.5 s; IS > – 2 A Logic input voltages (FB, REF, RANGE, HYST, CPB) VI – 0.3 20 V – Currents Output current (OUT1, OUT2)IOUT – – A internally limited Output current (Diode) IOUT –1 1 A – Input current (FB, REF, RANGE, HYST) IIN – 2 – 6 mA mA t < 2 ms; t/T < 0.1 Temperatures Junction temperature Tj – 40 150 °C– Storage temperature Tstg – 50 150 °C– Thermal Resistances Junction pin (P-DSO-14-4) Rthj-pin – 25 K/W measured to pin 5 Junction ambient (P-DSO-14-4) RthjA –6 5 K / W – Junction pin (P-DSO-16-5) Rthj-pin – 15 K/W measured to pin 5 Junction ambient (P-DSO-16-5) RthjA –6 0 K / W –

Semiconductor Group 5 1998-02-01 Operating Range Parameter Symbol Limit Values Unit Remarks min. max. Supply voltage VS 81 8 V A f t e r VS rising above VUV ON Supply voltage increasingVS – 0.3 VUV ON V Outputs in tristate Supply voltage decreasingVS – 0.3 VUV OFF V Outputs in tristate Output current IOUT1-2 – 0.8 0.8 A – Input current (FB, REF)IIN – 50 500 mA– Junction temperature Tj – 40 150 °C–

Semiconductor Group 6 1998-02-01

Electrical Characteristics

8 V < VS < 18 V; IOUT1-2 = 0 A; – 40°C < Tj < 150°C

(unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max. Current Consumption Supply current IS –1 2 2 0 m A – Supply current IS –2 0 3 0 m A IOUT1 = 0.4 A IOUT2 = – 0.4 A Supply current IS –3 0 5 0 m A IOUT1 = 0.8 A IOUT2 = – 0.8 A Over- and Under Voltage Lockout UV Switch ON voltage VUV ON –7 . 4 8 V VS increasing UV Switch OFF voltage VUV OFF 66 . 9 – V VS decreasing UV ON/OFF Hysteresis VUVHY –0 . 5 – V VUV ON – VUV OFF OV Switch OFF voltage VOV OFF –2 0 . 5 2 3 V VS increasing OV Switch ON voltage VOV ON 17.5 20 – V VS decreasing OV ON/OFF Hysteresis VOVHY –0 . 5 – V VOV OFF – VOV ON

Semiconductor Group 7 1998-02-01 Outputs OUT1-2 Saturation Voltages Source (upper ) IOUT = – 0.2 A VSAT U – 0.85 1.15 V Tj = 25 °C Source (upper ) IOUT = – 0.4 A VSAT U – 0.90 1.20 V Tj = 25 °C Sink (upper) IOUT = – 0.8 A VSAT U – 1.10 1.50 V Tj = 25 °C Sink (lower) IOUT = 0.2 A VSAT L – 0.15 0.23 V Tj = 25 °C Sink (lower) IOUT = 0.4 A VSAT L – 0.25 0.40 V Tj = 25 °C Sink (lower) IOUT = 0.8 A VSAT L – 0.45 0.75 V Tj = 25 °C Total drop IOUT = 0.2 A VSAT –1 . 0 1 . 4 V VSAT = VSAT U + VSAT L Total drop IOUT = 0.4 A VSAT –1 . 2 1 . 7 V VSAT = VSAT U + VSAT L Total drop IOUT = 0.8 A VSAT –1 . 6 2 . 5 V VSAT = VSAT U + VSAT L Clamp Diodes Forward voltage; upper VFU –1 1 . 5 V IF = 0.4 A Upper leakage current ILKU –– 5 m A IF = 0.4 A Forward voltage; lower VFL –0 . 9 1 . 4 V IF = 0.4 A Electrical Characteristics (cont’d) (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max.

Semiconductor Group 8 1998-02-01 Input-Interface Input REF Quiescent voltage VREFq –2 0 0 – m V IREF = 0mA Input resistance RREF –6 – k W 0 V < VREF < 0.5 V Input FB Quiescent voltage VFBq –2 0 0 – m V IFB = 0 mA Input resistance RFB –6 – k W 0 V < VFB < 0.5 V Input/Output HYST Current Amplification AHYST = IHYST / (IREF – IFB ) AHYST 0.8 0.95 1.1 - –2 0 mA < IHYST < – 10 mA; 10 mA <IHYST < 20 mA; IREF =2 5 0mA VHYST = VS / 2 Current Offset IHYSTIO –2 0 . 5 3 mA IREF = IFB =2 5 0mA VHYST = VS / 2 Threshold voltage High VHYH / VS –5 2 – % – Deadband voltage High VDBH / VS –5 0 . 4 – % – Deadband voltage Low VDBL / VS –4 9 . 6 – % – Threshold voltage Low VHYL / VS –4 8 – % – Hysteresis Window VHYW /VS 34 5 % ( VHYH – VHYL )/ VS Deadband Window VDBW / VS 0.4 0.8 1.2 % ( VDBH – VDBL )/ VS Electrical Characteristics (cont’d) (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max.

Semiconductor Group 9 1998-02-01 Input RANGE Input current IRANGE – 1 – 1 mA0 V < VRANGE < VS Switch-OFF voltage High VOFFH – 100 0 100 mV refer to VS Switch-OFF voltage Low VOFFL 300 400 500 mV refer to GND Input CPB (Current Peak Blanking) Charge current ICPBCH –6 . 5 – mA VHYL > VHYST ; VCPB = 0 V Low voltage VCPBL –2 0 1 0 0 m V VHYL < VHYST < VHYH High voltage threshold VCPBH 55 . 7 6 . 5 V VHYL > VHYST Clamp voltage VCPBC –6 . 2 – V VHYL > VHYST Blanking time tCPB –4 0 – m s C CPB = 47 nF Thermal Shutdown Thermal shutdown junction temperature TjSD 150 175 200 °C– Thermal switch-on junction temperature TjSO 120 – 170 °C– Temperature hysteresis DT –3 0 – K – Electrical Characteristics (cont’d) (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max.

Semiconductor Group 10 1998-02-01 Figure 3 Application Circuit (Pin numbers are valid for TLE 4206G in P-DSO-14-4) AES02259 SV M OUT1 OUT2 and Logic Protection 10,11,12 GND CPB Range- AMP AMP Hyst- AMP Servo- CPBC 100 k C 470 nF S Dz 36 V Dr 1N4001 13RANGE REF 14 HYST 2 FB 1 R HYL R FB 47 nF W 50 kW 50 k R REF W R R W50 k R 100 kW HYH VREFIN GND VB+ R REF PFB TLE 4206G 3,4,5, Half- Bridge Half- Bridge V+ B 1 kW 1 kW

Semiconductor Group 11 1998-02-01 Figure 4 Hysteresis, Phaselag and Deadband-Definitions AED02260 MotorV Expressions: OUT1V= HY VOUT2- -2.0% -0.4% 2.0%0.4% FBREFV( V-) / VS CCW Turn Brake Turn CW DBW HYW DBL DBH = Hysteresis DeadbandDB = HighH= LowL= WindowW= Status Motor HYL HYH

Semiconductor Group 12 1998-02-01 Figure 5 Timing and Phaselag AED02314 VOFFH S(V HYHV DBHV FB(V DBLV HYLV OFFLV SVTestconditions: BV= ; no revers polarity voltage diode 100 kHYHRR = HYL = W ; RRREF = FB = W50 k t t t VREF(t) CPBCV CPBHV CPBLV Start-Command Stop-Command Blanking-Time t t OUT2V H L CPBt CPBt CPBt CPBt L OUT1V H t Brake CCW Brake CW Brake CW BrakeCCW Motor Status CPB(V )t

Semiconductor Group 13 1998-02-01 Package Outlines P-DSO-14-4 (Plastic Dual Small Outline Package) 1.27 1.45-0.2 8.75-0.2 14 8 1.75 max 0.2 6 ±0.2 0.35 x 45˚ -0.24 0.1 -0.1 0.4+0.8 Index Marking +0.150.35 2) 2) Does not include dambar protrusion of 0.05 max. per side 1) Does not include plastic or metal protrusion of 0.15 max. per side 0.2 14x 0.19 +0.06 8˚ max. GPS05093 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mmSMD = Surface Mounted Device

Semiconductor Group 14 1998-02-01 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mm 0.25 6.35 8.9 ±0.25 +0.1 7.87±0.38 1.7 max2.54 0.38 min 4.37 max 3.25 min0.46±0.1 19.05±0.25 GPD05585 16 9 1 8 Index Marking 0.25 16x 1) Does not include plastic or metal protrusion of 0.25max per side P-DIP-16-5 (Plastic Dual In-line Package)