TLD5085EJ

TLD5085EJ_1 INFINEON | Alldatasheet

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Technical content

Rev. 1.1, 2009-12-16 TLD5085EJ 1.8A DC/DC Step-Down Converter Infineon ® Power LED Driver

PG-DSO-8 (e-Pad) Type Package Marking TLD5085EJ PG-DSO-8 (e-Pad) TLD5085 Datasheet 2 Rev. 1.1, 2009-12-16 1.8A DC/DC Step-Down Converter TLD5085EJ 1O v e r v i e w

• Wide Input Voltage Range from 4.75V to 45V
• Constant Current or Constant Voltage Regulation
• Drives LEDs in Buck Topology
• Very low shutdown curren t consumption (typ. 0.1µA)
• 370 kHz switching frequency
• P W M D i m m i n g
• Integrated power-switch (out put current up to 1.8A)
• Internal Soft-Start function
• ± 2% output current tolerance (± 4% for full load current range)
• Small thermally enhanced exposed heatslug package
• Over Temperature Shutdown
• AEC Qualified
• Green Product (RoHS Compliant)

Description

The TLD5085EJ is a smart LED buck converter with an integrated power-switch, capable of driving up to 1.8A load current with excellent line and load regulation. The main fu nction of this device is to step-down the input voltage and regulating a constant LED current. The constant curr ent regulation is especially beneficial for LED color accuracy and longer lifetime. The TLD5085EJ also has a PWM input which can be used for LED dimming. The switching frequency of 370kHz allows to use small and inexpensive passive components. An Enable function is implemented to reduce the shut-down cu rrent consumption to typ. 0.1µA. This IC is suited for use in the harsh automotive environments and provides protection func tions such as current limitation and overtemperature shutdown. The integrated soft-start feature avoids a current and voltage overshot at the output during start-up of the device.

Applications

• Automotive Lighting (Reading Light, Dome Light, Dashboard Backlighting)
• High Power LED Applications
• Constant Current and Voltage Source

Datasheet 3 Rev. 1.1, 2009-12-16 TLD5085EJ Block Diagram

2 Block Diagram

5 BDS

Datasheet 4 Rev. 1.1, 2009-12-16

3 Pin Configuration

3.1 Pin Assignment

Figure 2 Pin Configuration

3.2 Pin Definitions and Functions

1P W M I PWM Input for; Provides LED dimming option. If not used connect to VS. 2G N D Ground; Connect to system ground.

3 COMP Compensation Input;

Frequency compensation for regulation loop stability. Connect R and C network to pin for stability. 4F B Feedback Input; Connect a defined power resistor (RFB=0.6V/ILED) to get the needed LED output current. For adjustable output voltages connect this pin via a voltage divider in parallel to the output capacitor. 5B D S Buck Driver Supply Input; Connect the bootstrap capacitor between this pin and pin BUO. 6B U O Buck Switch Output; Source of the integrated power-switch. Connect directly to the cathode of external freewheeling diode and the buck circuit inductance. 7E N Enable Input; Apply logic high signal to enable the device. A pull down resistor is integrated. 8V S Supply Voltage Input; Connect to supply voltage source. EP Exposed Pad; Connect to heatsink area and GND by low inductance wiring. GND EN COMP BUO VS 2 7 1 8 FB TLD5085PWMI BDS S 08_Pinout _TLD5085 .vsd EP

Datasheet 5 Rev. 1.1, 2009-12-16 TLD5085EJ General Product Characteristics

4 General Product Characteristics

4.1 Absolute Maximum Ratings

Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground (unless otherwise specified) 1) Not subject to production test, specified by design Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Voltages

4.1.1 PWMI (Pin1)

VPWMI -0.3 45 V –

4.1.2 COMP (Pin 3)

VCOMP -0.3 5.5 V – 4.1.3 6.2 V t < 10s2) 2) Exposure to those absolute maximum ratings for extended periods of time ( t > 10s) may affect device reliability

4.1.4 FB (Pin 4)

VFB -0.3 5.5 V –

4.1.5 BDS (Pin 5)

• 0.3 VBUO + 5.5

4.1.6 BUO (Pin 6)

VBUO -2.0 VVS + 0.3 V –

4.1.7 EN (Pin 7)

VEN -40 45 V –

4.1.8 VS (Pin 8)

VS -0.3 45 V – Temperatures

4.1.9 Junction Temperature Tj -40 150 °C–

4.1.10 Storage Temperature Tstg -55 150 °C–

4.1.11 ESD Resistivity all Pins to GND VESD -2 2 kV HBM 3)

3) ESD susceptibility HBM according to EIA/JESD 22-A 114B (1.5k Ω,100pF).

General Product Characteristics Datasheet 6 Rev. 1.1, 2009-12-16

4.2 Functional Range

Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.

4.3 Thermal Resistance

Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. 4.2.1 Supply Voltage VS 4.75 45 V – 4.2.2 Output Voltage adjust range VCC 0.60 16 V see Figure 5

4.2.3 External buck inductor LBU 18 56 µH see Figure 5 and

Figure 64.2.4 External buck capacitor CBU1 33 120 µF 4.2.5 External buck capacitor ESR ESRBU1 –0 . 3 Ω – 1) 1) See section “ “Application Information” on Page 11” for loop compensation requirements.

4.2.6 Junction Temperature Tj -40 150 °C–

Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.

4.3.1 Junction to Case RthJC ––1 0 K / W 1) 2)

1) Not subject to production test, specified by design. 2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed to ambient temperature). Ta=25°C, power-switch is dissipating 1W.

4.3.2 Junction to Ambient (2s2p) RthJA –4 2 –K / W 1) 3)

3) Specified RthJA value is according to Jedec JESD51-2,-5,- 7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). According to JESD51-5 a thermal via array under the exposed pad contacted the first inner copper layer. Ta=25°C, power- switch is dissipating 1W.

Datasheet 7 Rev. 1.1, 2009-12-16 TLD5085EJ Buck Regulator

5 Buck Regulator

5.1 Description

The gate of the power-switch is driven by the Gate driver which is supplied by the external capacitor connected to pin BDS (Buck Driver Supply) using the bootstrap principle. BDS is the supply pin for the integrated gate driver of the internal power-switch. The power-switch has to be in the RDSon region. If VGS is not high enough, the power-switch can not operate in the R DSON region, which means high power dissipation. An integrated under voltage lockout function (BDS UV-Comparator) supervising the ’bootstrap’ capacitor voltage ensures that the device is always driven with a sufficient bootstrap voltage in order to prevent from extensive heat up of the power-switch. An integrated charge pump supports the gate driver in case of low input supply voltage, small differential voltage between input supply and output voltage at low current and during startup. In order to minimize emission, the charge pump is switched off if the input voltage is sufficient for supplying the bootstrap. The soft start function generates a defined ramp of the reference voltage during the first 0.5 ms (typ.) after device initialization and if the Device is au torestarting after a thermal shutdown. This function is disabled during the dimming operation via the PWMI-pin. Figure 3 Block Diagram Buck Regulator Ramp Generator Logic Temp. Sensor Power Switch BDS Charger Charge Pump COMP 3 VS 8 BUO6 BDS5 PWMI FB 4 GND Overcurrent Comp. BDS UV Comp. PWM Comp. Feedback Error Amp. Clock Soft Start Ramp VREF=0.6V Gate Driver

Datasheet 8 Rev. 1.1, 2009-12-16

5.2 Electrical Characteristics

Electrical Characteristics: Buck Regulator VS = 6.0 V to 40 V, Tj = -40 °C to +150 °C, all voltages with respect to ground (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. VS = 12V 0.1A < ICC < 1.0A VS = 12V 1mA < ICC < 1.8A 5.2.3 FB input current IFB -1 -0.1 0 µA VFB = 0.6V

5.2.4 Power-Switch on-resistance RDS(ON) –– 5 0 0 m Ω ICC=300 mA;

TJ = 150 °C max.

5.2.5 Current transition rise/fall time tr –5 0 – n s ICC=1 A 1)

1) Not subject to production test; specified by design. 5.2.6 Buck peak over current limit IBUOC 2.2 – 3.6 A –

5.2.7 Bootstrap under voltage lockout,

VBDS,off VBUO +3.3 – – V Bootstrap voltage decreasing

5.2.8 Charge pump current ICP 2– – m A VS = 12V;

VBUO = VBDS = GND

5.2.9 Charge pump switch-off threshold VBDS -

–– 5 V ( VBDS - VBUO) increasing

5.2.10 Maximum duty cycle Dmax –– 1 0 0 % 1) 2)

2) Consider “ Chapter 4.2, Functional Range”

5.2.11 Soft start ramp tstart 350 500 750 µs VFB rising from 5% to

95% of VFB,nom

5.2.12 Input under voltage shutdown

VS,off 3.75 – – V VS decreasing 5.2.13 Input voltage startup threshold VS,on – – 4.75 V VS increasing

5.2.14 Input under voltage shutdown

VS,hyst 150 – – mV 1)

Datasheet 9 Rev. 1.1, 2009-12-16 TLD5085EJ Enable, Thermal Shutdown and PWM Dimming Function

6 Enable, Thermal Shutdown and PWM Dimming Function

6.1 Description

Enable Function: With the enable pin (EN) the device can be set in off-state reducing the current consumption to typ. 0.1µA. The enable function features an integrated pull down resistor which ensures that the IC is shut down and the power-switch is off in case the pin EN is not connected. Device Wake Up Behavior: The device initialization is triggered either by the EN voltage level crossing the turn- on threshold, rising supply voltage (during EN=H), and also when the device restarts after a thermal shutdown. The softstart ramp starts after the BDS external capacitor is charged. Overtemperature Behavior: The integrated thermal shutdown function turns the power-switch off in case of overtemperature. The typ. junction shutdown temperature is 175°C, with a min. of 150°C. After cooling down the IC will automatically restart operation. The thermal shutdown is an integr ated protection func tion designed to prevent IC destruction when operating under fault conditions. It must not be used for normal operation. PWM Dimming Function : The PWMI signal directly controls the gate driver of the integrated power-switch by overriding the internal control signals.

6.2 Electrical Characteristics Enable, Bias, Thermal Shutdown and PWM Dimming

Electrical Characteristics: Enable, Bias and Thermal Shutdown VS = 6.0 V to 40 V, Tj = -40 °C to +150 °C, all voltages with respect to ground (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.

6.2.1 Current Consumption,

Iq,OFF –0 . 1 2µ A VEN = 0.8V; Tj < 105°C; VS = 16V

6.2.2 Current Consumption,

Iq,ON ––7m A VEN = 5.0V; ICC = 0mA; VS = 16V

6.2.3 Current Consumption,

Iq,ON ––1 0 m A VEN = 5.0V; ICC = 1.8A; VS = 16V

6.2.4 Enable high signal valid VEN,hi 3––V –

6.2.5 Enable low signal valid VEN,lo ––0 . 8 V –

6.2.6 Enable hysteresis VEN,HY 50 200 400 mV 1)

1) Specified by design. Not subject to production test.

6.2.7 Enable high input current IEN,hi ––3 0 µ A VEN = 16V

6.2.8 Enable low input current IEN,lo –0 . 1 1µ A VEN = 0.5V

6.2.9 PWMI high threshold VPWMI,hi 3––V –

6.2.10 PWMI low threshold VPWMI,lo ––0 . 8 V –

6.2.11 PWMI turn-on delay tPWM,ON ––5µ s 2)

2) At startup current flowing in CBU1, recommended max. PWM frequency 1kHz@370kHz fsw

6.2.12 PWMI turn-off delay tPWM,OFF ––5µ s –

6.2.13 Over temperature shutdown Tj,sd 150 175 190 °C 1)

6.2.14 Over temperature shutdown

Tj,sd_hyst –1 5 –K 1)

Datasheet 10 Rev. 1.1, 2009-12-16

7 Oscillator

7.1 Description

The oscillator turns on the power-switch with a consta nt frequency while the buck regulating circuit turns the power-switch off in every cycle with an appropriate time gap depending on the output and input voltage. The internal sawtooth signal used for the PWM generation has an amplitude proportional to the input supply voltage (feedforward).

7.2 Electrical Charact eristics Oscillator

Electrical Characteristics: Buck Regulator VS = 6.0 V to 40 V, Tj = -40 °C to +150 °C, all voltages with respect to ground (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.

7.2.1 Oscillator frequency fosc 330 370 420 kHz –

Datasheet 11 Rev. 1.1, 2009-12-16 TLD5085EJ

Application Information

8 Application Information

Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device.

8.1 Frequency Compensation

The stability of the output voltage can be achieved with a simple RC connected between pin COMP and GND. The standard configuration using the switching frequency of the internal oscillator is a ceramic capacitor CCOMP =2 2 n F and RCOMP =2 2 kΩ. By slight modifications to the compensation network the stability can be optimized for different types of buck capacitors (ceramic or tantalum). The compensation network is essential for the control loop stab ility. Leaving pin COMP open might lead to an instable operation.

8.2 Compensating a tant alum buck capacitor CBU1

The TLD5085EJ control loop is opti mized for ceramic buck capacitors CBU. In order to mainta in stability also for tantalum capacitors with ESR up to 300mΩ, an additional compensation capacitance CCOMP2 at pin COMP to GND is required. It’s value calculates: CCOMP2 = CBU * ESR(CBU) / RCOMP , whereas CCOMP2 needs to stay below 5nF. Figure 4 High-ESR buck capacitor compensation

8.3 Freewheeling Diode

In order to minimize losses and for fast recovery, a schottky freewheeling diode is required. Disconnecting the freewheeling diode during operation might lead to destruction of the IC. GND COMP TLD5085 CCOMP RCOMP CCOMP2

Datasheet 12 Rev. 1.1, 2009-12-16

8.4 Constant Output Voltage Mode for LED applications

Figure 5 Application Diagram (constant voltage mode) Note: This is a very simplified example of an application circuit. The function must be verified in the real application The output voltage of the TLD5085EJ can be programmed by a voltage divider connected to the feedback pin FB. The divider cross current should be 300 µA at minimum, therefore the maximum R2 calculates: R2 ≤ VFB / IR2 --> R2 ≤ 0.6V / 300 µA = 2 kΩ For the desired output voltage level VCC, R1 calculates then (neglecting the small FB input current): BDS BUO FB GND COMP PWMI EN VS Cbootstrap DBU LBU CBU1 CCOMP RCOMP PWM Dimming TLD5085 Ignition Key Terminal 15 VBatt CS C1 C2 DRV Optional Parts CBU2 Rbalance1 Rbalance2 VCC SPIDER-LS TLE7240SL VFB R1 R2 VCC VFB  .=

Datasheet 13 Rev. 1.1, 2009-12-16 TLD5085EJ

8.5 Constant current mode for LED applications

Figure 6 Application Diagram TLD5085 as LED Driver (constant current mode) Note: This is a very simplified example of an application circuit. The function must be verified in the real application. BDS BUO FB GND COMP PWMI EN VS LED FB I VR 6.0= Cbootstrap DBU LBU CBU1 CCOMP RCOMP PWM Dimming TLD5085 Ignition Key Terminal 15 VBatt CS C1 C2 DRV Optional Parts 2 x High Brightness White LEDs

Datasheet 14 Rev. 1.1, 2009-12-16

9 Package Outlines

Figure 7 Outline PG-DSO-8 (e-Pad) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). PG-DSO-8-27-PO V01 8x0.41±0.09 2) M0.2 DC A-B 1.27 C Stand Off -0.10.1 (1.45) 1.7 MAX. 0.08 Seating Plane C A B 3) JEDEC reference MS-012 variation BA 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width Bottom View ±0.23 ±0.22.65 0.2±0.2 D 6 M D 8x 0.64±0.25 3.9±0.11) 0.1 0.35 x 45˚ CD2 x +0.06 0.19 8˚ MAX. Index Marking For further package information, please visit our website: http://www.infineon.com/packages. Dimensions in mm

Datasheet 15 Rev. 1.1, 2009-12-16 TLD5085EJ

Revision History

Rev. 1.1 2009-12-16 • Cover sheet updated

• Package name updated Rev. 1.0 2009-06-04 Initial Datasheet for TLD5085EJ

81726 Munich, Germany

© 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.