TLD2311EL_15 MARL | Alldatasheet
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Technical content
Rev. 1.0, 2013-08-08 TLD2311EL
3 Channel High Side Current Source
Infineon ® Basic LED Driver
Data Sheet 2 Rev. 1.0, 2013-08-08 TLD2311EL
TLD2311EL PG-SSOP14 TLD2311EL Data Sheet 3 Rev. 1.0, 2013-08-08
Features
- 3 Channel device with integrated output stages (current sources), optimized to drive LEDs
- Output current up to 120mA per channel
- Low current consumption in sleep mode
- PWM-operation supported via VS- and EN-pin
- Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED protection during over temperature conditions
- Reverse polarity protection
- Overload protection
- Undervoltage detection
- Open load and short circuit to GND diagnosis
- Wide temperature range: -40 °C < T j < 150 °C
- PG-SSOP14 package with exposed heatslug
- Green Product (RoHS compliant)
- AEC Qualified
Description
The Basic LED Driver TLD2311EL is a three channel high side driver IC with integrated output stages. It is designed to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive i.e. 3 red LEDs per chain (total 9 LEDs) with a cu rrent up to 60mA, which is limited by thermal cooling aspects. The output current is controlled practically independent of load and supply voltage changes. Table 1 Product Summary Operating voltage VS(nom) 5.5 V… 40 V Maximum voltage VS(max) VOUTx(max) 40 V Nominal output (load) current IOUTx(nom) 60 mA when using a supply voltage range of 8V - 18V (e.g. Automotive car battery). Currents up to IOUT(max) possible in applications with low thermal resistance RthJA Maximum output (load) current IOUTx(max) 120 mA; depending on thermal resistance RthJA Output current accuracy at RSETx = 12 kΩ kLT 750 ± 7% Current consumption in sleep mode IS(sleep,typ) 0.1 µA
Data Sheet 4 Rev. 1.0, 2013-08-08 TLD2311EL Overview Protective functions - ESD protection - Under voltage lock out - Over Load protection - Over Temperature protection - Reverse Polarity protection Diagnostic functions - OL detection - SC to Vs (indicated by OL diagnosis) - SC to GND detection
Applications
Designed for exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,... The device is also well suited for inte rior LED lighting applications such as ambient lighting (e .g. RGB), interior illumination and dash board lighting.
Data Sheet 5 Rev. 1.0, 2013-08-08
2 Block Diagram
Figure 1 Basic Block Diagram Output control OUT2 Internal supply Thermal protection Current adjust GND EN VS IN_SET2 Status ST OUT3 OUT1 IN_SET1 IN_SET3
Data Sheet 6 Rev. 1.0, 2013-08-08 TLD2311EL Pin Configuration
3 Pin Configuration
3.1 Pin Assignment
Figure 2 Pin Configuration TLD2311EL EP NC ST OUT3 OUT2EN OUT1NC VS VS IN_SET3 IN_SET2 IN_SET1 8N C GND
Data Sheet 7 Rev. 1.0, 2013-08-08
3.2 Pin Definitions and Functions
1, 2 VS – Supply Voltage; battery supply, connect a decoupling capacitor (100 nF - 1 µF) to GND 3E NI Enable pin 4N C – Pin not connected
5 IN_SET3 I/O Input / SET pin 3; Connect a low power resistor to adjust the output current
6 IN_SET2 I/O Input / SET pin 2; Connect a low power resistor to adjust the output current
7 IN_SET1 I/O Input / SET pin 1; Connect a low power resistor to adjust the output current
8N C – Pin not connected 9G N D – 1) Ground 1) Connect all GND-pins together.
10 ST I/O Status pin
11 OUT1 O Output 1
12 OUT2 O Output 2
13 OUT3 O Output 3
14 NC – Pin not connected
GND – 1) Exposed Pad; connect to GND in application
Data Sheet 8 Rev. 1.0, 2013-08-08 TLD2311EL General Product Characteristics
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) 1) Not subject to production test, specified by design Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Voltages
4.1.1 Supply voltage
VS -16 40 V –
4.1.2 Input voltage EN VEN -16 40 V –
4.1.3 Input voltage EN related to VS VEN(VS) VS - 40 VS + 16 V –
4.1.4 Input voltage EN related to VOUTx
-16 40 V –
4.1.5 Output voltage VOUTx -1 40 V –
4.1.6 Power stage voltage
VPS = VS - VOUTx VPS -16 40 V – 4.1.7 IN_SETx voltage VIN_SETx -0.3 6 V – 4.1.8 Status voltage VST -0.3 6 V – Currents
4.1.9 IN_SETx current IIN_SETx –
mA – Diagnosis output
4.1.10 Output current IOUTx –1 3 0 m A –
4.1.11 Junction temperature Tj -40 150 °C–
4.1.12 Storage temperature Tstg -55 150 °C–
4.1.13 ESD resistivity to GND VESD -2 2 kV Human Body
Model (100 pF via 1.5 kΩ)2) 2) ESD susceptibility, Human Body Model “HB M” according to ANSI/ESDA/JEDEC JS-001-2011
4.1.14 ESD resistivity all pins to GND VESD -500 500 V CDM 3)
3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E
4.1.15 ESD resistivity corner pins to GND VESD -750 750 V CDM 3)
General Product Characteristics Data Sheet 9 Rev. 1.0, 2013-08-08
4.2 Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.
4.3 Thermal Resistance
Pos. Parameter Symbol Limit Values Unit Conditions Min. Max.
4.2.16 Supply voltage range for
VS(nom) 5.5 40 V –
4.2.17 Power on reset threshold VS(POR) –5V VEN = VS
RSETx =1 2k Ω IOUTx =8 0 %IOUTx(nom) VOUTx =2 . 5V
4.2.18 Junction temperature Tj -40 150 °C–
Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
4.3.1 Junction to Case RthJC –81 0 K / W 1) 2)
1) Not subject to production test, specifi ed by design. Based on simulation results. 2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W.
4.3.2 Junction to Ambient 1s0p board RthJA1
K/W 1) 3) Ta =8 5° C Ta = 135 °C 3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package) distributed statically and homogenously over all power stages.
4.3.3 Junction to Ambient 2s2p board RthJA2
K/W 1) 4) Ta =8 5° C Ta = 135 °C 4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x 35µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over all power stages.
Data Sheet 10 Rev. 1.0, 2013-08-08 TLD2311EL EN Pin 5E N P i n The EN pin is a dual function pin: Figure 3 Block Diagram EN pin Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN.
5.1 EN Function
If the voltage at the pin EN is below a threshold of VEN(off) the Basic LED Driver IC will enter Sleep mode. In this state all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at this pin enables the device after the Power on reset time tPOR. Figure 4 Power on reset VEN EN Output Control Internal Supply VEN t t 80 % tPORIOUT 100 % t VS
Data Sheet 11 Rev. 1.0, 2013-08-08
5.2 Internal Supply Pin
The EN pin can be used to supply the internal logic. There are two typical application conditions, where this feature can be used: 1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V. 2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF is used to supply the Basic LED Driver IC during Vbatt low ( Vs low) periods. This feature can be used to minimize has to be considered. The capacitor can be calculated using the following formula: (1) See also a typical application drawing in Chapter 10. Figure 5 External circuit when applying a fast PWM signal on VBATT CBUF tLOW max() IEN LS() VS VD1– VSP O R()– CBUF VBATT GND Output control OUT2 Internal supply Thermal protection Current adjust Basic LED Driver GND EN VS OUT3 OUT1 IN_SET2 IN_SET1 IN_SET3 RSET1RSET2RSET3
Data Sheet 12 Rev. 1.0, 2013-08-08 TLD2311EL EN Pin Figure 6 Typical waveforms when applying a fast PWM signal on VBATT The parameter tON(VS) is defined at Pos. 9.2.13. The parameter tOFF(VS) depends on the load and supply voltage VBATT characteristics.
5.3 EN Unused
In case of an unused EN pin, there are two different ways to connect it:
5.3.1 EN - Pull Up to VS
The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the Basic LED Driver IC is always enabled.
5.3.2 EN - Direct Connection to VS
The EN pin can be connected directly to the VS pin (I C always enabled). This configuration has the advantage (compared to the configuration described in Chapter 5.3.1) that no additional external component is required. VBATT t t 20 % 80 % tON(VS)IOUT 100 % VEN t Switch off behavior depends on VBATT and load characteristics
Data Sheet 13 Rev. 1.0, 2013-08-08
5.4 Electrical Characteristics Internal Supply / EN Pin
Electrical Characteristics Internal Supply / EN pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx =1 2k Ω all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
5.4.1 Current consumption,
IS(sleep) –0 . 12µ A 1) VEN = 0.5 V Tj < 85 °C VS = 18 V VOUTx = 3.6 V
5.4.2 Current consumption,
IS(on) 1.4 0.75 1.5 mA 2) IIN_SET = 0µ A Tj < 105 °C VS = 18 V VOUTx = 3.6V VEN =5 . 5V VEN =1 8V 1) REN = 10 kΩ between VS and EN-pin
5.4.3 Current consumption,
IS(dis,ST) 1.4 0.65 1.4 mA 2) VS = 18 V Tj < 105 °C VST = 5 V VEN =5 . 5V VEN =1 8V 1) REN = 10 kΩ between VS and EN-pin
5.4.4 Current consumption,
IN_SETx IS(dis,IN_SET) 1.4 0.7 1.4 mA 2) VS = 18 V Tj < 105 °C VIN_SETx = 5 V VEN =5 . 5V VEN =1 8V 1) REN = 10 kΩ between VS and EN-pin
5.4.5 Current consumption,
active mode in single fault detection condition with ST- pin unconnected IS(fault,STu) 1.7 1.1 1.8 mA 2) VS = 18 V Tj < 105 °C RSETx = 12 kΩ VOUTx = 18 V or 0 V VEN =5 . 5V VEN =1 8V 1) REN = 10 kΩ between VS and EN-pin
Data Sheet 14 Rev. 1.0, 2013-08-08 TLD2311EL EN Pin
5.4.6 Current consumption,
active mode in single fault detection condition with ST- pin connected to GND IS(fault,STG) 6.0 4.9 5.9 mA 2) VS = 18 V Tj < 105 °C RSET1 = 12 kΩ RSET2,3 = unconnected VOUTx = 18 V or 0 V VST = 0 V VEN =5 . 5V VEN =1 8V 1) REN = 10 kΩ between VS and EN-pin
5.4.7 Current consumption,
active mode in double fault detection condition, one output disabled via IN_SETx and with ST-pin connected to GND IS(dfault,STG) 9.0 8.4 9.0 mA 2) VS = 18 V Tj < 105 °C RSET1,2 = 12 kΩ RSET3 = unconnected VOUTx = 18 V or 0 V VST = 0 V VEN =5 . 5V VEN =1 8V 1) REN = 10 kΩ between VS and EN-pin 5.4.8 Power-on reset delay time 3) tPOR –– 2 5 µ s 1) VS = VEN =0 → 13.5 V VOUTx(nom) = 3.6 ± 0.3V IOUTx = 80% IOUTx(nom)
5.4.9 Required supply voltage for
VS(on) –– 4V VEN = 5.5 V VOUTx = 3 V IOUTx =5 0 % IOUTx(nom)
5.4.10 Required supply voltage for
VS(CC) –– 5 . 2 V VEN = 5.5 V VOUTx = 3.6 V IOUTx ≥ 90% IOUTx(nom) 5.4.11 EN turn on threshold VEN(on) –– 2 . 5 V – 5.4.12 EN turn off threshold VEN(off) 0.8 – – V –
5.4.13 EN input current during low
IEN(LS) –– 2 . 4 m A 1) VS = 4.5 V Tj < 105 °C VEN = 5.5 V
5.4.14 EN high input current IEN(H)
0.1 0.1 2.05 0.45 mA Tj < 105 °C VS = 13.5 V, VEN = 5.5 V VS = 18 V, VEN = 5.5 V VS = VEN = 18 V 1) VS = 18 V, REN = 10 kΩ between VS and EN-pin 1) Not subject to production test, specified by design 2) The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 5.4.14 Electrical Characteristics Internal Supply / EN pin (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx =1 2k Ω all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
Data Sheet 15 Rev. 1.0, 2013-08-08 3) See also Figure 4
Data Sheet 16 Rev. 1.0, 2013-08-08 TLD2311EL IN_SETx Pin
6 IN_SETx Pin
The IN_SET pin is a multiple function pin for output current definition, input and diagnostics: Figure 7 Block Diagram IN_SET pin
6.1 Output Current Ad justment via RSET
The output current of each channel can be adjusted independently. The current adjustment can be done by placing a low power resistor (RSET) at the IN_SETx pin to ground. The dimensioning of the resistor can be done using the formula below: (2) defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied device.
6.2 Smart Input Pin
The IN_SETx pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as described in Figure 8. This signal can be used to turn off t he output stages of the IC. A minimum IN_SET current of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming of LEDs caused by leakage currents on the IN_SET pin, see Figure 11 for details. In addition, the IN_SET pin offers the diagnostic feedback information, if the status pin is connected to GND. Another diagnostic possibility is shown in Figure 9, where the diagnosis information is provided via the ST pin (refer to Chapter 7 and Chapter 8) to a micro controller. In case of a fault event with the ST pin connected to GND the IN_SET voltage is increased to VIN_SET(OL/SC) Pos. 8.4.2. Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in Figure 12. Note: If one output has a present fault (open load or short circuit) and one or both of the other channels are dimmed via PWM at the IN_SET-pins a short spike to VIN_SET(OL/SC) is possible. Please refer to Chapter 8.3. IIN_SET VIN_SET(OL/SC) IN_SET GND VIN_SET Logic high impedance RSET k IOUT
Data Sheet 19 Rev. 1.0, 2013-08-08 7S T P i n The ST pin is a multiple function pin. Figure 13 Block Diagram ST pin
7.1 Diagnosis Selector
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST pin acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the internal pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is switched to If the device is operated in PWM operation via the VS and/or EN pins the ST pin should be connected to GND via a high ohmic resistor (e.g. 470kΩ) to ensure proper device behavior during fast rising VS and/or EN slopes. If the ST pin is shorted to GND the diagnostic feed back is performed via the IN_SET-pin, which is shown in Chapter 6.2 and Chapter 8.
7.2 Diagnosis Output
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as shown in Chapter 8.
7.3 Disable Input
If an external voltage higher than VST(H) (Pos. 8.4.5) is applied to the ST pin, th e device is switched off. This function is used for applications, where multiple drivers should be used for one light function. It is possible to combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is switched off. In this scenario e.g. the diagnostic circuit on th e body control module can easily distinguish between the two cases (normal load or load fault), because nearly no curren t is flowing into the LED module during the fault As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the same light function can be connected together via the ST pins. This leads to a switch off of all devices connected together. IST(OL/SC) VST ST Output ControlFaultNo fault VST(OL/SC) IST(PD) FaultNo fault
Data Sheet 20 Rev. 1.0, 2013-08-08 TLD2311EL ST Pin Figure 14 Switching times via ST Pin VST t t 20 % 80 % tON(ST) IOUT 100 % tOFF(ST)
Data Sheet 21 Rev. 1.0, 2013-08-08
8 Load Diagnosis
8.1 Open Load
An open load diagnosis feature is integrated in the TLD23 11EL driver IC. If there is an open load on one of the outputs, the respective output is turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC), if the ST is connected to GND. This high voltage can be used as input signal for an µC as shown in Figure 9. If the ST pin is open or connected to GND via a high ohmic resistor, the ST pin rises to a high potential as described in Chapter 7. More details are shown in Figure 18. The open load status is not latched, as soon as the open load condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the voltage drop over the output stage VPS is below the threshold according Pos. 8.4.10 and a filter time of tOL is passed. Figure 15 IN_SET behavior during open load condition with ST pin connected to GND t VS –V PS( OL) tOL VOUT t VF VIN_SET (r e f ) VIN _SET (OL/SC) VS VIN_SET open load occurs open load disappears tIN_SET (reset)
Data Sheet 22 Rev. 1.0, 2013-08-08 TLD2311EL Load Diagnosis Figure 16 IN_SET and ST behavior during open load condition (ST unconnected)
8.2 Short Circuit to GND detection
The TLD2311EL has an integrated SC to GND detection. If th e output stage is turned on and the voltage at the output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC, if the ST pin is connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on the ST pin according to Chapter 7 after tSC. More details are shown in Figure 18. This condition is not latched. For detecting a normal condition after a short circ uit detection an output current according to IOUT(SC) is driven by the channel. t VS –V PS(OL) tOL VOUT VF VS open load occurs open load disappears tIN _SET(reset) VST t VST (OL/SC) VIN_SET t VIN _ SET (r e f )
Data Sheet 24 Rev. 1.0, 2013-08-08 TLD2311EL Load Diagnosis
8.3 Double Fault Conditions
The TLD2311EL allows the diagnosis of each channel separat ely, as long as the ST-pin is shorted to GND. The the fault condition. For the other channel or channel s with a subsequential fault the diagnosis is reported immediately without the diagnosis f ilter time, if the filter time tOL has been elapsed for the channel with the first fault. During activation via IN_SET of a non-faulty output, where one channel has already a fault detected, a short spike to VIN_SET(OL/SC) could occur on the channel, which should be activated. Therefore, in general a diagnosis should be done earliest after the diagnosis filter times tOL and tSC to avoid any incorrect diagnosis readout. In the scenario mentioned above the turn on time tON(IN_SET) could be extended. The following figure shows the example behavior, if OUT1 has a fault and OUT2 is operated in PWM-mode. OUT3 is disabled.
Data Sheet 25 Rev. 1.0, 2013-08-08 Figure 19 Example single channel fault on OUT1 and PWM-operation on OUT2 with ST pin connected to GND t VS –V PS( OL) tOL VOUT1 t VF VIN _ SET (r ef ) VIN _ SET( OL/SC) VS VIN_SET 1 open load occurs t VOUT2 t VF VIN _ SET (r ef ) VIN _ SET( OL/SC) VIN_SET2 VOUT ( SC) turn on command IIN_SET1 t IIN_SET2 t VIN_SET( OL/SC) / RSET1 VIN_SET( r e f )/ RSET1 VIN _SET (OL/SC) / RSET 2 VIN _SET (r e f )/ RSET 2
Data Sheet 26 Rev. 1.0, 2013-08-08 TLD2311EL Load Diagnosis
8.4 Electrical Characteristics IN _SET Pin and Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx = 12 kΩ, all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
8.4.1 IN_SET reference
VIN_SET(ref) 1.19 1.23 1.27 V 1) VOUTx =3 . 6V Tj = 25...115 °C
8.4.2 IN_SET open load/short
VIN_SET(OL/SC) 4– 5 . 5 V 1) VS > 8 V Tj = 25...150 °C VS = VOUTx (OL) or VOUTx = 0 V (SC)
8.4.3 IN_SET open load/short
IIN_SET(OL/SC) 0.5 – 2.5 mA 1) VS > 8 V Tj = 25...150 °C VIN_SET = 4 V VS = VOUTx (OL) or VOUTx = 0 V (SC)
8.4.4 ST device turn on
threshold (active low) in case of voltage applied from external (ST-pin acting as input) VST(L) 0.8 – – V –
8.4.5 ST device turn off
threshold (active low) in case of voltage applied from external (ST-pin acting as input) VST(H) –– 2 . 5 V – 8.4.6 ST pull down current IST(PD) –– 1 5 µ A VEN =5 . 5V VST =0 . 8V
8.4.7 ST open load/short
circuit voltage (ST-pin acting as diagnosis output) VST(OL/SC) 4– 5 . 5 V 1) VS > 8 V Tj = 25...150 °C RST = 470 kΩ VS = VOUTx (OL) or VOUTx = 0 V (SC)
8.4.8 ST open load/short
circuit current (ST-pin acting as diagnosis output) IST(OL/SC) 100 – 220 µA 1) VS > 8 V Tj = 25...150 °C VST = 2.5 V VS = VOUTx (OL) or VOUTx = 0 V (SC)
8.4.9 OL detection filter time tOL 10 22 35 µs 1) VS >8V
8.4.10 OL detection voltage
VPS(OL) = VS - VOUTx VPS(OL) 0.2 – 0.4 V VS >8V
8.4.11 Short circuit to GND
VOUT(SC) 0.8 – 1.4 V VS >8V
8.4.12 SC detection filter time tSC 10 22 35 µs 1) VS > 8 V
Data Sheet 27 Rev. 1.0, 2013-08-08
8.4.13 IN_SET diagnosis reset
tIN_SET(reset) –5 2 0 µ s 1) VS > 8 V
8.4.14 SC detection current in
IOUT(SC,STu) 100 200 300 µA VS > 8 V VOUTx = 0 V
8.4.15 SC detection current in
IOUT(SC,STG) 0.1 2 4.75 mA VS > 8 V VOUTx = 0 V VST = 0 V
8.4.16 IN_SET activation
current without turn on of output stages IIN_SET(act) 2 – 15 µA See Figure 11 1) Not subject to production test, specified by design Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx = 12 kΩ, all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
Data Sheet 28 Rev. 1.0, 2013-08-08 TLD2311EL Power Stage
9 Power Stage
The output stages are realized as high side current sources with a current of 120 mA. During off state the leakage current at the output stage is minimized in order to prevent a slightly glowing LED. To increase the overall output current for high brightness LED applications it is possible to connect two or all three output stages in parallel. The maximum current of each channe l is limited by the power dissipation and used PCB cooling areas (which results in the applications RthJA). For an operating current control loop the supply and output voltages according to the following parameters have to be considered:
- Required supply voltage for current control VS(CC), Pos. 5.4.10
- Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6
- Required output voltage for current control VOUTx(CC), Pos. 9.2.7
9.1 Protection
The device provides embedded protective functions, wh ich are designed to prevent IC destruction under fault conditions described in this data sheet. Fault condit ions are considered as “out side” normal operating range. Protective functions are neither designed for continuous nor for repetitive operation.
9.1.1 Over Load Behavior
An over load detection circuit is integrated in the Basi c LED Driver IC. It is realized by a temperature monitoring of the output stages (OUTx). As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current will be reduced by the device by re ducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which are mounted thermally close to the de vice. If the device temper ature still increases, th e three output currents decrease close to 0 A. As soon as the device cools down the output currents rise again. Figure 20 Output current reduction at high temperature Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage (Pos. 8.4.1). In case of very high power loss applied to the device and very high junction temperature the output current may drop down to IOUTx = 0 mA, after a slight cooling down the current increases again.
9.1.2 Reverse Battery Protection
The TLD2311EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection. Tj IOUT Tj(CRT ) VIN_SET
Data Sheet 29 Rev. 1.0, 2013-08-08 Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection diode may be reasonable. The external protection circuit needs to be verified in the application.
9.2 Electrical Charact eristics Power Stage
Electrical Characteristics Power Stage Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
9.2.1 Output leakage current IOUTx(leak)
µA VEN = 5.5 V IIN_SET = 0µ A VOUTx =2 . 5V Tj = 150 °C 1) Tj = 85 °C
9.2.2 Output leakage current in
IOUTx(leak,B2B) ––5 0 µ A 1) VEN = 5.5 V IIN_SET =0µ A VOUTx = VS = 40 V
9.2.3 Reverse output current -IOUTx(rev) ––1µ A 1) VS = -16 V
Output load: LED with break down voltage <-0 . 6V
9.2.4 Output current accuracy
1)Tj = 25...115 °C VS = 8...18 V VPS = 2 V RSETx = 12 kΩ RSETx = 30 kΩ
9.2.5 Output current accuracy
VS = 8...18 V VPS = 2 V RSETx = 6...12 kΩ RSETx = 30 kΩ
9.2.6 Voltage drop over power
stage during current control VPS(CC) = VS - VOUTx VPS(CC) 0.75 – – V 1) VS = 13.5 V RSETx = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSETx)
9.2.7 Required out put voltage for
VOUTx(CC) 2.3 – – V 1) VS = 13.5 V RSETx = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSETx) 9.2.8 Maximum output current IOUT(max) 120 – – mA RSETx = 4.7 kΩ The maximum output current is limited by the thermal conditions. Please refer to
Data Sheet 30 Rev. 1.0, 2013-08-08 TLD2311EL Power Stage 9.2.9 ST turn on time tON(ST) ––1 5 µ s 2) VS = 13.5 V RSETx = 12 kΩ ST → L IOUTx = 80% of (kLT(typ)/RSETx) 9.2.10 ST turn off time tOFF(ST) ––1 0 µ s 2) VS = 13.5 V RSETx = 12 kΩ ST → H IOUTx = 20% of (kLT(typ)/RSETx) 9.2.11 IN_SET turn on time tON(IN_SET) ––1 5 µ s VS = 13.5 V IIN_SET = 0 → 100 µA IOUTx = 80% of (kLT(typ)/RSETx) No OL or SC at other channels
9.2.12 IN_SET turn off time
tOFF(IN_SET) ––1 0 µ s VS = 13.5 V IIN_SET =1 0 0→ 0µ A IOUTx = 20% of (kLT(typ)/RSETx) 9.2.13 VS turn on time tON(VS) ––2 0 µ s 1) 3) VEN =5 . 5V RSETx = 12 kΩ VS = 0 → 13.5 V IOUTx = 80% of (kLT(typ)/RSETx)
9.2.14 Current reduction
Tj(CRT) –1 4 0 –° C 1)IOUTx = 95% of (kLT(typ)/RSETx)
9.2.15 Output current during
IOUT(CRT) 85% of kLT(typ)/ RSETx) ––A 1) RSETx =1 2k Ω Tj = 150 °C 1) Not subject to production test, specified by design 2) see also Figure 14 3) see also Figure 6 Electrical Characteristics Power Stage (cont’d) Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
Application Information
Data Sheet 31 Rev. 1.0, 2013-08-08 Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Figure 21 Application Diagram with Diagnosis for each channel Note: This is a very simplified example of an application circuit. In case of high ISO-pulse requirements a reverse protection diode may be used for LED protection. The function must be verified in the real application.
10.1 Further Application Information
- For further information you may contact http://www.infineon.com/ Output control OUT2 Internal supply Thermal protection Current adjust Basic LED Driver GND EN VS IN_SET2 OUT3 OUT1 IN_SET1 IN_SET3 Status ST Micro- controller (e.g. XC866) OUT3* IN3 OUT2* IN2 OUT1* IN1 * Open Drain RSET/2 RSET/2 VBATT Cmod =2.2µF ISO-Pulse protection circuit depending on requirements CVS =4.7nF ** For EMI improvement , if required.
Data Sheet 32 Rev. 1.0, 2013-08-08 TLD2311EL Package Outlines Figure 22 PG-SSOP14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). PG-SSOP-14-1,-2,-3-PO V02 1 7 14 8 14x0.25±0.05 2) M0.15 DC A-B 0.65 C Stand Off 0 ... 0.1 (1.45) 1.7 MAX. 0.08 C A B 4.9±0.11) A-BC0.1 2x 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion Bottom View ±0.23 ±0.22.65 0.2 ±0.2 D 6 M D 8x 0.64±0.25 3.9±0.11) 0.35 x 45˚ 0.1 CD +0.06 0.19 8˚ MAX. Index Marking Exposed Diepad Dimensions in mm For further information on alternative packages, please visit our website: http://www.infineon.com/packages.
Revision History
Data Sheet 33 Rev. 1.0, 2013-08-08 Revision Date Changes 1.0 2013-08-08 Inital revision of data sheet
81726 Munich, Germany
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