TLD1124EL_15 MARL | Alldatasheet
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Technical content
Rev. 1.0, 2013-08-08 TLD1124EL
1 Channel High Side Current Source
Infineon ® Basic LED Driver
Data Sheet 2 Rev. 1.0, 2013-08-08 TLD1124EL
TLD1124EL PG-SSOP14 TLD1124EL Data Sheet 3 Rev. 1.0, 2013-08-08
Features
- 1 Channel device with integrated output stage (current source), optimized to drive LEDs
- Output current up to 360mA
- Low current consumption
- PWM-operation supported via VS-pin
- Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED protection during over temperature conditions
- Reverse polarity protection
- Overload protection
- Undervoltage detection
- Open load and short circuit to GND diagnosis
- Wide temperature range: -40 °C < T j < 150 °C
- PG-SSOP14 package with exposed heatslug
- Green Product (RoHS compliant)
- AEC Qualified
Description
The Basic LED Driver TLD1124EL is a one channel high side driver IC with integrated output stage. It is designed to control LEDs with a current up to 360 mA. In typical au tomotive applications the device is capable to drive i.e. 3 red LEDs with a current up to 180 mA, which is limit ed by thermal cooling aspects. The output current is controlled practically independent of load and supply voltage changes. Table 1 Product Summary Operating voltage VS(nom) 5.5 V… 40 V Maximum voltage VS(max) VOUT(max) 40 V Nominal output (load) current IOUT(nom) 180 mA when using a supply voltage range of 8V - 18V (e.g. Automotive car battery). Currents up to IOUT(max) possible in applications with low thermal resistance RthJA Maximum output (load) current IOUT(max) 360 mA; depending on thermal resistance RthJA Output current accuracy at RSET = 12 kΩ kLT 2250 ± 7%
Data Sheet 4 Rev. 1.0, 2013-08-08 TLD1124EL Overview Protective functions - ESD protection - Under voltage lock out - Over Load protection - Over Temperature protection - Reverse Polarity protection Diagnostic functions - Diagnosis enable function - OL detection - SC to Vs (indicated by OL diagnosis) - SC to GND detection
Applications
Designed for exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,... The device is also well suited for in terior LED lighting applications such as ambient lighting, interior illumination and dash board lighting.
Data Sheet 5 Rev. 1.0, 2013-08-08
2 Block Diagram
Figure 1 Basic Block Diagram Output control OUT Current adjust TLD1124EL GND IN_SET Status ST Internal supply Thermal protection DEN VS Diagnosis enable
Data Sheet 6 Rev. 1.0, 2013-08-08 TLD1124EL Pin Configuration
3 Pin Configuration
3.1 Pin Assignment
Figure 2 Pin Configuration TLD1124EL EP NC ST NC OUTDEN NCNC VS VS NC IN_SET NC 8N C GND
Data Sheet 7 Rev. 1.0, 2013-08-08
3.2 Pin Definitions and Functions
1, 2 VS – Supply Voltage; battery supply, connect a decoupling capacitor (100 nF - 1 µF) to GND 3D E N I Diagnosis enable pin 4N C – Pin not connected 5N C – Pin not connected
6 IN_SET I/O Input / SET pin; Connect a low power resistor to adjust the output current
7N C – Pin not connected 8N C – Pin not connected 9G N D – 1) Ground 1) Connect all GND-pins together.
10 ST I/O Status pin
11 NC – Pin not connected
12 OUT O Output
13 NC – Pin not connected
14 NC – Pin not connected
GND – 1) Exposed Pad; connect to GND in application
Data Sheet 8 Rev. 1.0, 2013-08-08 TLD1124EL General Product Characteristics
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) 1) Not subject to production test, specified by design Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Voltages
4.1.1 Supply voltage
VS -16 40 V –
4.1.2 Diagnosis enable voltage DEN VDEN -16 40 V –
4.1.3 Diagn. enable voltage DEN related to VS VDEN(VS) VS - 40 VS + 16 V – 4.1.4 Diagn. enable voltage DEN related to VOUT VDEN - VOUT VDEN - VOUT -16 40 V –
4.1.5 Output voltage VOUT -1 40 V –
4.1.6 Power stage voltage
VPS = VS - VOUT VPS -16 40 V – 4.1.7 IN_SET voltage VIN_SET -0.3 6 V – 4.1.8 Status voltage VST -0.3 6 V – Currents
4.1.9 IN_SET current IIN_SET –
mA – Diagnosis output
4.1.10 Output current IOUT –3 9 0 m A –
4.1.11 Junction temperature
Tj -40 150 °C–
4.1.12 Storage temperature Tstg -55 150 °C–
4.1.13 ESD resistivity to GND
Model (100 pF via 1.5 kΩ) 2) ESD susceptibility, Human Body Model “HB M” according to ANSI/ESDA/JEDEC JS-001-2011
4.1.14 ESD resistivity all pins to GND VESD -500 500 V CDM 3)
3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E
4.1.15 ESD resistivity corner pins to GND VESD -750 750 V CDM 3)
General Product Characteristics Data Sheet 9 Rev. 1.0, 2013-08-08
4.2 Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.
4.3 Thermal Resistance
Pos. Parameter Symbol Limit Values Unit Conditions Min. Max.
4.2.16 Supply voltage range for
VS(nom) 5.5 40 V –
4.2.17 Power on reset threshold VS(POR) –5V RSET =1 2k Ω
IOUT = 80% IOUT(nom) VOUT =2 . 5V
4.2.18 Junction temperature Tj -40 150 °C–
Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
4.3.1 Junction to Case RthJC –81 0 K / W 1) 2)
1) Not subject to production test, specifi ed by design. Based on simulation results. 2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W.
4.3.2 Junction to Ambient 1s0p board RthJA1
K/W 1) 3) Ta =8 5° C Ta = 135 °C 3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package) distributed statically and homogenously over power stage.
4.3.3 Junction to Ambient 2s2p board RthJA2
K/W 1) 4) Ta =8 5° C Ta = 135 °C 4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x 35µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over power stage.
Data Sheet 10 Rev. 1.0, 2013-08-08 TLD1124EL DEN Pin
5 DEN Pin
The DEN pin is a single function pin: Figure 3 Block Diagram DEN pin This pin is used to activate or deactivate the device internal diagnosis functions. The diagnostic functions are described in Chapter 6.2, Chapter 7 and Chapter 8. The diagnosis is activated, if the voltage applied at the DEN pin VDEN is higher than VDEN(act). The diagnosis is disabled for voltages below VDEN(dis). A possibility to use the DEN pin is via a Zener diode, which is connected between VS and DEN pin. A circuit example is shown in the application information section Chapter 10. The diagnosis is activated, if the following condition is fulfilled: (1) The current consumption on the DEN pin has to be consi dered for the total device current consumption. The current is specified in Pos. 5.1.8. The typical current consumption IDEN(H) as a function of the supply voltage VS for a Zener diode voltage of VZD = 6 V is shown in the following diagram. Figure 4 Typical IDEN(H) current for a Zener diode voltage of 6V The device and channel turn on is independent of the VDEN-voltage. After applying a supply voltage the device is activated after the power on reset time tPOR. VDEN DEN Output Control IDEN VS VDEN act() VZD+≥ 100 120 140 160 0 2 4 6 8 10 12 14 16 18 IDEN [µA] VS [V] Typical IDEN=f(VS) with (VS-VDEN)=6V Tj=-40°C Tj=25°C Tj=150°C
Data Sheet 11 Rev. 1.0, 2013-08-08 Figure 5 Power on reset The DEN voltage VDEN does not influence the disable function via the ST pin. If VDEN < VDEN(dis) the device can still be disabled via the ST pin, if VST > VST(H). For details, please refer to Chapter 7.3.
5.1 Electrical Characteristics Internal Supply / DEN Pin
Electrical Characteristics Internal Supply / DEN pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET =1 2k Ω all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
5.1.1 Current consumption,
IS(on) –– 1 . 9 m A 1) IIN_SET = 0µ A Tj < 105 °C VS = 18 V VOUT = 3.6V
5.1.2 Current consumption,
IS(dis,ST) –– 1 . 7 m A 1) VS = 18 V Tj < 105 °C VST = 5 V
5.1.3 Current consumption,
device disabled via IN_SET IS(dis,IN_SET) –– 1 . 7 m A 1) VS = 18 V Tj < 105 °C VIN_SET = 5 V
5.1.4 Current consumption,
detection condition with ST- pin unconnected IS(fault,STu) –– 2 . 1 m A 1) VS = 18 V Tj < 105 °C RSET = 12 kΩ VOUT = 18 V or 0 V
5.1.5 Current consumption,
detection condition with ST- pin connected to GND IS(fault,STG) –– 6 . 2 m A 1) VS = 18 V Tj < 105 °C RSET = 12 kΩ VOUT = 18 V or 0 V VST = 0 V t 80 % tPORIOUT 100 % VS
Data Sheet 12 Rev. 1.0, 2013-08-08 TLD1124EL DEN Pin 5.1.6 Power-on reset delay time 2) tPOR –– 2 5 µ s 3) VS =0 → 13.5 V VOUT(nom) = 3.6 ± 0.3V IOUT =8 0 %IOUT(nom)
5.1.7 Required supply voltage for
VS(CC) –– 5 . 5 V VOUT = 3.6 V IOUT ≥ 90% IOUT(nom)
5.1.8 DEN high input current IDEN(H)
0.1 0.1 0.2 0.4 mA Tj < 105 °C VS = 13.5 V, VDEN = 5.5 V VS = 18 V, VDEN = 5.5 V VS = 18 V, VDEN = 12 V VS = VDEN = 18 V
5.1.9 DEN activation threshold
(diagnosis enabled above VDEN(act))
5.1.10 DEN deactivation threshold
(diagnosis disabled below VDEN(dis)) 1) The total device current consumption is the sum of the currents IS and IDEN(H), please refer to Pos. 5.1.8 2) See also Figure 4 3) Not subject to production test, specified by design Electrical Characteristics Internal Supply / DEN pin (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET =1 2k Ω all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
IN_SET Pin Data Sheet 13 Rev. 1.0, 2013-08-08
6 IN_SET Pin
The IN_SET pin is a multiple function pin for output current definition, input and diagnostics: Figure 6 Block Diagram IN_SET pin
6.1 Output Current Ad justment via RSET
The current adjustment can be done by placing a low power resistor ( RSET) at the IN_SET pin to ground. The dimensioning of the resistor can be done using the formula below: (2) defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied device.
6.2 Smart Input Pin
The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as described in Figure 7 This signal can be used to turn off the ou tput stage of the IC. A minimum IN_SET current of IIN_SET(act) is required to turn on the output stage. This feature is implemented to prevent glimming of LEDs caused by leakage currents on the IN_SET pin, see Figure 10 for details. In addition, the IN_SET pin offers the diagnostic feedback information, if th e status pin is connected to GND and VDEN > VDEN(act) (refer to Chapter 5). Another diagnostic possibility is shown in Figure 8, where the diagnosis information is provided via the ST pin (refer to Chapter 7 and Chapter 8) to a micro controller In case of a fault event with the ST pin connected to GND the IN_SET voltage is increased to VIN_SET(OL/SC) Pos. 8.3.2. Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in Figure 11. IIN_SET VIN_SET(OL/SC) IN_SET GND VIN_SET Logic high impedance RSET k IOUT
Data Sheet 16 Rev. 1.0, 2013-08-08 TLD1124EL ST Pin 7S T P i n The ST pin is a multiple function pin. Figure 12 Block Diagram ST pin
7.1 Diagnosis Selector
If the voltage at the DEN pin VDEN is higher than VDEN(act), the diagnosis is activated. For details, please refer to Chapter 5. If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST pin acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the internal pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is switched If the device is operated in PWM operation via the VS pin the ST pin should be connected to GND via a high ohmic resistor (e.g. 470kΩ) to ensure proper device behavior during fast rising VS slope. If the ST pin is shorted to GND the diagnostic feed back is performed via the IN_SET-pin, which is shown in Chapter 6.2 and Chapter 8.
7.2 Diagnosis Output
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as a diagnostic output, if the voltage at the DEN pin is above VDEN(act). In case of a fault condition the ST pin rises its
7.3 Disable Input
If an external voltage higher than VST(H) (Pos. 8.3.5) is applied to the ST pin, th e device is switched off. This function is working independently of the voltage at t he DEN pin. Even if the diagnosis is disabled via VDEN < VDEN(dis) the disable function of the ST pin is working. This function is used for applications, where multiple drivers should be used for one light function. It is possible to combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is switched off. In this scenario e.g. the diagnostic circuit on the body control module can easily distinguish between the two cases (normal load or load fault), because nearly no current is flowing into the LED module during the fault scenario - the drivers consume a current of IS(fault,STu) IST(OL/SC) VST ST Output ControlFaultNo fault VST(OL/SC) IST(PD) FaultNo fault
Data Sheet 17 Rev. 1.0, 2013-08-08 As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the same light function can be connected together via the ST pins. This leads to a switch off of all devices connected together. Application examples are shown in Chapter 10. Figure 13 Switching times via ST Pin VST t t 20 % 80 % tON(ST) IOUT 100 % tOFF(ST)
Data Sheet 18 Rev. 1.0, 2013-08-08 TLD1124EL Load Diagnosis
8 Load Diagnosis
The diagnosis function is enabled, if the voltage at the DEN pin VDEN is above VDEN(act) as described in Chapter 5.
8.1 Open Load
An open load diagnosis feature is integrated in the TLD112 4EL driver IC. If there is an open load on the output, the output is turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC). This high voltage can be used as input signal for an µC as shown in Figure 8. The open load status is not la tched, as soon as the open load condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the voltage drop over the output stage VPS is below the th reshold according Pos. 8.3.10 and a filter time of tOL is passed. Figure 14 IN_SET behavior during open load condi tion with ST pin connected to GND and VDEN > VDEN(act) t VS –V PS( OL) tOL VOUT t VF VIN_SET (r e f ) VIN _SET (OL/SC) VS VIN_SET open load occurs open load disappears tIN_SET (reset)
Data Sheet 19 Rev. 1.0, 2013-08-08 Figure 15 IN_SET and ST behavior during open load condition (ST unconnected) and VDEN > VDEN(act)
8.2 Short Circuit to GND detection
The TLD1124EL has an integrated SC to GND detection. If th e output stage is turned on and the voltage at the output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC, if the ST pin is connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on the ST pin according to Chapter 7 after tSC. More details are shown in Figure 17. This condition is not latched. For detecting a normal condition after a short circ uit detection an output current according to IOUT(SC) is driven by the channel. t VS –V PS(OL) tOL VOUT VF VS open load occurs open load disappears tIN _SET(reset) VST t VST (OL/SC) VIN_SET t VIN _ SET (r e f )
Data Sheet 21 Rev. 1.0, 2013-08-08
8.3 Electrical Characteristics IN _SET Pin and Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, VDEN = 5.5 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
8.3.1 IN_SET reference
VIN_SET(ref) 1.19 1.23 1.27 V 1) VOUT =3 . 6V Tj = 25...115 °C
8.3.2 IN_SET open load/short
VIN_SET(OL/SC) 4– 5 . 5 V 1) VS > 8 V Tj = 25...150 °C VS = VOUT (OL) or VOUTx = 0 V (SC)
8.3.3 IN_SET open load/short
IIN_SET(OL/SC) 1.5 – 7.4 mA 1) VS > 8 V Tj = 25...150 °C VIN_SET = 4 V VS = VOUT (OL) or VOUT = 0V ( S C )
8.3.4 ST device turn on
threshold (active low) in case of voltage applied from external (ST-pin acting as input) VST(L) 0.8 – – V –
8.3.5 ST device turn off
threshold (active low) in case of voltage applied from external (ST-pin acting as input) VST(H) –– 2 . 5 V – 8.3.6 ST pull down current IST(PD) –– 1 5 µ A VST=0 . 8V
8.3.7 ST open load/short
circuit voltage (ST-pin acting as diagnosis output) VST(OL/SC) 4– 5 . 5 V 1) VS > 8 V Tj = 25...150 °C RST = 470 kΩ VS = VOUT (OL) or VOUT = 0V ( S C )
8.3.8 ST open load/short
circuit current (ST-pin acting as diagnosis output) IST(OL/SC) 100 – 220 µA 1) VS > 8 V Tj = 25...150 °C VST = 2.5 V VS = VOUT (OL) or VOUT = 0V ( S C )
8.3.9 OL detection filter time tOL 10 22 35 µs 1) VS >8V
8.3.10 OL detection voltage
VPS(OL) = VS - VOUT VPS(OL) 0.2 – 0.4 V VS >8V
8.3.11 Short circuit to GND
VOUT(SC) 0.8 – 1.4 V VS >8V
8.3.12 SC detection filter time tSC 10 22 35 µs 1) VS > 8 V
8.3.13 IN_SET diagnosis reset
tIN_SET(reset) –5 2 0 µ s 1) VS > 8 V
Data Sheet 22 Rev. 1.0, 2013-08-08 TLD1124EL Load Diagnosis
8.3.14 SC detection current in
IOUT(SC,STu) 100 200 300 µA VS > 8 V VOUT= 0 V
8.3.15 SC detection current in
IOUT(SC,STG) 0.1 2 4.75 mA VS > 8 V VOUT= 0 V VST = 0 V
8.3.16 IN_SET activation
current without turn on of output stage IIN_SET(act) 2 – 15 µA See Figure 10 1) Not subject to production test, specified by design Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, VDEN = 5.5 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
Data Sheet 23 Rev. 1.0, 2013-08-08
9 Power Stage
The output stage is realized as high side current source with a current of 360 mA. During off state the leakage current at the output stage is minimized in order to prevent a slightly glowing LED. The maximum current of the channel is limited by the power dissipation and used PCB cooling areas (which results in the applications RthJA). For an operating current control loop the supply and output voltages according to the following parameters have to be considered:
- Required supply voltage for current control VS(CC), Pos. 5.1.7
- Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6
- Required output voltage for current control VOUT(CC), Pos. 9.2.7
9.1 Protection
The device provides embedded protective functions, wh ich are designed to prevent IC destruction under fault conditions described in this data sheet. Fault condit ions are considered as “out side” normal operating range. Protective functions are neither designed for continuous nor for repetitive operation.
9.1.1 Over Load Behavior
An over load detection circuit is integrated in the Basi c LED Driver IC. It is realized by a temperature monitoring of the output stage (OUT). As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current will be reduced by the device by re ducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which are mounted thermally close to the device. If the device temperature still increases, the output current decreases close to 0 A. As soon as the device cools down the output current rises again. Figure 18 Output current reduction at high temperature Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage (Pos. 8.3.1). In case of very high power loss applied to the device and very high junction temperature the output current may drop down to IOUT = 0 mA, after a slight cooling down the current increases again.
9.1.2 Reverse Battery Protection
The TLD1124EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection. Tj IOUT Tj(CRT ) VIN_SET
Data Sheet 24 Rev. 1.0, 2013-08-08 TLD1124EL Power Stage Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection diode may be reasonable. The external protection circuit needs to be verified in the application.
9.2 Electrical Charact eristics Power Stage
Electrical Characteristics Power Stage Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUT = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
9.2.1 Output leakage current IOUT(leak)
µA IIN_SET = 0 µA VOUT =2 . 5V Tj = 150 °C 1) Tj = 85 °C
9.2.2 Output leakage current in
-IOUT(leak,B2B) ––1 5 0 µ A 1) IIN_SET =0µ A VOUT = VS = 40 V
9.2.3 Reverse output current -IOUT(rev) ––3µ A 1) VS = -16 V
Output load: LED with break down voltage <-0 . 6V
9.2.4 Output current accuracy
1)Tj = 25...115 °C VS = 8...18 V VPS = 2 V RSET = 12 kΩ RSET = 30 kΩ
9.2.5 Output current accuracy
VS = 8...18 V VPS = 2 V RSET = 6...12 kΩ RSET = 30 kΩ
9.2.6 Voltage drop over power
stage during current control VPS(CC) = VS - VOUT VPS(CC) 0.75 – – V 1) VS = 13.5 V RSET = 12 kΩ IOUT ≥ 90% of (kLT(typ)/RSET)
9.2.7 Required out put voltage for
VOUT(CC) 2.3 – – V 1) VS = 13.5 V RSET = 12 kΩ IOUT ≥ 90% of (kLT(typ)/RSET) 9.2.8 Maximum output current IOUT(max) 360 – – mA RSET = 4.7 kΩ The maximum output current is limited by the thermal conditions. Please refer to
Data Sheet 25 Rev. 1.0, 2013-08-08 9.2.9 ST turn on time tON(ST) ––1 5 µ s 2) VS = 13.5 V RSET = 12 kΩ ST → L IOUT = 80% of (kLT(typ)/RSET) 9.2.10 ST turn off time tOFF(ST) ––1 0 µ s 2) VS = 13.5 V RSET = 12 kΩ ST → H IOUT = 20% of (kLT(typ)/RSET) 9.2.11 IN_SET turn on time tON(IN_SET) ––1 5 µ s VS = 13.5 V IIN_SET = 0 → 100 µA IOUT = 80% of (kLT(typ)/RSET) 9.2.12 IN_SET turn off time tOFF(IN_SET) ––1 0 µ s VS = 13.5 V IIN_SET =1 0 0→ 0µ A IOUT = 20% of (kLT(typ)/RSET)
9.2.13 Current reduction
Tj(CRT) –1 4 0 –° C 1) IOUT = 95% of (kLT(typ)/RSET)
9.2.14 Output current during
IOUT(CRT) 85% of (kLT(typ)/ RSET) ––A 1) RSET =1 2k Ω Tj = 150 °C 1) Not subject to production test, specified by design 2) see also Figure 13 Electrical Characteristics Power Stage (cont’d) Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUT = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I ), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max.
Data Sheet 26 Rev. 1.0, 2013-08-08 TLD1124EL
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Figure 19 Application Diagram Note: This is a very simplified example of an application circuit. In case of high ISO-pulse requirements a reverse protection diode may be used for LED protection. The function must be verified in the real application.
10.1 Further Application Information
- For further information you may contact http://www.infineon.com/ RSET Microcontroller (e.g. XC866) OUT IN Light module Eventually to other Basic LED Driver 470kΩ* * In case PWM via VS is performed. For EMI improvement , if required . VBATT 4.7nF CST=100pF ** Output control OUT Current adjust Basic LED Driver GND IN_SET Status ST Internal supply Thermal protection DEN VS Diagnosis enable Cmod=2.2µF ISO-Pulse protection circuit depending on requirements CVS=4.7nF
Data Sheet 27 Rev. 1.0, 2013-08-08 Figure 20 PG-SSOP14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). PG-SSOP-14-1,-2,-3-PO V02 1 7 14 8 14x0.25±0.05 2) M0.15 DC A-B 0.65 C Stand Off 0 ... 0.1 (1.45) 1.7 MAX. 0.08 C A B 4.9±0.11) A-BC0.1 2x 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion Bottom View ±0.23 ±0.22.65 0.2 ±0.2 D 6 M D 8x 0.64±0.25 3.9±0.11) 0.35 x 45˚ 0.1 CD +0.06 0.19 8˚ MAX. Index Marking Exposed Diepad Dimensions in mm For further information on alternative packages, please visit our website: http://www.infineon.com/packages.
Data Sheet 28 Rev. 1.0, 2013-08-08 TLD1124EL
Revision History
1.0 2013-08-08 Inital revision of data sheet
81726 Munich, Germany
© 2013 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.