TECEV104

TECEV104 ANALOGTECHNOLOGIES | Alldatasheet

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1 THM2

Figure 7. Schematic of TEC Controller Evaluation Board TECEV104

Table 2 is printed on the actual TECEV104, which shows the values of VOUTMAX when X=5 (i.e. TECA1-5V-5V-D). Table 3 shows the value of VOUTMAX, which is changing with X value. Table 2. For TECA1-5V-5V-D Table 3. For TECA1-5V-XV-D

Copyrights 2000-2022, Analog Technologies, Inc. All Rights Reserved. Updated on 1/29/2022 Email: staff@analogti.com/sales@analogti.com 7 Analog Technologies TECEV104 Evaluation Board for TEC Controllers two resistors in parallel, since R I >> RD, RD//RI ≈ RD. The higher the gain, the shorter the rise time of the response, the more the overshoot and/or the undershoot will be. c. CI*RP determines the corner frequency, ω1= 1/(C I*RP), where the integral component starts picking up, as the frequency goes down. It determines the cut-off frequency below which the TEC controller will start having a large open loop gain. The higher the open loop gain, the smaller the tracking error will be. d. C D*RI determines the corner frequency, ω2=1/(CD*RI), where the differential component starts picking up (see Figure 11), as the frequency goes up. e. CD*RD determines the corner frequency, ω3=1/(CD*RD), where the differential component starts getting flat. It determines the cut-off frequency above which the TEC controller will give extra weight or gain in response. f. 1nF*RP determines the corner frequency, ω4=1/(1nF*RP), where the differential component starts rolling down. Since this frequency is way higher than being needed for controlling the TEC, ω4 does not need to be tuned. The capacitor is built into the TEC controller module, not the evaluation board. To start the tuning, turn off the differential circuit by setting C D Open. Turn W1 quickly by a small angle, back and forth, approximately 5 seconds per change. Set C I to 1uF, set R I to 1M, and increase the ratio of R P/RI as much as possible, provided the loop is stable, i.e. there are no oscillations seen in VTEC. Then, minimize C I as much as possible, provided the loop is stable. The next step is to minimize Rd and maximize C D while maintaining about 10% overshoot found in VTEC. Optimum result can be obtained after diligent and patient tuning. The tuning is fun and important. When the TEC controller is used for driving a TEC to stabilize the temperature of a diode laser, there is no need to turn on the laser diode while tuning the TEC controller. To simulate the active thermal load given by the laser diode, setting the set- point temperature lower than the room temperature is enough. For a typical laser head used in EDFA’s or laser transmitters (found in DWDM applications, for instance), R I = 1M Ω, RP = 1MΩ, CI = 470nF, CD = 2.2μF, and RD = 200kΩ. These values may vary, depending on the characteristics of a particular thermal load. To be conservative in stability, use larger C I and larger R I; to have quicker response, use smaller Rd and larger CD. The closer to the TEC the thermistor is mounted, the easier to have the loop stabilized, the shorter the rise time and the settling time of the response will be. 4. After tuning, the values of the capacitors for C D and CI can be read off the capacitor selec tion switches. The values of the resistors, R I, Rd and R P, can be measured by an Ohm- meter by connecting to the resistor pins. As seen in the photo of Figure 3, R I can be read off between TEMPOUT and CMIN test points; R D can be read off between CMIN and CDRD test points; R P can be read off between CMIN and CIRP test points. 5. After the compensation network is tuned properly, we can now adjust set-point temperature to see if the TEC controller can drive the target temperature to a certain range and with high stability. Turn the temperature set-point TEMPSET potentiometer W1 while monitoring its output voltage at TEMPSET test point (2nd row on left side of the board), watch the LED: when it turns to green, the target temperature is locked to the set-point temperature within 0.1°C or less. The relationship between the set-point voltage vs. the set-point temperature is given in the datasheet. After seeing the LED lock into the set-point temperature, VTEC should be a constant voltage as shown in the oscilloscope and the voltage between TEMPSET and TEMPOUT should be very small, less than 10mV. When a standard TEC controller is used, the 10mV represent a 0.07° temperature error. 6. Set output voltage limit. Turning switches D1, D2, and D3, up and down will set the TEC A1-5V-XV-D to different 4.0V and 5.0V. See Figure 1, 2, 3 and 7. 7. To know more parameters of the TEC controller. a. To know the actual target te mperature, use a voltage meter to measure the voltage between the TEMPOUT and the GND pins, the reading result is: target temperature = 15 °C + (TEMPOUT voltage (V))*6.67 °C for approximation (see the curve in the TEC controller data sheet). b. To know how hard the TEC is working, measure the voltage VTEC by a voltage meter or an ADC, TEC voltage = 2.5V – V VTEC. When the TEC voltage (from the calculation) is positive, it is in cooling mode; when the TEC voltage is negative, it is in heating mode. c. To try other values of capacitors not provided by the evaluation board for the capac itors in the compensation network, turn down the capacitor switches, to the “OUT” position, connect the component to the corresponding soldering pads as marked on the evaluation board, see Figure 1. d. To shut down the TEC controller, turn the Shutdown Control switch SDNG to the “Off” position, see Figure 1. e. To control the set-point temperature directly by using a DAC, set the set-point temperature POT W1 to the middle point (25°C), on which the TEMPSET is about 1.5V, the half value of the reference voltage, connect TEMPSET test point to the output of the DAC and use this formula for approximation when the input voltage is between 0V and 3V: set-point temperature ( °C) = 15 °C + (TEMPOUT voltage (V))*6.67°C. The maximum voltage allowed is V VPS (power supply). See the curve in the TEC controller data sheet.

Copyrights 2000-2022, Analog Technologies, Inc. All Rights Reserved. Updated on 1/29/2022 Email: staff@analogti.com/sales@analogti.com 8 Analog Technologies TECEV104 Evaluation Board for TEC Controllers f. To control the TEC voltage directly by using a DAC, connect VTEC to the output of the DAC and use this formula: TEC voltage = 2.5V – V VTEC (V). g. To shut down the TEC controller by using a microprocessor, turn off the Shutdown Control switch, connect SDNG test point (3rd row from the bottom side, on right side of the board) to one of its digital outputs. When pulling low, the TEC controller is shut off. When pulling high SDNG, the TEC controller is turned on. h. The evaluation schematic is given in Figure 7. Using the TEC controller for more applications not described here, and/or having any questions, please feel free to contact us. Note: This evaluation board, TECEV104, is only compatible with TEC controllers of DIP package. NOTICE 1. ATI warrants performance of its products for one year to the specifications applicable at the time of sale, except for those being damaged by excessive abuse. Products found not meeting the specifications within one year from the date of sale can be exchanged free of charge. 2. ATI reserves the right to make changes to its products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 3. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. Testing and other quality control techniques are utilized to the extent ATI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. 4. Customers are responsible for their applications using ATI components. In order to minimize risks associated with the customers’ applications, adequate design and operating safeguards must be provided by the customers to minimize inherent or procedural hazards. ATI assumes no liability for applications assistance or customer product design. 5. ATI does not warrant or represent that an y license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ATI co vering or relating to any combination, machine, or process in which such products or services might be or are used. ATI’s publication of information regarding any third party’s products or services does not constitute ATI’s approval, warranty or endorsement thereof. 6. IP (Intellectual Property) Ownership: ATI retains the ownership of full rights for special technologies and/or techniques embedded in its products, the designs for mechanics, optics, plus all modifications, improvements, and inventions made by ATI for its products and/or projects.