TCD2901D TOSHIBA | Alldatasheet
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TOSHIBA CCD IMAGE SENSOR CCD (Charge Coupled Device) The TCD2901D is a high sensitive and low dark current 10550 elements x3 line CCD color image sensor which includes CCD drive circuit and clamp circuit. The sensor is designed for scanner. The device contains a row of 10550 elements x3 line photodiodes which provide a 48 lines/mm (1200DPI) 2 across a A4 size paper. The device is operated by 5V - ——e pulse, and 12 V power supply. « ait ft FEATURES. @ Number of Image Sensing Elements : 10550 elements x 3 line @ Image Sensing Element Size : 4m by 4m on 4 um centers WDIP22-G-400-2.54D (D) @ Photo Sensing Region : High sensitive and low dark Weight : 5.2g (Typ.) current PN photodiode © Distance Between Photodiode Array : 48 4m (12 lines) PIN CONNECTIONS @ Clock : 2 phase (5V) @ Power Supply :12V Power Supply Voltage 083 082 @ Internal Circuit : Clamp circuit © Package : 22 pin CERDIP package ss ost © Color Filter : Red, Green, Blue RS op er] [19] ne MAXIMUM RATINGS (Note 1) ve [5] [ra] we CHARACTERISTIC SYMBOL RATING UNIT nc Te | NC Clock Pulse Voltage Ne Ne Shift Pulse Voltage -03~80 Vv g2a2 [a | [is] #201 Reset Pulse Voltage impo] men Clamp Pulse Voltage su cunt Power Supply Voltage =03~15 a BEE Ll Storage Temperature =25~85 (TOP VIEW) (Note 1) : All voltage are with respect to SS terminals (Ground). 980910EBA1 @ TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. Ste products described in this document are subject to the foreign exchange and foreign trade laws. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual Property or ‘other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice. 1999-07-07 1/13
9) —) df CCD ANALOG SHIFT REGISTER 2 | 2 woo falelate| Jule 051 @—<J [ came Lx] 3 Slo[o}s}-~ ove 8/818 gis (8) Pata CCD ANALOG SHIFT REGISTER 1 qq CCD ANALOG SHIFT REGISTER 4 ry . PHOTO sigie wl wg oor FT SE @ alalo CCD ANALOG SHIFT REGISTER 3 do CCD _ANALOG SHIFT REGISTER 6 ale PHOTO S1S/8 wle 03 @—<] [ came |<] FF be eo dd (R) a a 6 3 A A CGD _ANALOG SHIFT REGISTER 5 $s e RS #202 giA2_— SS. PIN NAMES [PIN No. | SYMBOL NAME | PIN No. | SYMBOL NAME Signal Output 3 (Red) Signal Output 2 (Green) [2 [ss [round —*dt at | 081 | Signal Output 1 (Glue) [3 [RS | Reset Gate [20 [0D [Power [4 | [Clamp Gate [6 [-N¢__|Won Connection | 17 | NC [Non Connection ____| [7 [Ne [Non Connection | 16 | NC [Non Connection | | 8 | ¢2A2 | Clock 2(Phase 2) | 15 | ¢2A1 | Clock 1 (phase 2) | 9 | ¢1A2__ | Clock 2(Phase 1) $1A1__[ Clock 1 (phase 1) [10 [ss [Shift Gate 3 shift Gate 1 [1 [ss [Ground StS Shi Gate 2 1999-07-07 2/13
OPTICAL / ELECTRICAL CHARACTERISTICS (Ta = 25°C, Vop = 12V, V¢ = VsH = VRS = VOP = 5V(PULSE), f¢ = 0.5 MHz, fxg = 1 MHz, tint = 11ms, LIGHT SOURCE = A LIGHT SOURCE + CMS500S FILTER (t = 1mm), LOAD RESISTANCE = 100 kQ) Sensitivity vites | (Note 2) vom Panut) | — | 15 | 20 | % | Wote 3) Photo Response Non Uniform anu) [= [3 [12 | mv _| Wore 4) | Register imbalance poe — | | | Ait 5) Saturation Output Voltage [Vsar| 23 | 35 | — | v_| (ote 6) | [Saturation Exposure ———~—S*idCSSSESS~*d COT | a6 | — | Ts | (Note 7) Dark Signal Voltage VDRK [| — [| 05 | 20 | mv _| (Note 8) Dark Signal Non Uniformity [psnu [| — | 20 | 7.0 | mv_| (Note 8) | DC Power Dissipation [P| — | 260 | 250 [mw [| Total Transfer Efficiency Lome a fe fp pd Output Impedance [zo | — | 03 | 19 [en [| DC Compensation Output Voltage | Vos | 40 | 50 | 60 | v | (Note) | [Random Nose | Np | | 08 | — | mv | Note 10)| Masking Noise [vs [=f 02 [4.0 |v _| Wiote 9) (Note 2) : Sensitivity is defined for each color of signal outputs average when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. (Note 3) : PRNU (1) is defined for each color on a single chip by the expressions below when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. Where 7% is average of total signal output and 4z is the maximum deviation from ¥. The amount of incident light is shown below. Red = 1/2-SE Green = 1/2-SE Bule = 1/4-SE (Note 4) : PRNU(3) is defined as maximum voltage with next pixels, where measured at 5% of SE (Typ.). (Note 5) : Register imbalance is defined as follows. 10549 >. lxn-x(n+1)] 10549*7 1999-07-07 3/13
(Note 6) : VsatT is defined as minimum saturation output of all effective pixels. (Note 7) : Definition of SE Vi se = AT (ix) RG (Note 8) : Vprk is defined as average dark signal voltage of all effective pixels. DSNU is defined as different voltage between VprK and VpK when Vmpk is maximum dark signal voltage. Vmpk Dsnu (Note 9) : DC signal output voltage is defined as follows. Reset Noise Voltage is defined as follows. VSN os Vs Vos ss (Note 10) : Random noise is defined as the standard deviation (sigma) of the output level difference between two adjacent effective pixels under no illumination (i.e. dark conditions) calculated by the following procedure. video output video output output waveform (effective pixels 200ns 200ns under dark condition) ee an VON IL pixel (n) eS pixel (n +1) 1999-07-07 4/13
1) Two adjacent pixels (pixel n and n+1) in one reading are fixed as measurement points. 2) Each of the output level at video output periods averaged over 200ns period to get V(n) and V(n+1). 3) V(n+1) is subtracted from V(n) to get AV. AV = V(n)-V(n+1) 4) The standard deviation of AV is calculated after procedure 2) and 3) are repeated 30 times (30 readings). _— 4 30 ; 7 30 ; 3 BW = 39, 2 4M 7 = 30 2, MAvil-aMeo 5) Procedure 2), 3) and 4) are repeated 10 times to get sigma value. 6) 10 sigma values are averaged. ee 2 = 505217 7) @ value calculated using the above procedure is observed V2 times larger than that measured relative to the ground level. So we specify random noise as follows. NDo= La 1999-07-07 5/13
CHARACTERISTIC SYMBOL | own fore. | max. | UNIT NOTE Clock Pulse Voltage [7 eve VGA [50 [55 | Vv [0 |o | 03_| ont Puke Vottege i an Reset Pulse Voltage [> “ VRS | so | 53 | v [Lo fo fos] Clamp Pulse Voltage K-—; eve VePp [| 50 [55 | Vv [oo | os] Power Supply Valtage [Woo [tia [030 vd (Note 11) : VgA“H" means the high level voltage of VgA when SH pulse is high level. CLOCK CHARACTERISTICS (Ta = 25°C) Clock Pulse Frequency Reset Pulse Frequency [tas [03 | 10 | 50_|_Mve_| Clamp Pulse Frequency [tee [03 [1.0 [50min Clock Capacitance Wore a] cpa | — | 350 | 450 | pF _| Shift Gate Capacitance [se | — | 50 | 100 | pF _| Reset Gate Capacitance [es | — | 10 [20 |F_| Clamp Gate Capacitance [ee ft 20 (Note 12) : Vop = 12V 1999-07-07 6/13
52 OEE
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2, 8 fa sH “1 ol G oa #2 np 3.5V (MAX) \\ 3.5V (MAX) rsvimin) \\1.5v(Min) Rs 118 oe #2 \\ Rs - 8 +10 oe os TT 999-07-07-—«T
TIMING REQUIREMENTS (Cont'd) CHARACTERISTIC SYMBOL ] min | (Note 13) UNIT ‘mi [ tT 0 t000 Pulse Timing of SH and #14 ee ee ce ee SH Pulse Rise Time, Fall Time a SH Pulse width [ +3 [1000 | 2000 | is 71, §2 Pulse Rise Time, Fal me | 7 [| 0 | 50] — | os] BS Pulse Rise Time, Fall Time [80 | 0 | 20 | =] ms = , a5 CP Pulse Rise Time, Fall Time [tiesto Po is © Pulse width [ea 300 rs Pulse Timing of 1A, 2A and | _wa__| 20 | a0] =| ns Pulse Timing of RS and CP [5 Ts to | ns Video Data Delay Time (Note 14) | +16, t17[ — | 30 | — | ns | Pulse Timing of SH and CP Pus To fT s00 = ts (Note 13) : TYP. is the case of fRg=1.0 MHz. (Note 14) : Load resistance is 100 kQ. (Note 15) : In line clamp operation, t9 is 70 ns (MIN.). 1999-07-07 9/13
1.0) FP | w-we| |} +f EAS
08 Pf tt tt IZ [reef]
2 |Z YIN A TT s Ziel \\E f | t Vet Tt g Ei TVA T TAT TT op i Xt TT PN TT Pet YN ET Ty RY mn eNN Snes 800 250 500 550 600 650 700 WAVE LENGTH 2 (nm) 1999-07-07 10/13
+5V 0.1 pF /25V +12V C7 0.1 wE/25V SA oc] 10 pF /25V a gat: <E =a oH i | bod déd [5] “aes (082 081 OD NC NC NC NC 2A IAT SHI. SH2 TCD2901D NEAL LICLILILIbIT +12V +5V 0.1 pi /25V Rt porecon a -o. | Rt Rt sH1 o<p 10 uF /25V SH g: TRI H 7 mee e 0s10 = o<] ono J ot
053 O STI
Ic1,2: TC74HCO4AP TR1,2,3 : 28C1815-Y RI 1502 R2 15000 1999-07-07 11/13
- Window Glass The dust and stain on the glass window of the package degrade optical performance of CCD sensor. Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or thermal shock because the glass window is easily to damage. 2. Electrostatic Breakdown Store in shorting clip or in conductive foam to avoid electrostatic breakdown. 3. Incident Light CCD sensor is sensitive to infrared light. Note that infrared light component degrades resolution and PRNU of CCD sensor. 4. Lead Frame Forming Since this package is not strong against mechanical stress, you should not reform the lead frame. We recommend to use a |C-inserter when you assemble to PCB. 1999-07-07 12/13
WDIP22-G-400-2.54D (D) Unit : mm (Note 2) 42.2 (4umx10550) 0.740.1 _ atnko 22 12 ay T a 8 . $f) 8 2 | 3 53.640.5 Z 32405 14.ATYP 0.8 i ¢ at | g 254 sasios * (Note 1) : TOP OF CHIP TO BOTTOM OF PACKAGE (Note 2) : GLASS THICKNESS (n = 1.5) (Note 3) : No.1 SENSOR ELEMENT (S1) TO CENTER OF No.1 PIN. Weight : 5.2g (Typ.) 1999-07-07 13/13