TC89101P TOSHIBA | Alldatasheet
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TOSHIBA 7¢89101/89102 SERIAL E7PROM TC89101P, TC89102P The TC89101P is a 1024-bit serial E2PROM. The TC89102P is @ 2048-bit serial E2PROM. These are fabricated with floating gate CMOS technology. Pees eo | Tca9102° 2049-bit 256 x 8-bit or 128 16-bit FEATURES PIN ASSIGNMENT (TOP VIEW) @single SV Supply oie @Low Power Dissipations serial Interface sed: eO—vee Self timed Program cycle (Built-in Timer) ‘@Ready / Busy status signal ck>C2 7 > roveusy @ Erase /Write Enable and Disable by software oi>C3 6 ors @ Erase / Write Disable for low power supply @ Program and Chip Erase co~(ls s = Gnp @User Selectable Organization 8-bit or 16-bit BLOCK DIAGRAM | | Control circuit supply Power supply Gockinput TK generator ROY / BUSY <P ore Data input DI 28 GND Ground Serial 21s i -1s LY Memory cell Data output DO interface Bis — a ZS NS (,/ Anes) http ://www.neonet.lviautoradio E-mail:juris@mailbox.neonet.v fax:¥371 7184532 24 hours
a Chip is enabled when CS is at "L” level. Set @% to”H" level before executing instructions. ax input The Di data slatched atthe rising edge of IK The data is output from DO at the falling edge of CIK. ‘TK is enabled when GS is at “L" level. Ol [>| Spertaienntea Input ‘The 16-bit organizations selected when ORG is “H" level. ‘The 8-bit organization is selected when ORG is “L" level. ROY / BUSY Output “L* level is output during program or chip erase operation. ‘GND OV (GND) OPERATIONAL DESCRIPTION 1. INSTRUCTION SET (1) 789101 [Address Command Tata [_newcion area eee ee | [reson | cattoat-o | avons eo [orre oooe | broe | pombe | [Cointan [veeeres [reese footrest td [Cynon veeveers [verse [repr eeee{ | [cewinsie [vesvesss [ wsveerrs [veer eoee] | | [ewoisabie [| sererees | sereeses [isos coooo TT | *: don’tcare
TOSHIBA 7¢89101/89102 (2) Tc89102 a LT [tes | Aowar | Aoweaso [roao oooo | [| [croc [TU ssvereee [seereeee [oors ooo [ [| [Cauyitontor [ vreseer | verresee [rot ooee] 4 | ewensvie [ssrereee [ seveeeee [oor ooo | [| [eveseeee [overerees [ios oooof fT | *: don’tcare 2. OPERATION METHOD Set CS and CLK to “H” level before executing instruction. CS changes to “L” level, then CLK is enabled and operates as the sync signal for serial /O. The DI data is latched at the rising edge of CLK. The data is output from DO at the falling edge of CLK. Execute instruction only when RDY/BUSY status signal is “H" level. However Busy Monitor instruction can be executed whenever. Uses only commands which are included in the Instruction Set listed above. (1) Read Executing Read instruction reads out the memory data at the specified address and outputs it serially from DO. (2). Program Executing Program instruction automatically starts internal rewriting of the memory date at the specified address with the input data. After Program instruction is input, CS can be set to “H” level ever while the internal rewriting process isoperating. (3) Chip Erase Executing Chip Erase instruction automatically Starts internal erasing of the memory data at all address. After Chip Erase instruction is input, GS can be set to “H" level even while the internal erasing process is operating. (4) Busy Monitor Executing Busy Monitor instruction outputs the RDY/BUSY status signal from DO. "L" level is output during Program or Chip Erase operation. “H” level is output when Program or Chip Erase operation is completed. The RDY/BUSY status signal is output until CS is switched to “H" level. (5) E/WEnable Executing EWV Enable instruction sets EW enable mode and enables Program and Chip Erase instructions. (6) EW Disable Executing E/W Disable instruction sets the EW disable mode and disables both the Program and Chip Erase instructions. Once E/W disable mode is set, E/W disable mode is held until EW Enable instruction is executed. 3. CAUTIONS WHEN TURNING THE POWER ON AND OFF (1) Afterturning the power on, wait 1ms for warm-up before executing instruction. (2) After turning the power on, set either the EW enable mode or EW disable mode. (3) If the power supply voltage is lower the approximately 3.5 V, E/W Disable instruction is automatically executed internally.
- TIMING DIAGRAMS (1) Read 256x8 i « gg —nininininininninnnnyi—ma
0 TUNNEY \\2_» 2 2 +» ST:
Roy/ ——T— ooo BUSY ee a « ge —ninfinininininininninhinyins ma o ZINN + 7222 es » BOY Note: 1C89101; A6=0 y Or 3/ oO & ee jo \\e ‘2 cont er? F; a\\ ON 2 2, oe x ore yy Oras
(2) Program 256x8 s 1} re E00, NC CACY CE 8 EB 000110117 Address Command Data
1 TTT X# Xi Xe\\e of *\\2_2 2 0 ENED 08
3 e€ 6 (eS B{ OY 4° 53 ‘3 Go é
(5) EW Enable s po Hi-Z 1 BUSY (6) EW Disable es —__ SS , ‘Command BUSY Seam S ‘3 5 2 a (QZ 3 o 3
8 QS ee] 8
ey So, JF % roe we) * ONC ly a ce
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS (GND=0V) a [ senereneeawe | we | seme RECOMMENDED OPERATING CONDITIONS | (GND=0V, Topr=0 to 70°C) ee ee Input High Voltage — c= 5 ec [0] ee D.C. CHARACTERISTICS (GND =0V, Topr=0 to 70°C) a a a Y [oumiiaamcrn [we | | en a [oe PT Te | [ies | eet wrcerirosrmercissrrecpenion | — | [roo | |
A.C. CHARACTERISTICS | (GND =OV, Vec=4.5 to 5.5V, Topr=0 to 70°C) a er [_exiwtime Sd me [enantio L_ eroieustne ws fe | eSiepuseworime Pcs ew P ee ee | soourneernns ee Se | orrptsewotine | ts |e | Tm [crower | tm ||| ea [“rerentme | ee a [oserentne we | Note: .=100 pF, Vou! Vo. =2.0V/0.8V
A.C. CHARACTERISTICS TIMING DIAGRAMS tows tess texs tess ‘0s tox aK o tooot tovor [and bo tooo Ss aK Hi-Z po 2001 aK bo Hi-Z aK Roy /BUSY tox. tox, cand
R Input —Prw-L] R aR —<w-0] Hysteresis input disable vee RDY/BUSY | Output —pe— -o Initial “High” pe an iy e s/aRES \\ 3/ VY ee 2 pio |S
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