TC820 TELCOM | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 22
Technical content
3-149TELCOM SEMICONDUCTOR, INC. GENERAL DESCRIPTION The TC820 is a 3-3/4 digit, multi-measurement system especially suited for use in portable instruments. It inte- grates a dual slope A/D converter, auto-ranging frequency counter and logic probe into a single 44-pin surface mount or 40-pin through hole package. The TC820 operates from a single 9V input voltage (battery) and features a built-in battery low flag. Function and decimal point selection are accomplished with simple logic inputs designed for direct connection to an external microcontroller or rotary switch. Ease of use, low power operation and high functional integration make the TC820 desirable in a variety of analog measurement applications. 3-3/4 DIGIT A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE
FEATURES
n Multiple Analog Measurement System — Digit A/D Converter — Frequency Counter — Logic Probe n Low Noise A/D Converter: — Differential Inputs, (1pA Bias Current) — On-Chip 50PPM/ °C Voltage Reference n Frequency Counter: — 4Mhz Maximum Input Frequency — Auto-ranging Over Four Decade Range n Logic Probe: — Two LCD Annunciators — Buzzer Driver n 3-3/4 Digit Display with Overrange Indicator n LCD Display Driver with Built-in Contrast Control n Data Hold Input for Comparison Measurements n Low Battery Detect with LCD Annunciator n Underrange and Overrange Outputs n On-Chip Buzzer Driver with Control Input n 44-Pin Plastic Flat Pack or PLCC or 40-Pin Plastic DIP Packages PEAK HOLD COMPARATOR 3-3/4 DIGIT A/D CONVERTER LOW BATTERY DETECT DECIMAL POINT DRIVERS BUZZER DRIVER FUNCTION SELECT LOGIC PROBE AUTORANGING FREQUENCY COUNTER CLOCK OSCILLATOR TRIPLE LCD DRIVERS LOW DRIFT VOLTAGE DIFFERENTIAL REFERENCE LOGIC HIGH LOGIC LOW OVERRANGE PKHOLD LOW BATT ANNUNCIATOR DRIVE DECIMAL POINT SELECT BUZZER CONTROL FUNCTION SELECT DIGITAL GROUND TO LCD AND BUZZER PEAK HOLD LOGIC PROBE INPUT FREQUENCY INPUT FULL-SCALE SELECT UNDERRANGE OVERRANGE ANALOG GND VOLTS FREQUENCY LOGIC TRIPLEX LCD TC820 ANALOG INPUT EOC FUNCTIONAL BLOCK DIAGRAM
ORDERING INFORMATION
Part No. Resolution Package Range TC820CKW 3-3/4 Digits 44-Pin Plastic 0 °C to +70°C Quad Flat Package TC820CLW 3-3/4 Digits 44-Pin Plastic 0 °C to +70°C Leadless Chip Carrier TC820CPL 3-3/4 Digits 40-Pin Plastic DIP 0°C to +70°C TC820-10 10/17/96 TC820
3-150 TELCOM SEMICONDUCTOR, INC. 3-3/4 DIGIT A/D CONVERTER WITH FREQUENCY AND LOGIC PROBE TC820 A "peak reading hold" input allows the TC820 to retain the highest A/D or frequency reading. This feature is useful in measuring motor starting current, maximum tempera- ture, and similar applications. A family of instruments can be created with the TC820. No additional design effort is required to create instruments with 3-3/4 digit resolution. The TC820 operates from a single 9V battery, with typical power of 10 mW. Packages include a 40-pin plastic DIP, 44-pin plastic flat package, and 44-pin PLCC. COMPETITIVE EVALUATION Features Comparison TC820 7106 3-3/4 Digit Resolution Yes No Auto-Ranging Frequency Counter Yes No Logic Probe Yes No Decimal Point Drive Yes No Peak Reading Hold Yes No (Frequency or Voltage) Display Hold Yes No Simple 10:1 Range Change Yes No Buzzer Drive Yes No Low Battery Detection Yes No With Annunciator Overrange Detection Yes No With Annunciator Low Drift Reference Yes No Underrange/Overrange Yes No Logic Output Input Overload Display "OL" "1" LCD Annunciator Driver Yes No LCD Drive Type Triplexed Direct LCD Pin Connections 15 24 LCD Elements 36 23 GENERAL DESCRIPTION The TC820 is a 3-3/4 digit measurement system com- bining an integrating analog-to-digital converter, frequency counter, and logic level tester in a single package. The TC820 supersedes the TC7106 in new designs by improv- ing performance and reducing system cost. The TC820 adds features that are difficult, expensive, or impossible to provide with older A/D converters (see the competitive evaluation). The high level of integration permits TC820- based instruments to deliver higher performance and more features, while actually reducing parts count. Fabricated in low-power CMOS, the TC820 directly drives a 3-3/4 digit (3999 maximum) LCD. With a maximum range of 3999 counts, the TC820 provides 10 times greater resolution in the 200mV to 400mV range than traditional 3-1/2 digit meters. An auto-zero cycle guarantees a zero reading with a 0V input. CMOS process- ing reduces analog input bias current to only 1pA. Rollover error (the difference in readings for equal magnitude but opposite polarity input signals) is less than ±1 count. Differ- ential reference inputs permit ratiometric measurements for ohms or bridge transducer applications. The TC820's frequency counter option simplifies design of an instrument well-suited to both analog and digital troubleshooting: voltage, current, and resistance measure- ments, plus precise frequency measurements to 4MHz (higher frequencies can be measured with an external prescaler), and a simple logic probe. The frequency counter will automatically adjust its range to match the input fre- quency, over a four-decade range. Two logic level measurement inputs permit a TC820- based meter to function as a logic probe. When combined with external level shifters, the TC820 will display logic levels on the LCD and also turn on a piezoelectric buzzer when the measured logic level is low. Other TC820 features simplify instrument design and reduce parts count. On-chip decimal point drivers are in- cluded, as is a low battery detection annunciator. A piezo- electric buzzer can be controlled with an external switch or by the logic probe inputs. Two oscillator options are pro- vided: A crystal can be used if high accuracy frequency measurements are desired, or a simple RC option can be used for low-end instruments.
3-151TELCOM SEMICONDUCTOR, INC. ELECTRICAL CHARACTERISTICS: VS = 9V, TA = 25°C, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Units Zero Input Reading V IN = 0V – 000 ±000 +000 Digital Full Scale = 400 mV Reading RE Roll-Over Error V IN = ±390mV – 1 ±0.2 +1 Counts Full-Scale = 400mV NL Nonlinearity (Maximum Full-Scale = 400mV – 1 ±0.2 +1 Count Deviation From Best Straight Line Fit) Ratiometric Reading V IN = VREF , TC820 1999 1999/2000 2000 Digital CMRR Common-Mode Rejection V CM = ±1V, VIN = 0V — 50 — µV/V Ratio Full-Scale = 400mV (VFS = 200 mV) VCMR Common-Mode Voltage Input High, Input Low V SS + 1.5 — V DD – 1 V Range eN Noise (P-P Value Not V IN = 0V — 15 — µV Exceeded 95% of Time) Full-Scale = 400mV IIN Input Leakage Current V IN = 0V TA = 25°C— 1 1 0 p A VCOM Analog Common Voltage 25 k Ω Between Common and VDD (VSS – VCOM ) 3.15 3.3 3.45 V VCTC Common Voltage 25 k Ω Between Common and VDD Temperature Coefficient 0 °C ≤ TA ≤ +70°C — 35 50 ppm/ °C TC ZS Zero Reading Drift V IN = 0V TC FS Scale Factor V IN = 399mV Temperature Coefficient 0 °C ≤ TA ≤ +70°C — 1 5 ppm/ °C Ext Ref = 0 ppm/°C IS Supply Current V IN = 0V — 1 1.5 mA Peak-to-Peak Backplane V S = 9V 4.25 4.7 5.3 V Drive Voltage V DISP = DGND ABSOLUTE MAXIMUM RATINGS* Analog Input Voltage (Either Input) (Note 1) .... VDD to VSS Package Power Dissipation (TA ≤ 70°C) (Note 2) Operating Temperature Range *Static-sensitive devices. Unused devices should be stored in conductive material to protect against static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. NOTES: 1. Input voltages may exceed the supply voltages provided that input current is limited to ±100µA. Current above this value may result in invalid display readings but will not destroy the device if limited to ±1mA. 2. Dissipation ratings assume device is mounted with all leads soldered to printed circuit board. TC820 3-3/4 DIGIT A/D CONVERTER WITH FREQUENCY AND LOGIC PROBE
3-152 TELCOM SEMICONDUCTOR, INC. ELECTRICAL CHARACTERISTICS (Cont.) Symbol Parameter Test Conditions Min Typ Max Units Buzzer Frequency f OSC = 40kHz — 5 — kHz Counter Timebase Period f OSC = 40kHz — 1 — Second Low Battery Flag Voltage V DD to VSS 6.7 7 7.3 V VIL Input Low Voltage — — DGND + 1.5 V VIH Input High Voltage V DD – 1.5 — — V VOL Output Low Voltage, I L = 50µA — — DGND + 0.4 V UR, OR Outputs VOL Output High Voltage, I L = 50µAV DD – 1.5 — — V UR, OR Outputs Control Pin V IN = VDD —5 — µA Pull-Down Current PIN DESCRIPTION Pin No. Pin No. (40-Pin (44-Pin Flat Package) Package) Symbol Description 1 40 L-E4 LCD segment driver for L ("logic LOW"), polarity, and "e" segment of most significant digit (MSD). 2 41 AGD4 LCD segment drive for "a," "g," and "d" segments of MSD. 3 42 BC4P3 LCD segment drive for "b" and "c" segments of MSD and decimal point 3. 4 43 HFE3 LCD segment drive for H ("logic HIGH"), and "f" and "e" segments of third LSD. 5 44 AGD3 LCD segment drive for "a," "g," and "d" segments of third LSD. 6 1 BC3P2 LCD segment drive for "b" and "c" segments of third LSD and decimal point 2. 7 2 OFE2 LCD segment drive for "overrange," and "f" and "e" segments of second LSD. 8 3 AGD2 LCD segment drive for "a," "g," and "d" segments of second LSD. 9 4 BC2P1 LCD segment drive for "b " and "c" segments of second LSD and decimal point 1. 10 5 PKFE1 LCD segment drive for "hold peak reading," and "f" and "e" segments of LSD. 11 6 AGD1 LCD segment drive for "a," "g," and "d" segments of LSD. 12 7 BC1BT LCD segment drive for "b" and "c" segments of LSD and "low battery." 13 8 BP3 LCD backplane #3. 14 9 BP2 LCD backplane #2. 15 10 BP1 LCD backplane #1. —1 1 V DISP Sets peak LCD drive signal: VPEAK = (VDD ) –VDISP. VDISP may also be used to compensate for temperature variation of LCD crystal threshold voltage. 16 12 DGND Internal logic digital ground, the logic "0" level. Nominally 4.7V below V DD . 17 13 ANNUNC Square-wave output at the backplane frequency, synchronized to BP1. ANNUNC can be used to control display annunciators. Connecting an LCD segment to ANNUNC turns it on; connecting it to its backplane turns it off. 18 14 LOGIC Logic mode control input. When connected to V DD , the converter is in logic mode. The LCD displays "OL" and the decimal point inputs control the HIGH and LOW annunciators. When the "low" annunciator is on, the buzzer will also be on. When unconnected or connected to DGND, the TC820 is in the voltage/frequency measurement mode. This pin has a 5µA internal pull-down to DGND. 19 15 RANGE/ Dual-purpose input. In range mode, when connected to V DD , the integration time FREQ will be 200 counts instead of 2000 counts and the LCD will display the analog input divided by 10. (See text for limitation with TC820.) In frequency mode, this pin is the frequency input. A digital signal applied to this pin will be measured with a 1-second time base. There is an internal 5µA pull-down to DGND. 3-3/4 A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE TC820
3-153TELCOM SEMICONDUCTOR, INC. PIN DESCRIPTION Pin No. Pin No. (40-Pin (44-Pin Flat Package) Package) Symbol Description 20 16 DP0/LO Dual-purpose input. Decimal point select input for voltage measurements. In logic mode, connecting this pin to VDD will turn on the "low" LCD segment. There is an internal 5µA pull-down to DGND in volts mode only. Decimal point logic: DP1 DP0 Decimal Point Selected 0 0 None 0 1 DP1 1 0 DP2 1 1 DP3 21 17 DP1/HI Dual-purpose input. Decimal point select input for voltage measurements. In logic mode, connecting this pin to VDD will turn on the "high" LCD segment. There is an internal 5µA pull-down to DGND in volts mode only. 22 18 BUZOUT Buzzer output. Audio frequency, 5kHz, output which drives a piezoelectric buzzer. 23 19 BUZIN Buzzer control input. Connecting BUZIN to V DD turns the buzzer on. BUZIN is logically ORed (internally) with the "logic level low" input. There is an internal 5µA pull-down to DGND. 24 20 FREQ/ Voltage or frequency measurement select input. When unconnected, or connected VOLTS to DGND, the A/D converter function is active. When connected to VDD , the frequency counter function is active. This pin has an internal 5µA pull-down to DGND. 25 21 PKHOLD Peak hold input. When connected to V DD , the converter will only update the display if a new conversion value is greater than the preceding value. Thus, the peak reading will be stored and held indefinitely. When unconnected, or connected to DGND, the converter will operate normally. This pin has an internal 5µA pull-down to DGND. 22 UR Underrange output. This output will be HIGH when the digital reading is 380 counts or less. 23 OR Overrange output. This output will be HIGH when the analog signal input is greater than full scale. The LCD will display "OL" when the input is overranged. 26 24 V SS Negative supply connection. Connect to negative terminal of 9V battery. 27 25 COM Analog circuit ground reference point. Nominally 3.3V below V DD . 28 26 C +REF Positive connection for reference capacitor. 29 27 C –REF Negative connection for reference capacitor. 30 28 V +REF High differential reference input connection. 31 29 V –REF Low differential reference input connection. 32 30 V –IN Low analog input signal connection. 33 31 V +IN High analog input signal connection. 34 32 V BUFF Buffer output. Connect to integration resistor. 35 33 C AZ Auto-zero capacitor connection. 36 34 V INT Integrator output. Connect to integration capacitor. 35 EOC/ Bidirectional pin. Pulses low (i.e., from V DD to DGND) at the end of each HOLD conversion. If connected to VDD , conversions will continue, but the display is not updated. 37 36 OSC1 Crystal oscillator (input) connection. 38 37 OSC2 Crystal oscillator (output) connection. 39 38 OSC3 RC oscillator connection. 40 39 V DD Positive power supply connection, typically 9V. TC820 3-3/4 A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE
3-154 TELCOM SEMICONDUCTOR, INC. 3-3/4 A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE TC820 PIN CONFIGURATIONS TC820CPL OSC1 OSC2 OSC3 C REF COM V PK HOLD FREQ/VOLTS BUZ IN BUZ OUT DP1/HIDP0/LO 1 C 12 13 14 15 17 18 44 43 42 41 39 3840 AGD3 37 36 35 INT 34 V 19 20 21 22 268 259 2410 2311 BC3P2 DGND 7 C 18 19 20 21 23 24 UR 6543 1 4 4 2 AGD3 AGD4 OSC3 OSC2
42 OSC1
41 EOC/HOLD
C – REF V REF V – REF V – IN V IN V BUFF C AZ V INT VDD RANGE/FREQ LOGIC ANNUNC DGND BP1 BP2 BP3 SEGMENTS BC1BT SEGMENTS AGD1 SEGMENTS PKFE1 SEGMENTS BCP1 SEGMENTS AGD2 SEGMENTS OFE2 SEGMENTS BC3P2 SEGMENTS AGD3 SEGMENTS HFE3 SEGMENTS BC4P3 SEGMENTS AGD4 SEGMENTS L-E4 L-E4 VDD INT AZ V + IN V – IN V – REF V + REF C – REF C + REF COM VSS OR PK HOLD FREQ/VOLTS BUZ IN BUZ OUT DP1/HI DP0/LO RANGE/FREQ LOGIC ANNUNC DGND BP1 BP2 BP3 BP1BT BC3P2 OFE2 AGD2 BC2P1 PKFE1 AGD1 L–E4 AZ UR PK HOLD AGD2 OFE2 V DISP BCP2P1 PKFE1 BP2 OSC1 VSS OR COM CREF BC4P3 OSC3 OSC2 EOC/HOLD ANNUNC FREQ/VOLTS BUZ IN BUZ OUT DP1/HI DP0/LO RANGE/FREQ LOGIC BP1 BP3 BP1BT AGD1 VBUFF V + IN V – IN V – REF V + REF C – REF HFE3 AGD4 VDD
3-155TELCOM SEMICONDUCTOR, INC. TC820 3-3/4 A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE FUNCTIONAL BLOCK DIAGRAM RANGE/FREQ INPUT TRIPLEX DRIVERS DISPLAY LATCH COMPARATOR A > B A/D COUNTER (3999 COUNTS) LOGIC LOW LOGIC DP0/LO DP1/HI RANGE/ FREQ FREQ/ VOLTS BUZZER DRIVER BUZ IN LOGIC LOW OSC3OSC2OSC1 FREQUENCY COUNTER INPUT A/D COUNTER SELECT RANGE SEL B A LOW BATT LOW BATT DETECT A/D CONTROL DEINT UNDERRANGE OVERRANGE RANGE EOC DGND UR OR EOC/ HOLD PEAK HOLD ANNUNC SEG0 • • • BP3VDISP TO LCD VINTCAZ COMMON VDD VSS V + REF V – REF TC820 V + IN V – IN C + REF C – REF VBUFF
3-156 TELCOM SEMICONDUCTOR, INC. directly proportional to the unknown input voltage (VIN).
1.2 VFULL SCALE
Figure 2. Basic Dual-Slope Converter Figure 1. Typical Operating Circuit
3-157TELCOM SEMICONDUCTOR, INC. set to a multiple of the 50/60Hz power line period. Figure 3. Normal-Mode Rejection of Dual-Slope Converter zero reading is assured without any external adjustments. 500 counts plus the unused deintegrate counts. IN– should be tied to analog common. noise and auto-zero residual offsets.
3-158 TELCOM SEMICONDUCTOR, INC. 3-3/4 A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE TC820 Peak Reading Hold The TC820 provides the capability of holding the highest (or peak) reading. Connecting the PK HOLD input to VDD enables the peak hold feature. At the end of each conversion the contents of the TC820 counter is compared to the contents of the display register. If the new reading is higher than the reading being displayed, the higher reading is transferred to the display register. A "higher" reading is defined as the reading with the higher absolute value. The peak reading is held in the display register so the reading will not "droop" or slowly decay with time. The held reading will be retained until a higher reading occurs, the PK HOLD input is disconnected from V DD , or power is removed. The peak signal to be measured must be present during the TC820 signal integrate period. The TC820 does not perform transient peak detection of the analog input signal. However, in many cases, such as measuring temperature or electric motor starting current, the TC820 "acquisition time" will not be a limitation. If true peak detection is required, a simple circuit will suffice. See the applications section for details. The peak reading function is also available when the TC820 is in the frequency counter mode. The counter auto- ranging feature is disabled when peak reading hold is selected. 10:1 Range Change The analog input full-scale range can be changed with the RANGE/FREQ input. Normally, RANGE/FREQ is held low by an internal pulldown. Connecting this pin to V S+ will increase the full-scale voltage by a factor of 10. No external component changes are required. The RANGE/FREQ input operates by changing the integrate period. When RANGE/FREQ is connected to V DD , the signal integration phase of the conversion is reduced by a factor of 10 (i.e., from 2000 counts to 200 counts). For the TC820, the 10:1 range change will result in ±4V full scale. This full-scale range will exceed the common- mode range of the input buffer when operating from a 9V battery. If range changing is required for the TC820, a higher supply voltage can be provided or the input voltage can be divided by 2 externally. Frequency Counter In addition to serving as an analog-to-digital converter, the TC820 internal counter can also function as a frequency counter (Figure 4). In the counter mode, pulses at the RANGE/FREQ input will be counted and displayed. The frequency counter derives its time base from the clock oscillator. The counter time base is: t COUNT = fOSC 40,000 Reference Integrate (Deintegrate) Phase The reference capacitor, which was charged during the auto-zero phase, is connected to the input of the integrating amplifier. The internal sign logic ensures the polarity of the reference voltage is always connected in the phase opposite to that of the input voltage. This causes the integrator to ramp back to zero at a constant rate determined by the reference potential. The amount of time required (T DEINT ) for the integrating amplifier to reach zero is directly proportional to the ampli- tude of the voltage that was put on the integrating capacitor INT) during the integration phase: tDEINT = The digital reading displayed by the TC820 is: Digital Count = 2000 System Timing The oscillator frequency is divided by 2 prior to clocking the internal decade counters. The four-phase measurement cycle takes a total of 8000 (4000) counts or 16000 clock pulses. The 8000 count phase is independent of input signal magnitude or polarity. Each phase of the measurement cycle has the following length: Conversion Phase Counts 1) Auto-Zero: 1500 2) Signal Integrate:1,2 2000 3) Reference Integrate: 1 to 4001 4) Integrator Output Zero: 499 to 4499 NOTES: 1. This time period is fixed. The integration period for the TC820 is: tINT (TC820) = = 2000 counts where fOSC is the clock oscillator frequency. 2. Times shown are the RANGE/FREQ at logic low (normal operation). When RANGE/FREQ is logic high, signal integrate times are 200 counts. See "10:1 Range Change" section. R INT CINT VINT VREF V+IN – V–IN VREF Input Overrange When the analog input is greater than full scale, the LCD will display "OL" and the "OVERRANGE" LCD annunciator will be on. 4000 f OSC
3-159TELCOM SEMICONDUCTOR, INC. immediately display the frequency at the logic probe input. set automatically in the frequency mode (Figure 5). shifters/buffers are recommended for the logic probe inputs. Figure 4. TC820 Counter Operation
3-162 TELCOM SEMICONDUCTOR, INC.
1 Frequency 0 Frequency Counter
Figure 9. Common-Mode Voltage Reduces Available internal 5µA pull-down to DGND. internal 5 µA pull-down to DGND. DD – 3.3V gives a 7V end-of-battery-life voltage. cases, because of the 35ppm/°C temperature coefficient. See the applications section for details. low logic level is ≤ DGND +1.5V. changing external components. points. The decimal point truth table is shown in Table II. the voltage/frequency measurement mode is active.
3-166 TELCOM SEMICONDUCTOR, INC. Figure 17. System Clock Generation roll-over error. A polypropylene capacitor is recommended. supply 40µA drive currents with negligible linearity errors. the input signal be twice the reference voltage. NOTES: 1. TC820 in A/D converter mode, RANGE/FREQ = logic low. FS > 2V may exceed the input common mode range. See "10:1 Range Change" section.
- Full-scale voltage values are not limited to the values
ever the supply potential is greater than approximately 7V. reference begins to lose regulation. The TC820 can also operate with an external reference. reference voltage is needed.
4000 VFS
3-170 TELCOM SEMICONDUCTOR, INC. NOTE: Pin numbers shown are for 44-pin flat package. Figure 27. Temperature-Compensating Circuits