TC7211AM

TC7211AM TELCOM | Alldatasheet

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Technical content

6-7TELCOM SEMICONDUCTOR, INC. TC7211AM BUS COMPATIBLE 4-DIGIT CMOS DECODER/DRIVER

FEATURES

n 4-Digit Non-Multiplexed 7-Segment LCD Outputs With Backplane Driver n Input and Digit Select Data Latches n RC Oscillator On-Chip Generates Backplane Drive Signal n Eliminates DC Bias Which Degrades LCD Life n Backplane Input/Output Pin Permits Synchronization of Cascaded Slave Device to a Master Backplane Signal n Binary and BCD Inputs Decoded to Code B (0 to 9, —, E, H, L, P, Blank) n Pin Compatible and Functionally Equivalent to ICM7211AM GENERAL DESCRIPTION The TC7211AM (LCD Decoder/driver) is a CMOS di- rect drive, 4-digit, 7-segment display decoder and driver. The TC7211AM drives conventional LCDs. An RC os- cillator, divider chain, backplane driver, and 28-segment outputs are provided on a single CMOS chip. The segment drivers supply square waves of the same frequency as the backplane, but in-phase for an OFF segment and out-of- phase for an ON segment. The net DC voltage applied between driver segment and backplane is near zero maxi- mizing display lifetime. The four bit binary input is decoded into the seven segment alphanumeric code known as "Code B". The "Code B" output format results in a 0 to 9,—, E, H, L, P or blank display. True BCD or binary inputs will be correctly de- coded to the seven segment display format.

ORDERING INFORMATION

Part No. Type Package Code Config. Data and TC7211AMIPL LCD 40-Pin Code B Digit Select Plastic DIP Latches PIN CONFIGURATIONS TC7211AM-4 11/14/96 TC7211AM (LCD) OSCILLATOR V + BP GND B4A4 DATA INPUTS CHIP SELECT 2 (CS2) CHIP SELECT 1 (CS1) DIGIT SELECT 2 (DS2 DIGIT SELECT 1 (DS1

6-8 TELCOM SEMICONDUCTOR, INC. BUS COMPATIBLE, 4-DIGIT CMOS DECODER/DRIVER TC7211AM FUNCTIONAL BLOCK DIAGRAM SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS ENABLE DETECTOR OSCILLATOR (16 kHz FREE- RUNNING) ÷128 BACK – PLANE DRIVER ENABLE BACKPLANE (INPUT/OUTPUT) GND DATA INPUTS DIGIT SELECT INPUTS TC7211AM PROGRAMMABLE 4-TO-7 DECODER PROGRAMMABLE 4-TO-7 DECODER PROGRAMMABLE 4-TO-7 DECODER PROGRAMMABLE 4-TO-7 DECODER

7 WIDE

6-9TELCOM SEMICONDUCTOR, INC. Symbol Parameter Test Conditions Min Typ Max Unit VSUP Operating Voltage Range 3 5 6 V IOP Operating Current Display Blank — 10 50 µA IOSCI Oscillator Input Current Pin 36 — ±2 ±10 µA tRFS Segment Rise/Fall Time C L = 200 pF — 0.5 — µsec tRFB Backplane Rise/Fall Time C L = 5000 pF — 1.5 — µsec fOSC Oscillator Frequency Pin 36 Floating — 16 — kHz fBP Backplane Frequency Pin 36 Floating — 125 — Hz Input Characteristics VIH Logic “1” High Input Voltage 3 — — V VIL Logic “0” Low Input Voltage — — 1 V IILK Input Leakage Current Pins 27–34 — ±0.01 ±1 µA C IN Input Capacitance Pins 27–34 — 5 — pF IBPLK BP Input Current Measured at Pin 5 With — ±0.01 ±1 µA Leakage Pin 36 at GND C BPI BP Input Capacitance All Devices — 200 — pF AC Characteristics Symbol Parameter Test Conditions tCSA Chip Select Active Pulse Width (Note 1) 200 — — nsec tDS Data Setup Time 100 — — nsec tDH Data Hold Time 10 0 — nsec tICS Inter-Chip Select Time 2 — — µsec NOTE: 1. Other chip select (CS) is either held at logic zero or both CS1 and CS2 driven together. *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. NOTES: 1. This limit refers to that of the package and will not be realized during normal operation. 2. Due to the SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than V + or less than GND may cause destructive latch-up. For this reason, it is recommended that inputs from external sources not oper- ating on the same power supply not be applied to the device before its supply is established, and, in multiple supply systems, the supply to the TC7211AM be turned on first. ABSOLUTE MAXIMUM RATINGS* Input Voltage, Any Terminal TYPICAL CHARACTERISTICS: All parameters measured with V+ = 5V, TA = 25°C BUS COMPATIBLE, 4-DIGIT CMOS DECODER/DRIVER TC7211AM

6-10 TELCOM SEMICONDUCTOR, INC. TIMING DIAGRAMS Figure 2: LCD Display Waveforms

128 CYCLES

/#03 /#05/#06 /#07 /#08 /, /#01/#02/#03 /#04 /#05/#06 /#07 /#07/#08 /, /#01/#02/#03 /#04 /#05/#06 /#08 /#01/#02/#05 /#07/#08 CS1 (CS2) CS2 (CS1) DATA AND DIGIT SELECT CODE DON’T CARE Figure 1: BUS Interface Timing Diagram BUS COMPATIBLE, 4-DIGIT CMOS DECODER/DRIVER TC7211AM

6-11TELCOM SEMICONDUCTOR, INC. INPUT DEFINITIONS In this table, V+ and GND are considered to be normal operating input logic levels. For lowest power consumption, input signals should swing over the full supply. Input Pin No. Condition Function B0 27 V + = Logic “1” GND = Logic “0” Ones (Least Significant) B1 28 V + = Logic “1” GND = Logic “0” Twos B2 29 V + = Logic “1” GND = Logic “0” Fours B3 30 V + = Logic “1” GND = Logic “0” Eights (Most Significant) OSC 36 Floating or with Oscillator input. Disables BP output devices, allowing segments to be external capacitor GND synchronized to an external signal input at the BP terminal (pin 5) DS1 31 V + = Logical One DS2, DS1 = 00 Selects D4 DS2, DS1 = 01 Selects D3 DS2 32 GND = Logical Zero DS2, DS1 = 10 Selects D2 DS2, DS1 = 11 Selects D1 CS1 33 V + = Inactive When both CS1 and CS2 are LOW, the data and digit select input latches are open or enabled. CS2 34 GND = Active On the rising of CS1 or CS2, data is latched, decoded and stored in the output drive latches. BUS COMPATIBLE, 4-DIGIT CMOS DECODER/DRIVER TC7211AM Digit Select Inputs DIGIT ASSIGNMENT OUTPUT DEFINITIONS Output pins are defined by the alphabetical segment assignment and numerical digital assignment. Output Pin No. Function Output Pin No. Function A1 37 A Segment Drive Digit 1 (LSD) A3 13 A Segment Drive Digit 3 B1 38 B B3 14 B C1 39 C C3 15 C D1 40 D D3 16 D E1 2 E E3 17 E F1 4 F F3 19 F G1 3 G G3 18 G A2 6 A Segment Drive Digit 2 A4 20 A Segment Drive Digit 4 (MSD) B2 7 B B4 21 B C2 8 C C4 22 C D2 9 D D4 23 D E2 10 E E4 24 E F2 12 F F4 26 F G2 11 G G4 25 G Data Input Bits G A B C F E D D4 D3 D2 D1

6-12 TELCOM SEMICONDUCTOR, INC. BUS COMPATIBLE, 4-DIGIT CMOS DECODER/DRIVER TC7211AM If more than four devices are slaved together, the backplane signal should be derived externally and all TC7211AM devices slaved to it. The external drive signal must drive a high capacitive load with 1µsec to 2 µsec rise and fall times. The backplane frequency is normally 125 Hz. At lower display ambient temperatures, the frequency may be reduced to compensate for display response time. The on-chip RC oscillator free-runs at approximately 16 kHz. A divide-by 128 circuit provides the 125 Hz backplane frequency. The oscillator frequency may be reduced by connecting an external capacitor between the oscillator terminal and V +. (See typical operating characteristics curves.) The free-running oscillator may be overridden (if de- sired) by an external clock. The backplane driver, however, must not be disabled during the external clock’s negative or lOW portion, as this will result in a DC drive component being applied to the LCD, limiting the LCD’s life. To prevent backplane driver disabling, the oscillator input should be driven from the positive supply to no less than one-fifth the supply voltage above ground. A backplane disable signal will not be sensed if the driving signal remains above ground by one-fifth the supply voltage. An alternate method for externally driving the oscillator permits the oscillator input to swing the full supply voltage range. The oscillator input signal duty cycle is skewed so the LOW BASIC OPERATION The TC7211AM drives 4-digit, 7-segment LCDs. This device contains 28 individual segment drivers, a backplane driver, a self-contained oscillator, and a divider chain to generate the backplane signal. The 28 CMOS segment drivers and backplane driver contain ratioed N- and P-channel transistors for identical ON resistance. The equal resistances eliminate the DC output driver component resulting from unequal rise and fall times. This ensures maximum LCD life. The backplane output driver can be disabled by ground- ing the OSCILLATOR input (pin 36). The 28 output segment drivers can therefore be synchronized directly to an input signal at the backplane (BP) terminal (pin 5). Several slave devices may be cascaded to the backplane output of a master device. The backplane signal may also be derived from an external source. These features permit interfacing to single backplane LCDs with characters in multiples of four. Each slave’s backplane input represents a 200pF capacitive load to the master backplane driver (comparable to one additional segment). The number of slave devices drivable by a master device is therefore set by the larger display backplane capacitive load. The master backplane output will drive the display backplane of 16 one-half-inch characters with rise and fall times under 5 µsec. This represents a system with three slave devices and a fourth master device driving the backplane. TYPICAL CHARACTERISTICS 1 23456 7 Operating Supply Current vs Supply Voltage TA = –20°C TA = +70°C TA = +25°C V+ VOLTS IOP (µA) LCD DEVICES DISPLAY BLANK PIN 36 OPEN 180 150 120 Backplane Frequency vs Supply Voltage C OSC = 0 pF V+ VOLTS BP (Hz) 123 4567 C OSC = 22 pF C OSC = 220 pF (PIN 36 OPEN) TA = +25°C

6-13TELCOM SEMICONDUCTOR, INC.

1111 Blank

sensing circuit will not respond to such a short signal. level = logic “1”) input at pin 27 (LSB) through pin 30 (MSB). binary and BCD true codes to a 7-segment output. rate digit select control signals. Figure 3. TC7211AM Driving an 8-Digit LCD Display Figure 4. Segment Assignment available. Contact TelCom Semiconductor for details. Table 1. Binary Codes Versus Character Displayed