TC7129 TELCOM | Alldatasheet

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3-231TELCOM SEMICONDUCTOR, INC. TC7129

FEATURES

n True Differential Input and Reference n Direct LCD Driver for 4-1/2 Digits, Decimal Points, Low-Battery Indicator, and Continuity Indicator n Overrange and Underrange Outputs n External Phase Compensation Not Required GENERAL DESCRIPTION The TC7129 is a 4-1/2 digit analog-to-digital converter (ADC) that directly drives a multiplexed liquid crystal dis- play (LCD). Fabricated in high-performance, low-power CMOS, the TC7129 ADC is designed specifically for high- resolution, battery-powered digital multimeter applications. The traditional dual-slope method of A/D conversion has been enhanced with a successive integration technique to produce readings accurate to better than 0.005% of full scale, and resolution down to 10 µV per count. The TC7129 includes features important to multimeter applications. It detects and indicates low-battery condition. A continuity output drives an annunciator on the display, and can be used with an external driver to sound an audible alarm. Overrange and underrange outputs and a range- change input provide the ability to create auto-ranging instruments. For snapshot readings, the TC7129 includes a latch-and-hold input to freeze the present reading. This combination of features makes the TC7129 the ideal choice for full-featured multimeter and digital measurement applications. TYPICAL OPERATING CIRCUIT 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP LCD DRIVERS TC7129-5 10/18/96

ORDERING INFORMATION

Part No. Layout Package Range TC7129CKW Formed 44-Pin PQFP 0 °C to +70°C TC7129CLW — 44-Pin PLCC 0 °C to +70°C TC7129CPL Normal 40-Pin PDIP 0 °C to +70°C TC7129 1234567891011121314151617181920 403938373635343332313029 2827262524232221 TC04 LOW BATTERY CONTINUITY 5 pF 120 kHz 10 pF 0.1 µF20 kΩ 0.1 µF 100 kΩ 1 µF 0.1 µF 150 kΩ 10 kΩ VIN – + NOTE: RC network between pins 26 and 28 is not required.* 330 kΩ

3-232 TELCOM SEMICONDUCTOR, INC. ABSOLUTE MAXIMUM RATINGS* Digital Input, Pins Package Power Dissipation (TA ≤ 70°C) Notes: Input voltages may exceed supply voltages, provided input current is limited to ±400 µA. Currents above this value may result in invalid display readings but will not destroy the device if limited to ±1 mA. Dissipation ratings assume device is mounted with all leads soldered to printed circuit board. *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: V+ to V– = 9V, VREF = 1V, TA = +25°C, fCLK = 120 kHz, unless otherwise indicated. Pin numbers refer to 40-pin DIP. Symbol Parameter Test Conditions Min Typ Max Unit Input Zero Input Reading V IN = 0V, 200 mV Scale – 0000 0000 +0000 Counts Zero Reading Drift V IN = 0V, 0°C < TA < +70°C— ±0.5 — µV/°C Ratiometric Reading V IN = VREF = 1000 mV, Range = 2V 9997 9999 10000 Counts Range Change Accuracy V IN = 0.1V on Low Range 0.9999 1.0000 1.0001 Ratio 4VIN = 1V on High Range RE Roll-Over Error –V IN = +VIN = 199 mV — 1 2 Counts NL Linearity Error 200 mV Scale — 1 — Counts CMRR Common-Mode Rejection Ratio V CM = 1V, VIN = 0V, 200 mV Scale — 110 — dB CMVR Common-Mode Voltage Range V IN = 0V — (V –) +1.5 — V 200 mV Scale — (V +) –1 — V eN Noise (Peak-to-Peak Value Not V IN = 0V — 14 — µVP-P Exceeded 95% of Time) 200 mV Scale IIN Input Leakage Current V IN = 0V, Pins 32, 33 — 1 10 pA Scale Factor Temperature V IN = 199 mV, 0°C < TA < +70°C — 2 7 ppm/ °C Coefficient External V REF = 0 ppm/°C Power VCOM Common Voltage V + to Pin 28 2.8 3.2 3.5 V Common Sink Current Δ Common = +0.1V — 0.6 — mA Common Source Current Δ Common = –0.1V — 10 — µA DGND Digital Ground Voltage V + to Pin 36, V+ to V– = 9V 4.5 5.3 5.8 V Sink Current Δ DGND = +0.5V — 1.2 — mA Supply Voltage Range V + to V– 691 2 V IS Supply Current Excluding Common Current V+ to V– = 9V — 0.8 1.3 mA fCLK Clock Frequency — 120 360 kHz VDISP Resistance V DISP to V+ —5 0 —k Ω Low-Battery Flag Activation Voltage V+ to V– 6.3 7.2 7.7 V Digital Continuity Comparator V OUT Pin 27 = High 100 200 — mV Threshold Voltages V OUT Pin 27 = Low — 200 400 mV Pull-Down Current Pins 37, 38, 39 — 2 10 µA TC7129 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP LCD DRIVERS

3-233TELCOM SEMICONDUCTOR, INC. 18 19 20 21 23 24 6543 1 4 4 2 43 42 41 40 25 26 27 28 3214 3115 3016 2917

12 TC7129CLW

F1, E1, DP1 B 2, C2, BATT A 2, G2, D2 F2, E2, DP2 B 3, C3, MINUS A 3, G3, D3 F3, E3, DP3 B 4, C4, BC 5 A 4, G4, D4 F4, E4, DP4 NC REF LO REF HI IN HI IN LO BUFF C – REF C + REF COM CONT INT OUT NC A 1, G1, D1 B 1, C1, CONT A.D. OSC 3 OSC 1 NC OSC 2 DP 1 DP 2 RANGE DGND BP 3 BP 2 BP 1 VDISP DP 4/OR NC DP 3/UR LATCH/HOLD V – INT IN TC7129CKW 12 13 14 15 17 18 44 43 42 41 39 3840 37 36 35 34 19 20 21 22 268 259 2410 2311 A 1, G1, D1 B 1, C1, CONT A.D. OSC 3 OSC 1 NC OSC 2 DP 1 DP 2 RANGE DGND REF LO REF HI IN HI IN LO BUFF C – REF C + REF COM CONT INT OUT NC F1, E1, DP1 B 2, C2, BATT A 2, G2, D2 F2, E2, DP2 B 3, C3, MINUS A 3, G3, D3 F3, E3, DP3 B 4, C4, BC 5 A 4, G4, D4 F4, E4, DP4 NC BP 3 BP 2 BP 1 VDISP DP 4/OR NC DP 3/UR LATCH/HOLD V – INT IN TC7129CPL OSC 2 DP 1 DP 2 RANGE DGND REF LO REF HI IN HI IN LO BUFF C – REF C + REF COM CONT INT OUT INT IN V – DP 3/UR OSC 1 OSC 3 ANNUNICATOR DRIVE B 1, C1, CONT A 1, G1, D1 F1, E1, DP1 B 2, C2, LO BATT A 2, G2, D2 F2, E2, DP2 B 3, C3, MINUS A 3, G3, D3 F3, E3, DP3 B 4, C4, BC 5 A 4, G4, D4 F4, E4, DP4 BP 3 BP 2 BP 1 VDISP DP 4/OR DISPLAY OUTPUT LINES LATCH/HOLD PIN CONFIGURATIONS 44-Pin PLCC44-Pin QFP 40-Pin PDIP "Weak Output" Current Pins 20, 21 Sink/Source — 3/3 — µA Sink/Source Pin 27 Sink/Source — 3/9 — µA Pin 22 Source Current — 40 — µA Pin 22 Sink Current — 3 — µA Symbol Parameter Test Conditions Min Typ Max Unit ELECTRICAL CHARACTERISTICS: V+ to V– = 9V, VREF = 1V, TA = +25°C, fCLK = 120 kHz, unless otherwise indicated. Pin numbers refer to 40-pin DIP. TC7129 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP LCD DRIVERS

3-234 TELCOM SEMICONDUCTOR, INC. TC7129 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP LCD DRIVERS PIN DESCRIPTIONS Pin No. Pin No. Pin No. 40-Pin 44-Pin 44-Pin TC7129CPL TC7129CKW TC7129CLW Symbol Function 1 40 2 OSC 1 Input to first clock inverter. 2 41 3 OSC 3 Output of second clock inverter. 3 ANNUNCIATOR Backplane square-wave output for driving annunciators. 44 3 5 B 1, C1, CONT Output to display segments. 54 4 6 A 1, G1, D1 Output to display segments. 61 7 F 1, E1, DP1 Output to display segments. 72 8 B 2, C2, LO BATT Output to display segments. 83 9 A 2, G2, D2 Output to display segments. 94 1 0 F 2, E2, DP2 Output to display segments. 10 5 11 B 3, C3, MINUS Output to display segments. 11 7 13 A 3, G3, D3 Output to display segments. 12 8 14 F 3, E3, DP3 Output to display segments. 13 9 15 B 4, C4, BC5 Output to display segments. 14 10 16 A 4, D4, G4 Output to display segments. 15 11 17 F 4, E4, DP4 Output to display segments. 16 12 18 BP 3 Backplane #3 output to display. 17 13 19 BP 2 Backplane #2 output to display. 18 14 20 BP 1 Backplane #1 output to display. 19 15 21 V DISP Negative rail for display drivers. 20 16 22 DP 4/OR Input: When HI, turns on most significant decimal point. Output: Pulled HI when result count exceeds ±19,999. 21 18 24 DP 3/UR Input: Second most significant decimal point on when HI. Output: Pulled HI when result count is less than ±1000. 22 19 25 LATCH/HOLD Input: When floating, ADC operates in the free-run mode. When pulled HI, the last displayed reading is held. When pulled LO, the result counter contents aren shown inincrementing during the deintegrate phase of cycle. Output: Negative-going edge occurs when the data latches are updated. Can be used for converter status signal. 23 20 26 V – Negative power supply terminal. 24 27 V + Positive power supply terminal and positive rail for display drivers. 25 21 28 INT IN Input to integrator amplifier. 26 23 29 INT OUT Output of integrator amplifier. 27 24 30 CONTINUITY Input: When LO, continuity flag on the display is OFF. When HI, continuity flag is ON. Output: HI when voltage between inputs is less than +200 mV. LO when voltage between inputs is more than +200 mV. 28 25 31 COMMON Sets common-mode voltage of 3.2V below V + for DE, 10X, etc. Can be used as preregulator for external reference. 29 26 32 C + REF Positive side of external reference capacitor. 30 27 33 C –REF Negative side of external reference capacitor. 31 29 35 BUFFER Output of buffer amplifier. 32 30 36 IN LO Negative input voltage terminal. 33 31 37 IN HI Positive input voltage terminal.

3-235TELCOM SEMICONDUCTOR, INC. PIN DESCRIPTIONS Pin No. Pin No. Pin No. 40-Pin 44-Pin 44-Pin TC7129CPL TC7129CKW TC7129CLW Symbol Function 34 32 38 REF HI Positive reference voltage in 35 33 39 REF LO Negative reference voltage 36 34 40 DGND Internal ground reference for digital section. See " ±5V Power Supply" paragraph. 37 35 41 RANGE 3 µA pull-down for 200 mV scale. Pulled HI externally for 2V scale. 38 36 42 DP 2 Internal 3 µA pull-down. When HI, decimal point 2 will be on. 39 37 43 DP 1 Internal 3 µA pull-down. When HI, decimal point 1 will be on. 40 38 44 OSC 2 Output of first clock inverter. Input of second clock inverter. 6,17, 28, 39 12, 23, 34,1 NC No Connection COMPONENT SELECTION (All pin designations refer to 40-Pin Dip) The TC7129 is designed to be the heart of a high- resolution analog measurement instrument. The only addi- tional components required are a few passive elements, a voltage reference, an LCD, and a power source. Most component values are not critical; substitutes can be chosen based on the information given below. The basic circuit for a digital multimeter application is shown in Figure 1. See "Special Applications" for variations. Typical values for each component are shown. The sections below give component selection criteria. Oscillator (XOSC , CO1 , CO2 , RO ) The primary criterion for selecting the crystal oscillator is to chose a frequency that achieves maximum rejection of line-frequency noise. To do this, the integration phase should last an integral number of line cycles. The integration phase of the TC7129 is 10,000 clock cycles on the 200 mV range and 1000 clock cycles on the 2V range. One clock cycle is equal to two oscillator cycles. For 60 Hz rejection, the oscillator frequency should be chosen so that the period of one line cycle equals the integration time for the 2V range: 1/60 second = 16.7 msec = 1000 clock cycles 2 osc cycles/clock cycle oscillator frequency giving an oscillator frequency of 120 kHz. A similar calcula- tion gives an optimum frequency of 100 kHz for 50 Hz rejection. * , The resistor and capacitor values are not critical; those shown work for most applications. In some situations, the capacitor values may have to be adjusted to compensate for parasitic capacitance in the circuit. The capacitors can be low-cost ceramic devices. Some applications can use a simple RC network instead of a crystal oscillator. The RC oscillator has more potential for jitter, especially in the least significant digit. See "RC Oscillator." Integrating Resistor (RINT) The integrating resistor sets the charging current for the integrating capacitor. Choose a value that provides a current between 5 µA and 20 µA at 2V, the maximum full- scale input. The typical value chosen gives a charging current of 13.3µA: I CHARGE = 13.3 µA Too high a value for RINT increases the sensitivity to noise pickup and increases errors due to leakage current. Too low a value degrades the linearity of the integration, leading to inaccurate readings. 150 kΩ TC7129 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP LCD DRIVERS

3-236 TELCOM SEMICONDUCTOR, INC. Figure 1. Standard Circuit

3-237TELCOM SEMICONDUCTOR, INC. TC7129 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP LCD DRIVERS Integrating Capacitor (CINT) The charge stored in the integrating capacitor during the integrate phase is directly proportional to the input voltage. The primary selection criterion for C INT is to choose a value that gives the highest voltage swing while remain- ing within the high-linearity portion of the integrator output range. An integrator swing of 2V is the recommended value. The capacitor value can be calculated from the equation: C INT = , where tINT is the integration time. Using the values derived above (assuming 60 Hz operation), the equation becomes: C INT = = 0.1 µF. The capacitor should have low dielectric absorption to ensure good integration linearity. Polypropylene and Teflon capacitors are usually suitable. A good measurement of the dielectric absorption is to connect the reference capacitor across the inputs by connecting: Pin to Pin 20 → 33 (C REF + to IN HI) 30 → 32 (C REF – to IN LO) A reading between 10,000 and 9998 is acceptable; anything lower indicates unacceptably high dielectric ab- sorption. Reference Capacitor (CREF ) The reference capacitor stores the reference voltage during several phases of the measurement cycle. Low leakage is the primary selection criterion for this component. The value must be high enough to offset the effect of stray capacitance at the capacitor terminals. A value of at least 1 µF is recommended. Voltage Reference (DREF , RREF , RBIAS, CRF ) A TC04 band-gap reference provides a high-stability voltage reference of 1.25V. The reference potentiometer REF ) provides an adjustment for adjusting the reference voltage; any value above 20 kΩ is adequate. The bias resistor (RBIAS) limits the current through DREF to less than 150 µA. The reference filter capacitor (CRF ) forms an RC filter with RBIAS to help eliminate noise. Input filter (RIF, CIF) For added stability, an RC input noise filter is usually included in the circuit. The input filter resistor value should not exceed 100 kΩ . A typical RC time constant value is 16.7msec to help reject line-frequency noise. The input filter capacitor should have low leakage for a high-impedance input. Battery The typical circuit uses a 9V battery as a power source. Any value between 6V and 12V can be used. For operation from batteries with voltages lower than 6V and for operation from power supplies, see "Powering the TC7129." SPECIAL APPLICATIONS The TC7129 as a Replacement Part The TC7129 is a direct pin-for-pin replacement part for the ICL7129. Note, however, that part requires a capacitor and resistor between pins 26 and 28 for phase compensa- tion. Since the TC7129 uses internal phase compensation, these parts are not required and, in fact, must be removed from the circuit for stable operation. Powering the TC7129 While the most common power source for the TC7129 is a 9V battery, there are other possibilities. Some of the more common ones are explained below. 16.7msec x 13.3 µA tINT x IINT VSWING

3-241TELCOM SEMICONDUCTOR, INC.

1 CLOCK PULSE

Figure 10. Accuracy Errors in Dual-Slope Conversion Figure 11. Integrator Waveform surement phases described earlier.

3-242 TELCOM SEMICONDUCTOR, INC. Figure 12. Functional Block Diagram