TC7126ACLW

TC7126 TELCOM | Alldatasheet

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3-217TELCOM SEMICONDUCTOR, INC. TC7126 TC7126A 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS

FEATURES

n Low Temperature Drift Internal Reference n Guaranteed Zero Reading With Zero Input 10 pA Max n Precision Null Detectors With True Polarity at Zero n High-Impedance Differential Input n Convenient 9V Battery Operation With 900 µW Max TYPICAL APPLICATIONS n Thermometry n Bridge Readouts: Strain Gauges, Load Cells, Null Detectors n Digital Meters and Panel Meters — Voltage/Current/Ohms/Power, pH n Digital Scales, Process Monitors GENERAL DESCRIPTION The TC7126A is a 3-1/2 digit CMOS analog-to-digital converter (ADC) containing all the active components nec- essary to construct a 0.05% resolution measurement sys- tem. Seven-segment decoders, digit and polarity drivers, voltage reference, and clock circuit are integrated on-chip. The TC7126A directly drives a liquid crystal display (LCD), and includes a backplane driver. A low-cost, high-resolution indicating meter requires only a display, four resistors, and four capacitors. The TC7126A's extremely low power drain and 9V battery operation make it ideal for portable applications. The TC7126A reduces linearity error to less than 1 count. Roll-over error (the difference in readings for equal magnitude but opposite polarity input signals) is below ±1 count. High-impedance differential inputs offer 1 pA leak- age current and a 10 12Ω input impedance. The 15 µVP-P noise performance guarantees a "rock solid" reading, and the auto-zero cycle guarantees a zero display reading with a 0V input. The TC7126A features a precision, low-drift internal voltage reference and is functionally identical to the TC7126. A low-drift external reference is not normally required with the TC7126A.

ORDERING INFORMATION

A or blank* R (reversed pins) or blank (CPL pkg only) * "A" parts have an improved reference TC Package Code (see below): Package Temperature Code Package Range CKW 44-Pin PQFP 0 °C to +70°C CLW 44-Pin PLCC 0 °C to +70°C CPL 40-Pin PDIP 0 °C to +70°C IPL 40-Pin PDIP (non-A only) – 25 °C to +85°C VREF TC7126 TC7126A 3334 240 kΩ 10 kΩ 39 38 40 V REF 0.33 µF 0.1 µF V – 1OSC3OSC2OSC TO ANALOG COMMON (PIN 32)

1 CONVERSION/SEC

560 kΩ 180 kΩ 0.15 µF 0.01 µFANALOG INPUT C REF –C REF V IN V IN ANALOG COMMON VINT VBUFF C AZ SEGMENT DRIVE 2–19 22–25 POL BP V + MINUS SIGN BACKPLANE 50 pF LCD 1 MΩ R OSC NOTE: Pin numbers refer to 40-pin DIP. 40-Pin Plastic DIP 44-Pin Plastic Quad Flat Package Formed Leads 44-Pin Plastic Chip Carrier PLCC AVAILABLE PACKAGES TYPICAL OPERATING CIRCUIT TC7126/A-8 11/6/96

3-218 TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS TC7126 TC7126A ABSOLUTE MAXIMUM RATINGS* Operating Temperature Range Power Dissipation, (TA ≤ 70°C), (Note 2) *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: VS = +9V, fCLK = 16 kHz, and TA = +25°C, unless otherwise noted. Symbol Parameter Test Conditions Min Typ Max Unit Input Zero Input Reading V IN = 0V –000.0 ±000.0 +000.0 Digital Full Scale = 200 mV Reading Zero Reading Drift V IN = 0V, 0°C ≤ TA ≤ +70°C — 0.2 1 µV/°C Ratiometric Reading V IN = VREF , VREF = 100 mV 999 999/1000 1000 Digital Reading NL Linearity Error Full Scale = 200 mV or 2V – 1 ±0.2 1 Count Max Deviation From Best Fit Straight Line Roll-Over Error –V IN = +VIN ≈ 200 mV – 1 ±0.2 1 Count eN Noise V IN = 0V, Full Scale = 200 mV — 15 — µVP-P IL Input Leakage Current V IN = 0V — 1 10 pA CMRR Common-Mode Rejection V CM = ±1V, VIN = 0V, — 50 — µV/V Ratio Full Scale = 200 mV Scale Factor Temperature V IN = 199 mV, 0°C ≤ TA ≤ +70°C — 1 5 ppm/ °C Coefficient Ext Ref Temp Coeff = 0 ppm/ °C Analog Common VCTC Analog Common 250 k Ω Between Common and V+ — — — — Temperature Coefficient 0 °C ≤ TA ≤ +70°C ("C" Devices): — — — — TC7126 — 80 — ppm/ °C TC7126A — 35 75 ppm/ °C – 25°C ≤ TA ≤ +85°C ("I" Device): TC7126A — 35 100 ppm/ °C VC Analog Common Voltage 250 k Ω Between Common and V+ 2.7 3.05 3.35 V LCD Drive VSD LCD Segment Drive Voltage V + to V– = 9V 4 5 6 V P-P VBD LCD Backplane Drive Voltage V + to V– = 9V 4 5 6 V P-P Power Supply IS Power Supply Current V IN = 0V, V+ to V– = 9V (Note 6) — 55 100 µA NOTES: 1. Input voltage may exceed supply voltages when input current is limited to 100 µA. 2. Dissipation rating assumes device is mounted with all leads soldered to PC board. 3. Refer to "Differential Input" discussion. 4. Backplane drive is in-phase with segment drive for "OFF" segment and 180° out-of-phase for "ON" segment. Frequency is 20 times conversion rate. Average DC component is less than 50 mV. 5. See "Typical Operating Circuit." 6. During auto-zero phase, current is 10–20 µA higher. A 48 kHz oscillator increases current by 8 µA (typical). Common current not included.

3-219TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS TC7126 TC7126A PIN CONFIGURATIONS 1 NC TC7126CKW TC7126ACKW (FLAT PACKAGE) 12 13 14 15 17 18 G 44 43 42 41 39 3840 COMMON C AZ VBUFF VINT 34 V 19 20 21 22 D 268+ 259 2410 2311 C OSC TEST NC NC V D 2 C 2 B 2 A 2 E 2 NC OSC 2 OSC 1 REFC REFC A 3 G 3 BP POL AB 4 COMMON VREF 18 19 20 21 23 24 AB 4 POL NC BP NC B 6543 1 4 4 2 A OSC OSC

42 OSC

41 TEST

F E G A C G

3214 C AZ2

3115 VBUFF2

3016 VINTE

C D F A B TC7126CLW TC7126ACLW (PLCC) V – B 1 C 1 D 1 V + G 1 E 1 D 1 C 1 B 1 A 1 G 1 E 1 REFC REFC + VIN VIN VREF+ VREF+ VREF + VIN VIN TC7126CPL TC7126ACPL TC7126IPL TC7126AIPL OSC 1 TEST V ANALOG COMMON C AZ V + D NORMAL PIN CONFIGURATION C 2 B 2 A 2 E 2 D 3 B 3 E 3 AB 4 10's 100's 1000's 100's OSC 2 OSC 3 REF V – REF C + REF C – REF V + IN V – IN VBUFF V INT V – G C A G BP (BACKPLANE) POL (MINUS SIGN) TC7126RCPL TC7126ARCPL TC7126RIPL TC7126ARIPL 100's 1000's 100's REVERSE PIN CONFIGURATION D 1 C 1 B 1 A 1 G 1 E 1 1's V + D 2 C 2 B 2 A 2 E 2 D 3 B 3 E 3 AB 4 POL (MINUS SIGN) D 1 C 1 B 1 A 1 G 1 E 1 1's 10's OSC TEST V ANALOG COMMON CAZ OSC 2 OSC REF V – REF C + REF C – REF V + IN V – IN VBUFF V INT V – G C A G BP (BACKPLANE) NC = NO INTERNAL CONNECTION

3-220 TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS TC7126 TC7126A PIN DESCRIPTION 40-Pin PDIP Pin Number Normal (Reverse) Name Description 1 (40) V + Positive supply voltage. 2 (39) D 1 Activates the D section of the units display. 3 (38) C 1 Activates the C section of the units display. 4 (37) B 1 Activates the B section of the units display. 5 (36) A 1 Activates the A section of the units display. 6 (35) F 1 Activates the F section of the units display. 7 (34) G 1 Activates the G section of the units display. 8 (33) E 1 Activates the E section of the units display. 9 (32) D 2 Activates the D section of the tens display. 10 (31) C 2 Activates the C section of the tens display. 11 (30) B 2 Activates the B section of the tens display. 12 (29) A 2 Activates the A section of the tens display. 13 (28) F 2 Activates the F section of the tens display. 14 (27) E 2 Activates the E section of the tens display. 15 (26) D 3 Activates the D section of the hundreds display. 16 (25) B 3 Activates the B section of the hundreds display. 17 (24) F 3 Activates the F section of the hundreds display. 18 (23) E 3 Activates the E section of the hundreds display. 19 (22) AB 4 Activates both halves of the 1 in the thousands display. 20 (21) POL Activates the negative polarity display. 21 (20) BP Backplane drive output. 22 (19) G 3 Activates the G section of the hundreds display. 23 (18) A 3 Activates the A section of the hundreds display. 24 (17) C 3 Activates the C section of the hundreds display. 25 (16) G 2 Activates the G section of the tens display. 26 (15) V – Negative power supply voltage. 27 (14) V INT The integrating capacitor should be selected to give the maximum voltage swing that ensures component tolerance build-up will not allow the integrator output to saturate. When analog common is used as a reference and the conversion rate is 3 readings per second, a 0.047 µF capacitor may be used. The capacitor must have a low dielectric constant to prevent roll-over errors. See "Integrating Capaci- tor" section for additional details. 28 (13) V BUFF Integration resistor connection. Use a 180 kΩ resistor for a 200 mV full-scale range and a 1.8 MΩ resistor for a 2V full-scale range. 29 (12) C AZ The size of the auto-zero capacitor influences system noise. Use a 0.33µF capacitor for 200 mV full scale, and a 0.033 µF capacitor for 2V full scale. See paragraph on auto-zero capacitor for more details. 30 (11) V IN– The low input signal is connected to this pin. 31 (10) V IN+ The high input signal is connected to this pin. 32 (9) ANALOG This pin is primarily used to set the analog common-mode voltage for battery operation or in systems where the input signal is referenced to the power supply. See paragraph on analog common for more details. It also acts as a reference voltage source. 33 (8) C REF– See pin 34. COMMON

3-221TELCOM SEMICONDUCTOR, INC. and 36 for 2V full scale. See paragraph on reference voltage. Figure 1. Basic Dual-Slope Converter tRI = Reference voltage integration time (variable). SI), measured by counting clock pulses.

1.2 VFULL SCALE

3-222 TELCOM SEMICONDUCTOR, INC. phase residual is typically 10 µV to 15 µV. signal integration period is 1000 clock periods, or counts. where fOSC = external clock frequency. The third phase is reference integrate, or deintegrate. backplane frequency is 60 Hz with a 5V nominal amplitude. sive approximation converters in high-noise environments. multiple of the 50 Hz/60 Hz power line period. Figure 2. Normal-Mode Rejection of Dual-Slope Converter

3-223TELCOM SEMICONDUCTOR, INC. Figure 3. TC7126A Block Diagram

7 SEGMENT

2 OSC 3OSC 1

3-224 TELCOM SEMICONDUCTOR, INC. changes are required to upgrade existing designs. Mylar-type dielectric capacitor is adequate. nominal ±2V integrator swing. reversed, this indicator would reverse. cycle takes a total of 4000 counts (16,000 clock pulses). where fOSC is the externally-set clock frequency. VINT = Desired full-scale integrator output swing. pylene capacitor is recommended. Figure 4. Display Font and Segment Assignment

3-225TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS TC7126 TC7126A In some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. Assume, for example, a pressure transducer output for 2000 lb/in. 2 is 400 mV. Rather than dividing the Required Full-Scale Voltage* V REF 200 mV 100 mV 2V 1V *VFS = 2 VREF . input voltage by two, the reference voltage should be set to 200 mV. This permits the transducer input to be used directly. The differential reference can also be used where a digital zero reading is required when V IN is not equal to zero. This is common in temperature-measuring instrumentation. A compensating offset voltage can be applied between analog common and V IN–. The transducer output is con- nected between VIN+ and analog common. DEVICE PIN FUNCTIONAL DESCRIPTION (Pin Numbers Refer to 40-Pin DIP) Differential Signal Inputs VIN+ (Pin 31), VIN– (Pin 30) The TC7126A is designed with true differential inputs and accepts input signals within the input stage common- mode voltage range (V CM ). Typical range is V+ –1V to V– +1V. Common-mode voltages are removed from the system when the TC7126A operates from a battery or floating power source (isolated from measured system), and V IN– is con- nected to analog common (VCOM ). (See Figure 5.) In systems where common-mode voltages exist, the TC7126A's 86 dB common-mode rejection ratio minimizes error. Common-mode voltages do, however, affect the inte- grator output level. A worst-case condition exists if a large positive V CM exists in conjunction with a full-scale negative differential signal. The negative signal drives the integrator output positive along with V CM (see Figure 6.) For such applications, the integrator output swing can be reduced below the recommended 2V full-scale swing. The integrator output will swing within 0.3V of V + or V– without increased linearity error. Differential Reference VREF + (Pin 36), VREF – (Pin 35) The reference voltage can be generated anywhere within the V+ to V– power supply range. To prevent roll-over type errors being induced by large common-mode voltages, CREF should be large compared to stray node capacitance. The TC7126A offers a significantly improved analog common temperature coefficient. This potential provides a very stable voltage, suitable for use as a voltage reference. The temperature coefficient of analog common is typically 35 ppm/°C for the TC7126A and 80 ppm/°C for the TC7126. ANALOG COMMON (Pin 32) The analog common pin is set at a voltage potential approximately 3V below V +. The potential is guaranteed to be between 2.7V and 3.35V below V+. Analog common is tied internally to an N-channel FET capable of sinking Integrating Resistor (RINT) The input buffer amplifier and integrator are designed with Class A output stages. The output stage idling current is 6 µA. The integrator and buffer can supply 1 µA drive current with negligible linearity errors. R INT is chosen to remain in the output stage linear drive region, but not so large that PC board leakage currents induce errors. For a 200 mV full scale, R INT is 180 kΩ . A 2V full scale requires 1.8 MΩ . Oscillator Components C OSC should be 50 pF; ROSC is selected from the equation: fOSC = . For a 48 kHz clock (3 conversions per second), R = 180 kΩ . Note that fOSC is 44 to generate the TC7126A's inter- nal clock. The backplane drive signal is derived by dividing f OSC by 800. To achieve maximum rejection of 60 Hz noise pickup, the signal integrate period should be a multiple of 60 Hz. Oscillator frequencies of 240 kHz, 120 kHz, 80 kHz, 60 kHz, 40 kHz, etc. should be selected. For 50 Hz rejection, oscillator frequencies of 200 kHz, 100 kHz, 66-2/3 kHz, 50 kHz, 40 kHz, etc. would be suitable. Note that 40 kHz (2.5 readings per second) will reject both 50 Hz and 60 Hz. Reference Voltage Selection A full-scale reading (2000 counts) requires the input signal be twice the reference voltage. Component Nominal Full-Scale Voltage Value 200 mV 2V C AZ 0.33 µF 0.033 µF R INT 180 kΩ 1.8 MΩ C INT 0.047 µF 0.047 µF NOTE: fOSC = 48 kHz (3 readings per sec). 0.45 RC

3-227TELCOM SEMICONDUCTOR, INC. Figure 8. TC7126A Internal Voltage Reference ConnectionFigure 7. Analog Common Temperature Coefficient

2471 East Bayshore

reference voltage is needed. *NOTE: Contact LCD manufacturer for full product listing/specifications.

3-228 TELCOM SEMICONDUCTOR, INC.

1 MΩ 10%

Figure 9. Decimal Point and Annunciator Drives Figure 11. 3-1/2 Digit True RMS AC DMM Figure 10. Low Parts Count Ratiometric Resistance Measurement