TC70 TELCOM | Alldatasheet
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Technical content
5-7TELCOM SEMICONDUCTOR, INC. TC70/71 MICROMASTER™ – SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR, WATCHDOG AND BATTERY BACKUP VCC V CCO VBATT TC70/71 CEI (TC70) ΔV DETECTOR WATCHDOG TIMERWDD (TC70) CEO (TC70) TDO (TC71) VREF1 VREF2 VREF3 PF (TC71) TDI (TC71) RS BATTERY BACK-UP CONTROL DELAY TIMER GND PIN CONFIGURATIONS (DIP and SOIC) 1 8 3 6 4 5 TC70 1 8 3 6 4 5 TC71 CEO VCCO GND CEI VCC VCCO GND TDI VCC WDD VBATT RS TDO PF VBATT RS
ORDERING INFORMATION
Part No. Package Temp. Range TC70COA 8-Pin SOIC 0 °C to +70°C TC70CPA 8-Pin Plastic DIP 0 °C to +70°C TC70EOA 8-Pin SOIC – 40 °C to +85°C TC70EPA 8-Pin Plastic DIP – 40 °C to +85°C TC71COA 8-Pin SOIC 0 °C to +70°C TC71CPA 8-Pin Plastic DIP 0 °C to +70°C TC71EOA 8-Pin SOIC – 40 °C to +85°C TC71EPA 8-Pin Plastic DIP – 40 °C to +85°C FUNCTIONAL BLOCK DIAGRAM
FEATURES
n Maximum Functional Integration: Precision Power Supply Monitor, Watchdog Timer, External RESET Override, Threshold Detector and Battery Backup Controller in an 8-Pin Package n Generates Power-on RESET and Guards Against Unstable Processor Operation Resulting from Power "Brown-out" n Automatically Halts and Restarts an Out-of- Control Microprocessor n Output Can be Wire-ORed, or Hooked to Manual RESET Pushbutton Switch n Watchdog Disable Pin for Easier Prototyping (TC70) n Voltage Monitor for Power Fail or Low Battery Warning (TC71) n Available in 8-Pin Plastic DIP or 8-Pin SOIC Packages n Cost Effective TYPICAL APPLICATIONS n All Microprocessor-based Systems n Test Equipment n Instrumentation n Set-Top Boxes GENERAL DESCRIPTION The TC70/71 is a fully-integrated power supply monitor, watchdog and battery backup circuit in a space-saving 8-pin package. When power is initially applied, the TC70/71 holds the processor in its reset state for a minimum of 500msec after V CC is in tolerance to ensure stable system start-up. After start-up, processor sanity is monitored by the on-board watchdog circuit. The processor must provide periodic high- to-low level transitions to the TC70/71 to verify proper execution. Should the processor fail to supply this signal within the specified timeout period, an out-of-control proces- sor is indicated and the TC70/71 issues a momentary processor reset as a result. The TC70 also features a watchdog disable pin to facilitate system test and debug. The output of the TC70/71 can be wire-ORed to a push- button switch (or electronic signal) to reset the processor. When connected to a push-button switch, the TC70/71 provides contact debounce. The integrated battery backup circuit on-board the TC70/ 71 converts CMOS RAM into nonvolatile memory by first write-protecting, then switching the V CC line of the RAM over to an external battery. The TC71 incorporates an additional 1.3V threshold detector for power fail warning, low battery detection or to monitor power supply voltages other than +5V. TC70/71-1 11/18/96
5-8 TELCOM SEMICONDUCTOR, INC. MICROMASTER™ – SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR, WATCHDOG AND BATTERY BACKUP *This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. ABSOLUTE MAXIMUM RATINGS* Voltage (Any Pin) with Respect to TC70/71 ELECTRICAL CHARACTERISTICS: Recommended DC Operations : TA = TMIN to TMAX, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit VCC Supply Voltage Note 1 4.5 5.0 5.5 V VIH Input HIGH Level CEI, WDD (Note 1) 2.5 — — V VIH Input HIGH Level RS (Note 1) 2.2 — — V VIL Input LOW Level CEI, WDD, RS (Note 1) — — 0.8 V ELECTRICAL CHARACTERISTICS: DC : TA = TMIN to TMAX , VCC = 4.5V to 5.5V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit ICC1 Operating Current Notes 2, 3 — 5 6.5 mA ICC2 Operating Current in V CC = 0; VBATT = 2.8V; (Note 3) — 0.01 0.20 µA Battery Backup Mode IIH Input Leakage CEI — 4 7 µA IIL Input Leakage CEI — 1 — µA IIH Input Leakage RS — 1 — µA ISTBY Battery Standby Current 5.5V > V CC > VBATT + 0.2V – 1.0 — 0.02 µA ISTBY Battery Standby Current 5.5V > V CC > VBATT + 0.2V – 0.1 — 0.02 µA TA = 25°C ELECTRICAL CHARACTERISTICS: DC : Power Supply Monitor, EXT. RESET and Watchdog: TA = TMIN to TMAX , VCC = 4.5V to 5.5V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit IOL Output Current 0.4V V OL = 0.4V 2 5 — mA (RS, TDO, CEO, PF Pins) IOH Output Current 2.4V V OH = 2.4V 2 3 — mA (TDO, CEO, PF Pins) WDD I WDD Input Current WDD = GND – 120 — — µA WDD = V CC ——2 5 VSTH RS Strobe (HIGH) Level Figure 3 (Note 1) V DD – 0.5 — — V VSTL RS Strobe (LOW) Level Figure 3 (Note 1) 2.2 — V DD – 1.8 V VCCTRIP VCC Trip Point (Note 1) 0 °C ≤ TA ≤ 70°C 4.25 — 4.49 – 40°C ≤ TA ≤ 85°C 4.20 4.49 ELECTRICAL CHARACTERISTICS: DC : Battery Backup and Threshold Detector: TA = TMIN to TMAX , VCC = 4.5V to 5.5V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit VOUT1 VCCO Output Voltage I OUT = 1mA V CC – 0.3 VCC – 0.1 — V IOUT = 50mA V CC – 0.5 VCC – 0.20 — VOUT2 VOUT in Battery Backup Mode IOUT = 250µA, VCC < VBATT – 0.2, VBATT = 2.8VVBATT – 0.1 VBATT – 0.02 — V
5-9TELCOM SEMICONDUCTOR, INC. ELECTRICAL CHARACTERISTICS: (Cont.) DC : Battery Backup and Threshold Detector: TA = TMIN to TMAX , VCC = 4.5V to 5.5V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit IOUT1 VCCO Output Current V CC = 4.5V, VCCO = 3.5V 50 100 — mA IOUT2 VCCO Output Current in V CCO = VBATT – 0.3V 500 — — µA Battery Backup Mode V BATT = 2.8V VSW Battery Switchover Threshold — VBATT – 0.01 —V (VCC Falling) VHYST Battery Switchover Hysteresis — 20 — mV VOH CEO CEO Output Voltage in V CC < VBATT – 0.2, VBATT = 2.8V V BATT – 0.2 — — V Battery Backup Mode I OH = 10µA VTDI Threshold Detector Trip Voltage 1.2 — 1.4 V ITDI Threshold Detector Input Current TA = 25°C –25 — +25 nA VTDI (HYST) Threshold Detector Hysteresis — 10 — mV ELECTRICAL CHARACTERISTICS: AC : Power Supply Monitor, EXT. RESET and Watchdog: TA = TMIN to TMAX , VCC = 4.5V to 5.5V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit tPBH PB Hold Time Figure 4 (Note 4) 20 — — msec tRST Reset Active Time Figure 6 500 — 900 msec tST RS STROBE Pulsewidth Figure 3 500 — — nsec tTD Watchdog Timeout Period Figure 3 500 700 900 msec tRPD VCC Detect to RS LOW Figure 6 — — 100 nsec ELECTRICAL CHARACTERISTICS: AC : Battery Backup and Threshold Detector: TA = TMIN to TMAX , VCC = 4.5V to 5.5V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit tPD CE Propagational Delay Figure 7 — — 50 nsec ELECTRICAL CHARACTERISTICS: AC : TA = TMIN to TMAX . Symbol Parameter Test Conditions Min Typ Max Unit tF VCC Fall Time From Figure 5 (Note 1) 10 — — µsec 4.25V to 3.0V tR VCC Rise Time From Figure 5 (Note 1) 0 — — µsec 3.0V to 4.25V NOTES: 1. All voltages referenced to ground. 2. No output load.
3 Measured with V
CCO and CEO open. 4. The RS output must be held low for a minimum of 20msec to guarantee a reset. TC70/71 MICROMASTER™ – SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR, WATCHDOG AND BATTERY BACKUP
5-10 TELCOM SEMICONDUCTOR, INC. strobed within the watchdog timeout period. This action typically initiates the processor's power-up routine. If the interruption persists, new reset pulses are generated each timeout period until RS is strobed. The timeout period is typically 700msec. It is often difficult to debug a system while the watchdog is continuously generating reset pulses. For example, the watchdog must be disabled when the system is operated with an in-circuit emulator (ICE). The watchdog disable input (TC70) is provided for system debugging, (or if the watchdog timer on-board the processor is to be used). Grounding WDD disables the watchdog (all other functions remain intact). For normal watchdog operation, WDD can be tied to V DD . The software routine that drives the RS strobe must be in a section of the program that executes frequently enough so the time between toggles is less than one watchdog timeout period. The strobe signal can be derived from microprocessor address, data and/or control signals. Typi- cal circuit examples are shown in Figure 1. PIN DESCRIPTION Pin No Pin No (TC70) (TC71) Symbol Description 11V CCO VCC Output. The higher of VCC or VBATT is internally switched to this output. Connect to VCC if VBATT and VCCO are not used. 22 V CC VCC Input. +5V power supply. 3 3 GND GND Input. Ground. 4 – CEI Chip enable input. Chip enable to static RAM or other device to be battery backed-up. Connect to ground if VCCO is not used. – 4 TDI Threshold detector input. When the voltage on threshold detector input (TDI) is less than 1.3V, threshold detector output (TDO) goes low. 5 – CEO Chip enable output. This line goes low only when CEI is low and V CC is above the RESET threshold. – 5 TDO Threshold detector output. TDO goes low when TDI is less than 1.3V and V CC is greater than VBATT . (The threshold detector is turned off when VCC is less than VBATT . 6 – WDD Watchdog disable input. Grounding this line disables the watchdog timer (no RESET pulses are generated after the watchdog timer times out). This input is provided to facilitate system debug. This input is internally pulled-up and can be left open, or tied to VCC for normal watchdog operation. – 6 PF Power fail output. This line goes low when V CC is below 4.5V nominal. It is used to write-protect the external device to be battery backed. 7 7 RS RESET/STORE (Bidirectional). An open drain with pull-up (in output mode) that goes active if: 1. VCC falls below 4.5V nominal 2. If pulled low by an external electronic signal or switch closure 3. If the watchdog is not strobed within the minimum watchdog timeout period 4. During power-up and power down In the input mode, RS is a negative edge triggered input that resets the watchdog timer when pulled to ground through a 10kΩ , 5% tolerance resistor. 88V BATT Backup battery input. Connect to ground if battery backup is not used. DETAILED DESCRIPTION Precision Power Supply Monitor The RS pin is immediately driven low any time VCC is below 4.5V nominal. The processor is held in its reset state during power-up and power-down. RS remains low for a minimum of 500msec after V CC is within tolerance to allow the power supply and processor to stabilize. Watchdog Timer The processor drives the RS pin with an input/output (I/O) line in series with a voltage divider to VDD . Pulling the bottom of this divider low results in an internal voltage change (strobe) sufficient to reset the watchdog timer, but above the V IL input threshold of the processor RESET input. The processor must continuously apply strobes in this manner within a set period to verify proper software execu- tion. A momentary reset (500msec minimum) is generated if a hardware or software failure keeps RS from being TC70 TC71 MICROMASTER™ – SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR, WATCHDOG AND BATTERY BACKUP