TC57H1000AD

TC57H1000AD TOSHIBA | Alldatasheet

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Technical content

TC57H1000AD-85, -100 TCS7H1001AD-85, -100 SILICON STACKED GATE CMOS 131,072 WORD x 8 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY

Description

The TC57H1000AD/TCS7H1001AD is a 131,072 word x 8 bit CMOS ultraviolet light erasable and electrically programmable read only memory. ‘The TC57H1000AD has a JEDEC standard pin configuration while the TC57H1001AD is compatible with the 28-pin 1M bit Mask ROM. Both products are available in a 32-pin standard cerdip package. ‘The TC57H1000AD/TC57H1001A js fabricated using CMOS technology. Advanced circuit techniques result in both high ‘speed and low power features with a maximum operating current of 40mA/11.8MHz and access times of 85ns/100ns. The programming time of the TC57H1000AD/TC57H1001AD (except for EPROM programmer overhead) is only 14 seconds when using the high speed programming algorithm. Features Pin Connection (Top View) ‘* Peripheral circuit : CMOS Memory cell NMOS vee 1 320Vpo Ver d 1 320Vpo (Reference) © Access time ated 2 3ipPcM o&d 2 3pPoM Ais] 3 30NC ats 3 3qpNc AIS 1 28 Vo0 85 “100 az 4 2haw ads aa Azg2 azar args 2ais a7g spars AT 3 2HANS asd? 2pas as 7 mas Ass 20s . sade 2a asd se o2pan Ass 2A Low power dissipation az] 9 20 a3 9 mag ASG 7 — 2DAI6 ~ Active 40mA/11.8MHz a2qio 2paio azgio 2qaio Azds — 2iharo - Standby 100pA aidi 22pte argu ae arg 9 2he * Wide operating temperature range: 0 ~ 70°C ao di2 2ipor ao diz 2por_ ao dio ish '* Single 5V power supply 0 G13 -20)06 90 13. gD «(OO 11 1S Fully stati ti orgie «gos or fa tos O12 17H] s lly static operation oz dis doa oz gis. eoa 02 13D * High speed programming mode —_: tpw = 0.1ms no i673 GNo dis fio. GND 14159103 * inputs and outputs TTL compatible re57m1000a0 1M Mask ROM \\ * JEDEC standard 32-pin = TC57H1000AD TESTHNOOIAD (esatee * 1MMROM compatible : TC57H1001AD * Standard 32-pin DIP cerdip package: WDIP32-G-600 Pin Names [_0=ni6 [aasress pe ‘Outputs (Inputs) [TE | Chip Enable input [8 [output Erabe pt [Fam [Popa Contempt] Power Supply Voltage (+5V) Program Supply Voltage [ew [oond id TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. A-45

‘TC57H1000AD-85/100, TC57H1001AD-85/100 Non-Volatile Memory eee Block Diagram Vee GND Vpp DO D1 D2 D3 D4 DS D6 D7 OEo oe, CE, FGM Co OUTPUT BUFFERS PGMo ciRCUIT Ado Alo Azo 256 A3 © COLUMN COLUMN VO CIRCUIT Ado DECODER AS o by A6 0 & AT o “ AB © > Ad o ° A10 © a Allo “ ROW 512 MEMORY CELL ARRAY Al2o i . Aize 8 DECODER 131,072 x 8bits Also A150 Al6 0 Operating Mode oe — "| roe | | we | ve [oor [rm] sane [oupabeseed [=| [H] sv | sv [Sancty | = | & | ] “Hort Maximum Ratings [Yor | Fogram Sunpy Votags “| oso], [Po [Power Daspaton TS w [tere [Stage Tempers |S] A46 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

Non-Volatile Memory TC57H1000AD-85/100, TC57H1001AD-85/100 Read Mode DC Recommended Operating Conditions cern | rrr | TCS7H1000AD/1001AD-85 ‘TCS7H1000AD/1001AD-100 ot [Vw [Inputtiigh Votage | 22 T= | Voor | 22 |= | Von +03 | [Vu __[inputlowVotage | os ff os os Toe |, |_Voo _|PowerSuppiy vottage | 4.75 | 5.00 | 525 | 450 | 500 | 5.60 | Program Supply Voltage DC Characteristics (Ta = 0 - 70°C) srwao. | raraweren | testconomow [ws [ve [wax | uw [tu [inputLeakage Curent [Viw=O=Yoo || = | On | tovor_| E=ov [fetremne [= = Operating Current CE NA jour = Om [rete T= | = Ts | | toosr_| g [CE=ve = tandby Current Sapa Jon tae Oupsttow voige [ig =?ima = | =| oa | Vee = Vop20.6V p= [= [+o TT Output Leakage Current [Vour=04V=Voo | = [= | AC Characteristics (Ta = 0 ~ 70°C, Vp = Vpo+0.6V) ‘sma, TCS7HT000AD/1001AD-85 TOS7H1000AD/1001AD-100 wr [ice [Paes Aeos tne [= TEie up vada TEs Owptvad as rou | FoM tw Oupavalg [= eC [_tore [OEtoOutputinighz | To 40 |_tors |PGMtoOuputinrighz [|| 40 Output DataHoidTime | | OT = AC Test Conditions zavoaev [put Pe Rise and Fas | re ms] Output Timing Measurement Reference Levels Capacitance* (Ta = 25°C, f = 1MHz) |_Cw _|inputCapactance [Vw=0V || Output Capacitance [Yor=ov dT te “Ths parameter is perioicaly sampled and isnot 100% tested TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. AAT

Timing Wavetorms (Read) = —

Non-Volatile Memory }TC57H1000AD-85/100, TC57H1001 AD-85/100 High Speed Programming Mode DC Recommended Operating Conditions [secu | rananeren [wm [we [mae] uw [vis | wouthign Vtape [a2 |= eo 30 [Vi Tinputtow'oiage [os [= fe) [Woo | Power Suppy votage [600 | 628 | 650 [Vee | Preeram SvppiVotage | i260] 1276 | 1300 | DC Characteristics (Ta = 255°C, Vpp = 6.25V+0.25V, Vpp = 12.75V+0.25V) Corn [ rates [arom [me [ve [wa || Input Leakage Current Vin = 0 ~ Vo. f - [| - +10 Output Low Voltage lo. = 2.1mA [| - | - 04 [too [Wao Sppiy Curent | Pas | [Tora [Ve Sup Curent [Ven = 180 a AC Programming Characteristics (Ta = 255°C, Vpp = 6.25V+0.25V, Vpp = 12.75V+0.25V) (smn [ween | eeowmon [wm [ve | war | OT TO [iw [AdsessHotine | SC eT [ees [OESeuptme [| | Daaseuptme | | a a Dep [Tew | Prooam Puse Wish SSC [|e AC Test Conditions [input Puse Pie ad Falimes (Os mas| TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. A-49

TC57H1000AD-85/100, TC57H1001AD-85/100 Non-Volatile Memory Timing Waveforms (Program) High Speed Programming Mode OE torz Pon = Notes: 1. Vop Must be applied simultaneously or before Vp and cut off simultaneously or after Vpp. 2. Removing the device from a programming socket and replacing the device in the socket while Vpp = 12.75V may cause permanent damage to the device 3. The Vpp supply voitage is permitted to be up to 14V for programming. Voltages over 14V should not be applied to the Vpp terminal. When the programming voltage is applied to the Vpp terminal, the overshoot voltage should not exceed 14V. A-50 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

Non-Volatile Memory +TC57H1000AD-85/100, TC57H1001AD-85/100 Erasure Characteristics Erasure is achieved by applying shortwave ultraviolet light which has a wavelength of 2537A (Angstroms) to the chip through the transparent window. The integrated dose (ultraviolet light intensity [W/cm] x exposure time {sec.]) necessary for erasure should be a minimum of 15 (We sec/om’]. When the Toshiba sterilizing lamp (GL-15) is used and the device is exposed at a distance of 1 cm from the np surface, era- sure will be achieved within 60 minutes. Using commercial lamps whose ultraviolet light intensity is 12000 [yW/cr?] will reduce the exposure time to about 20 minutes. (in this case, the integrated dose is 12000 [uW/cm] x (20 x 60) [sec] = 15 [W # sec/cm*]) Erasure begins to occur when exposed to light with a wavelength shorter than 40004. Sunlight and fluorescent lights have 3000 ~ 4000A wavelength components. Therefore, when used under these lighting conditions for extended periods of time, ‘opaque seais should be used (Toshiba EPROM Protect Seal AC901). Operation Information ‘The TC57H1000AD/TC57H1001AD's six operating modes are listed in the following table. Mode selection is achieved by applying TTL level signals to appropriate inputs. — PIN NAMES MODE ee POM | CE | TE Vp | Noo Do - 07 POWER Read THT t Te Data Out ative peti | Read Operation (Ta = 0 ~ 70°C) 7H 5V 5V__ High Impedance Program tc} ucla Data In to* H an High Impedance | Program Operation (Ta = 255°C) —_| Program Inhibit : 12.76v| easy | High imped Active pH tls i Program Verity | H = oL | OL Data Out Notes: H=V..L=V_.7=V.orv Read Mode The TC57H1000AD'TC57H1001AD has three control inputs. The chip enable (CE) input controis the operating power and should be used for device selection. The output enable (OE) and program control (PGM) inputs contro! the output buffers. Assuming that CE = OE = Vy. and PGM = V),.. once the address has stabilized, output data will be valid after the address access time has elapsed. The CE to output valid time (tc¢) is equal to the address access time {tac}. Assuming that CE = V\\_, PGM = Vj, and that the address has been stable for at least tagc, then output data will be valid after tog from the falling edge of OE. And assuming that CE = OE = V\\_ and that all address lines have been stable, then output data is valid after tpgyy from the rising edge of PGM Output Deselect Mode It CE = Vy. or OE = Vy, the outputs wil be in a high impedance state Therefore. two or more devices can be connected together on a common bus if the output of only one device is enabled. When CE is used for device selection, all deselected devices are in the low power standby moce. Standby Mode The TC57H1000AD/TC57H1001 AD has a iow power standby mode controlled by the CE signal By applying a MOS high level voltage (Vpp) to the TE input, the TC57H1000AD/TC57H1001AD 's placed in the standby mode which reduces the operating current to 100uA and puts the outputs in a high impedance state, independent of the OE input. Program Mode When the TC57H1000AD/TC57H1001AD is initially received by customers, al bits of the device are in the "1" state, which is, the erased state. Therefore, the object of the program operation is to introduce “0” data into the desired bit locations. The TC57H1000AD/TC57H1001 AD is in the programming mode when Vpp = 12.75V, PGM = CE = Vi, and OE = Vin. The TC57H1000AD/TC57H1001AD can be programmed at any address location at any time - either individually, sequentially, or at random. Program Verify Mode The verify mode is used to check that the desired data has been correctly programmed. The verify mode is activated when OE = CE = Vj, and PGM = Vi, TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. ASI

TC57H1000AD-85/100, TC57H1001AD-85/100 Non-Volatile Memory Program Inhibit Mode When the programming voltage (12.75V) is applied to the Vpp terminal, a high level CE or PGM input inhibits the TC57H1000AD/TC57H1001AD from being programmed. The programming of two or more EPROMs in parallel is easily accomplished. All inputs except for TE and PGM may be com- monly connected, then a TTL low level program pulse is applied to the TE and PGM of the desired device only while a TTL high level signal is applied to the CE of the other devices. High Speed Programming Mode The device is set up in the high speed programming mode when the programming voltage (+12.75V) is applied to the Vpp ter- minal with Vpp = 6.25V and PGM = Vi Programming is achieved by applying a single 0, 1ms TTL low level pulse to the PGM input after addresses and data are sta- ble. Then the programmed data is verified by using the program verify mode. if the programmed data is not correct, another pro- gram pulse of 0.1ms is applied and then the programmed data is verified. This should be repeated until the data has programmed correctly (max. 25 times) When programming has been completed, the data in all addresses should be verified with Vop = Vpp = SV. AS2 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

Non-Volatile Memory TC57H1000AD-85/100, TC57H1001AD-85/100 High Speed Programming Mode Flow Chart Vpp = 6:25:0.26V Vpp = 12.75:0.25V START ADDRESS | X> 25? ves NO NG VERIFY NEXT ADDRESS OK YES VERIFY NG | OK —

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TC57H1000AD-85/100, TC57H1001AD-85/100 Non-Volatile Memory Electric Signature Mode The electric signature mode allows one to read out a code from the TC57H1000AD/TC57H1001AD which identifies its manufacturer and device type. The programming equipment may read out the manufacturer code and device code from the TC57H1000AD/TC57H1001AD by using this mode before programming and automatically set the programming voltage (Vpp) and algorithm. The electric signature mode is set up when 12V is applied to address line AQ and the rest of the address lines are set to Vj. during a read operation. Data output under these conditions is the manufacturer code. The device code is output when address AQis set to Vix These two codes possess an odd parity with the parity bit being the MSB (D7). The following table shows the electric signa- ture of the TC57H1000AD/TC57H1001AD. |ManufacturerCode Ma | Ht vo [o To | % Device Code Va petete o{8 resraroovan| “* of oo fete 1 [1 | Notes: AQ = 12v#0.5V Al ~ AB, A10 ~ A16, CE, OE =v, FGM = V.. A-54 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.