TC574200D

TC574200D TOSHIBA | Alldatasheet

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Technical content

TC574200D-10, -120, -150 SILICON STACKED GATE CMOS 262,144 WORD x 16 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY

Description

The TC574200D is a 262,144 word x 16 bit CMOS ultraviolet light erasable and electrically programmable reac only memory. It is organized as either 256K words by 16 bits or 512K words by 8 bits. The TC574200D is compatible with the 40-pin 4M bit Mask ROM and is available in a 40-pin standard cerdip package. The 715742000 is fabricated using CMOS technology. Advanced circuit techniques result in both high speed and low power features with access times of 100ns/120ns/150ns and a maximum operating current of 7omA/10MHz The programming time of the TC574200D (except for EPROM programmer overhead) is only 28 seconds when using the high speed programming algorithm Features Pin Connection (Top View) (Reference) * Peripheral circuit CMOS Memory cell NMOS * Fast access time av) ao Das ard: 4o Das I ar Cha 39 Fas ar Che 39 as 10 120 -150 as C3 38 Dato as 3 38 Dato 359 9 ase a7 Dan as Che a7 an Yoo SVs5% | SVs10% | aa Cs a6 Dar ac (fs a6 Dar Temp 0°C ~ 70°C a Gs as an aie as an aie 33 Dats aiCs 33 Plas * Single 5V power supply ao Cs 32 Dare ao Cs 32 Fats . Qi ni Darter, “teQro a Davee Low power dissipation ono G1 30 Dicno ono Onn 30 [cxo ~ Active 70mA/10MH2 edn aPlosva-1 Dehra 29 Dorsia-t Standby 100WA oo G13 28 or oo Qs 28 Dor * Fully static operation os ia 27 Dora ose 27 ove o Gis 26 Dos or Qs 26 Los * Inputs and outputs TTL compatible os 6 2s ons oss 25 Pons * Three state outputs o Gy 22 Bos oo G7 2a PJos * High speed programming mod tpw = ow Cie 23 Don ow C18 23 Jon * Hoh speed Progamming mode tow =50i8 SS ET Ss Be compatible pinout TC534200P ost E20 2: voo 31 G20 2) Dvoo. © Standard 40-pin DIP cerdip package: WDIP40-P-600B 15742000 4M Mask ROM Pin Names 71¢534200P AQ~A17 | Address Inputs D0~ 014 Outputs (inputs) cE Chip Enable Input en eee | OE Output Enable Input DI5/A-1 | Output (Input)/Address Input BYTE: Word, Byte Select Input’ | Vee Program Supply Voltage Voo Power Supply Voltage (+5V) | GND | Ground | TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. A-85

TC574200D-10/120/150 Non-Voiatile Memory Block Diagram Vee GND Voo Dis ~~~ 0 CE i A-1 9 g | COLUMN | 5:2 COLUMN vO A0 © ADDRESS DECODER CIRCUIT BUFFERS \\ 10 | ROW | 4024 | MEMORY CELL ARRAY DECODER 262,144 x 16 BITS AI7 © Operating Mode PIN BYTE/ | | | mone EE | Vp) YO 00-07 08 - p14 | DI5/A-1 | POWER Read (16 Bits) U L H —_____ Data Out | a — Read (Lower 8 Bits) L L L (Lowes Sts) High Impedance | L Data Out Active Read(Upper8Bits) | Lo, LoL sv | (Upper 8 Bits) | High Impedance | H i Output Deselect tla q High Impedance \\ pur Desele High Impedance ~ o ‘ H High Imped: Standby LH . wonimpedance Standby L High Impedance so] 12.5V | 6.25V High impedance Active Program Verity : L Data Out Note H= Vy b= Vy." = Vor, Maximum Ratings SYMBOL Tem RATING UNIT Voo _ | Power Supply Voltage 06~7.0 | Vee __| Program Supply Voltage -06~ 140 V Vin __| Input Voltage -06~7.0 Vin(A9)_| Input Voltage (A9) 0.6 ~135 Vio Input/Output Voltage 0.6 ~ Vpn + 0.5 vou Po _| Power Dissipation Ww Tsounen | Soldering Temperature + Time 260+ 10 “C+ sec Tsing _| Storage Temperature -65 ~ 150 cc Torn _ | Operating Temperature 0-70 A-86 TOSHIBA AMERICA ELECTRONIC COMPONENTS, ING.

Non-Volatile Memory TC574200D-10/120/150 Read Mode DC Recommended Operating Conditions ¢5742000-10 7¢5742000-120/150 SYMBOL PARAMETER - " DC Characteristics (Ta = 0 ~ 70°C) SYMBOL PARAMETER TEST CONDITION fom. [omy | omax, | UNIT I, | input Leakage Current Vin = OV ~ Vo - [| - J +10 nA! j TE = OV, lout = OMA, f= 10MHz - | - | 70 | poor |, Operating Current TE=O0V.loyr=OmA1=83MHz] — | - | mA 'opoe TE = OV. lout = OMA, f= IMHz = [| - | 30 | 1-228" __ Standby Current " [ - | loose TE = Vo -0.2V = = 100 A Vox Output High Voltage lon = -400nA 24 = - y Vo __ Output Low Voltage lop = 2.1mA = = 04 prone Tow Nomage tl BMA lpp1__, Vpp Current | Vpr = OV ~ Vp + 0.6V = - 210 A Mu Ito _, Output Leakage Current Vout = 0.4V = Vop = = 210 AC Characteristics (Ta = 0 ~ 70°C) 10 “120 “180 | SYMBOL PARAMETER — - - UNIT tor: CE to Output in High-Z 0 50 0 [50 | 0 60 i BYTE to Output in High ‘sro Impedance ~ 70 AC Test Conditions Input Pulse Levels 2.4V/0.45V Input Pulse Rise and Fall Times 40ns max. Input Timing Measurement Reference Levels, 2.2V-0.8V Output Timing Measurement Reference Levels 2.0V/0.8V Output Load 11 TTL Gate and C, = 100 pF TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. A-87

€574200D-10/120/150 Non-Volatile Memory Capacitance (Ta = 25°C, f = 1MH2) SYMBOL ~ PARAMETER “TEST CONDITION MIN, MAX. | UNIT Input Capacitance (BYTE/Vpp) | Vin = OV [ - | to 120 pF “Ths parameter is poiodicaly sampled and is not 100% tested Timing Waveforms Word-Wide (16 Bit) Read Mode ton AUN L/) om : PANN LLL ~ a High Z High Z Note : BYTE/Vpp=Vin A-88 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

TC574200D-10/120/150 Non-Volatile Memory High Speed Programming Mode DC Recommended Operating Conditions frome [ || wt Vp tigh Wage | 22) Vag | “Va_InputtowVotage =i os PSCC Power Supply Voltage 6.00 6.25 6.50 Program Supply Voltage 12.20 | 1250 _ 12.80 DC Characteristics (Ta = 255°C, Vpp = 6.25V+0.25V, Vpp = 12.50V+0.30V) SYMBOL | PARAMETER TEST CONDITION fom, [ome | oMaX, [unt |u| Input Leakage Current Vin= OV ~ Vo To - = Vo. [Oupatowvorage ig =@ima S| a rs mA re [Vor Sippy Curent eps eav SY tas _| Address Setup Time = 2 = = tan | Address Hold Time = be = = tces | CE Setup Time - 0 - = toe | CE Hold Time = o - = | toes _| OF Setup Time | =~ | 2 | = = tos __ Data Setup Time = 2 = - us ton Data Hold Time T - poe) = = “typs | Vp Setup Time zl - 2 = = tos __| Voo Setup Time i - 2) - = | tew __ Program Pulse Width - 45 50 58 topw | Overprogram Pulse Width Note 1 ~ 45 | 50 | 55 log OE to Output Valid CE = Vy - - 100 Note 1: ‘coy, depends on the program pulse width wnich s required in the ita crogrammng AC Test Conditions input Pulse Levels 2.4V/0.45V input Pulse Rise and Fall Times 10ns max. | Input Timing Measurement Reference Levels 2.2Vi0.8V Output Timing Measurement Reterence Levels. 2.0V/0.8V Output Load 1 TTL Gate and C, = 100 pF A-90 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

Non-Volatile Memory 7C574200D-10/120/150 Timing Waveforms (Program) High Speed Programming Mode moral? CD tas tew tan topw -——> TYYYVYYVH x QA OO tore * I — el eee BYTE/Vpp tvos Voo PROGRAM PROGRAM VERIFY Notes: 1. Vpo must be applied simultaneously or before Vep and cut off simultaneously or after Vom 2. Removing the device from a programming socket and repiacing the device in the socket while Vpp = 12.5V may cause per- manent damage to the device. 3. The Vpp supply voltage is permitted to be up to 14V for programming. Voltages over 14V should not be applied to the Vep terminal. When the programming voltage is applied to the Vpp terminal, the overshoot voltage should not exceed 14V. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. AS

TC574200D-10/120/150 Non-Volatile Memory Erasure Characteristics Erasure is achieved by applying shortwave ultraviolet light which has a wavelength of 2537A (Angstroms) to the chip through the transparent window. The integrated dose (ultraviolet light intensity (W/crn?] x exposure time [sec.]) necessary for erasure should be a minimum of 16 [W ® sec/cm?] When the Toshiba sterilizing lamp (GL-15) is used and the device is exposed at a distance of 1 cm from the lamp surface, era- sure will be achieved within 60 minutes. Using commercial lamps whose ultraviolet light intensity is 12000 [uW/crn*] will reduce the exposure time to about 20 minutes. (In this case, the integrated dose is 12000 [4W/em?} x (20 x 60) [sec] = 15 [W * sec/cm*|,) Erasure begins to occur when exposed to light with a wavelength shorter than 4000A. Sunlight and fluorescent lights have 3000 ~ 4000A wavelength components. Therefore, when used under these lighting conditions for extended periods of time, opaque seals should be used (Toshiba EPROM Protect Seal AC907). Operation Information The TC574200D's eight operating modes are listed in the foliowing table, Mode selection is achieved by aopiying TTL level signals to approprate inputs. 1 - , PIN BYTE/ j : Move J D0 - 07 DB ~ 14 D15/A-1 | POWER Read (16 Bits) L L 4 | "Data Out | Data Out Read (Lower 8 Bits) | L L L | (Lowers Bits) | High Impedance | Data Out Active Read (Upper 8 Bits) L L L sv __ (Upper 8Bits) | High Impedance | H : Hq! High Impedance Output Deselect a toh imped Lj High impedance . | =| an impes : H High Impedance tandb) H * Lo Eee Standoy Standby L High Impedance . ¥ Program L H Data In Program Inhibit H | HH 125V 6.25V High Impedance Active Program Verity | DataOut Notes: H=V..L=V"=Vaarv Read Mode The TC574200D has a BYTE/Vop terminal that selects ward-wide (16 bit) output or byte-wide (8 bit) output. When BYTE/Vpp is set to Vy, word-wide output is selected, and the D15/A - 1 pin 's used for D15 data output. When BYTEVpp is set to Vj, byte- wide output is selected, and the D15/A - 1 pin is used for A - 1 address input. When A - 1 is set to Vj, in this condition, the data that is output is the lower 8 bits of the 16 bits which had been programmed. When A - 1 is set to Viy, the data output is the upper B bits, The TC574200D has two control inputs. The chip enable (CE) input controls the operating power and should be used for device selection while the output enable (OE) input controis the output buffers. Assuming that CE = OE = Vi. once the address has stabilized, output data will be valid after the address access time has elapsed. The CE to output valid time (tog) is equal to the address access time (tac). Assuming that CE = Vj, and that the address nas been stable for at least tacc. then output data will be valid after tog from the falling edge of OE. Output Deselect Mode If CE = Vy or OE = Vy,. the outputs will be in a high impedance state. Therefore, two or more devices can be connected together on a common bus if the output of only one device is enabled, When CE is used for device selection, all deselected devices are in the low power standby mode. Standby Mode The TC5742000 has a low power standby mode controlled by the CE signal. By applying a MOS high level voltage (Vpp) to the CE input, the TC5742000 is placed in the standby mode which reduces the operating current to 100pA and puts the outputs ina high impedance state, independent of the OE input. Program Mode When the TC5742000 is initially recerved by customers, all bits of the device are in the "1" state, which is the erased state. A-92 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

Non-Volatile Memory TC574200D-10/120/150 Therefore, the object of the program operation is to introduce “0” data into the desired bit locations. The TC574200D is in the pro- gramming mode when Vpp = 12.5V, TE = Vi_, and OE = Vj. Data to be programmed must be applied 16 bits in parallel to the data pins, The TC574200D can be programmed at any address location at any time - either individually, sequentially, or at random. Program Verify Mode The verify mode is used to check that the desired data has been correctly programmed. The verify mode is activated when OE = Vy. The programmed data should be compared with the original word-wide (16 bit) data. Program Inhibit Mode When the programming voltage (12.5V) is applied to the Vpp terminal, a high level CE input inhibits the TC574200D from being programmed. The programming of two or more EPROMs in parallel with different data is easily accomplished. All inputs except for CE and OE may be commonly connected, then a TTL low level program pulse is applied to the CE of the desired device only while a TTL high level signal is applied to the CE of the other devices. High Speed Programming Mode The device is set up in high speed programming mode «when the programming voltage (12.5V) 's applied to the Vpp terminal with Vop = 6.25V. Programming is achieved by applying a single SQus TTL ‘ow level pulse to the CE input after acaresses and data are stable Then the programmed data is verified by using the program verity mode. If the programmed data is not correct. another program pulse of SQus is applied and then the programmed data is verified. This should be repeated until the data nas programmed cor- rectly (max. 25 times) After correctly programming the selected address. an overprogram pulse with the same width as that needed for initial program- ming should be applied. When programming has been completed. the data in all addresses should be verified with Vpp = Vep = SV. TOSHIBA AMERICA ELECTRONIC COMPONENTS, ING. A-93

Secammamaaaamamaaasaaaaaasaamacasacaamcaacasasaaaamasacacacccscaccmmmmmmsaaammmammmmaallll _| TC574200D-10/120/150 Non-Volatile Memory Pa ala ey High Speed Programming Mode Flow Chart C staat) START ADORESS Vpp «625 BYTEN pp = 125 ~ ~ Lixo E NEXT ADDRESS ‘OR ONE PULSE OF 50X ys DURATION <a> ‘ADORESS? Von = 50 BYTENpp = 50V ox PASS A904 TOSHIBA AMERICA ELECTRONIC COMPONENTS, ING.

Non-Volatile Memory C574200D-10/120/150 Electric Signature Mode The electric signature mode allows one to read out a code from the TC574200D which identifies its manufacturer and device type. ‘The programming equipment may read out the manufacturer code and device code from the TC574200D by using this mode before programming and automatically set the programming voltage (Vpp) and algorithm. The electric signature mode is set up when 12V is applied to address line AQ and the rest of the address lines are set to Vi_ during a read operation. Data output under these conditions is the manufacturer code. The device code is output when address AO is set to Vj. These two codes possess an odd parity with the parity bit being (D7) The following table shows the electric signature of the TC574200D. HEX. ane" [os] oeoe|oe ooo] [orm] | [| | 8 [Manviacurercode [vu] = [=| * sets ls [ey stoops [ato fo] o [ms [Deveeode [vm TT ttt ttt pefofoyr ty prs jms] Notes: Ad = 12.0V#0.5V “Don't care At ~ AB, A10 ~ A17. CE. OE = Vy BYTEWop = Vix TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. A95

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