TC57256D TOSHIBA | Alldatasheet

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Technical content

TOSHIBA MOS MEMORY PRODUCT 32,768 WORD X 8 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABEL READ ONLY MEMORY

DESCRIPTION

The TC57256D is a 32,768 word X8 bit CMOS ultraviolet light erasable and electrically program­ mable read only memory. For read operation, the TC57256D's access time is 200ns, and the TC57256D operates from a single 5-volt power supply and has low power standby mode which reduces the power dissipation without increasing access time. The stand­ by mode is achieved by applying a TTL-high level signal to the CE input. Advanced CMOS technology reduces the maximum active current to 30 mA/5MHz

FEATURES

  • Peripheral circuit: CMOS Memory cell N-MOS
  • Low power dissipation 30mA/5MHZ (active) 100llA (standby)
  • Fast access time TC572560-20 200 ns TC572560-25 250 ns PIN CONNECTION (TOP VIEW) TC57256D-20 TC57256D-25 SILICON STACKED GATE MOS and standby current to 100pA. For program operation, the programming is achiev­ ed by using the high speed programming mode. Program supply voltage is 21 V. The programming of the TC57256D is accomplished within one and a half minutes (typ.) TC57256D is fabricated using CMOS technology and N-channel silicon double layer gate MOS technology.
  • Single 5V power supply
  • Full static operation
  • High speed programming mode
  • Inputs and outputs TTL compatible
  • Pin compatible with ROMS TC53257P, TMM23256P - 'and EPROM i27256
  • Standard 28 pin DIP cerdip Package BLOCK DIAGRAM PIN NAMES MODE SELECTION Ao ,...,A14 Address Inputs 0 0 "", 0 7 Outputs (Inputs) ~ CE OE vpp vee 0 0 ,...,07 CE Chip Enable Input OE Output Enable Input Read L L 5V Data Out Output Deselect * H 5V 5V High Impedance
  • Active Vpp P~ograrn Supply Voltage Standby H * 5V High Impedance Standby Program L H Data In Vee Vee Supply Voltage (+5V) Program Inhibit H * 21V 6V High Impedance Active GND Ground Program Verify L L Data Out * * , H or L 0-65 -

Soldering Temperature Time Storage Temperature Operating Temperature READ OPERATION D.C.RECOMMENDEDOPERATING'CONDITONS SYMBOL PARAMETER RATING -0.6-7.0 -0.6-22.0 -0.6_7.0 -0.6 - Vee + 0.5 1.5 260 ·10 -65 -125 -40 -85 MIN. TYP. MAX. VIH Input High Voltage 2,2 - Vee +0.3 VIL Input Low Voltage -0.3 - 0.8 Vee Vee Power Supply Voltage 4.75 5.00 5.25 Vpp Vpp Power Supply Voltage 2.0 Vee Vee + 0.3 D.C. and OPERATING CHARACTERISTICS (Ta = -40 - 85 D C, Vee = 5V ±5%) SYMBOL PARAMETER TEST CONDITION MIN. TYP. MAX. III Input current VIN =O-Vee - - ±10 lee01 Operating Current CE =0 I f = 5MHz - - 30 leeo2 I f= 1MHz - - 10 Ices 1 Standby Current CE = VIH - - 1 lees2 CE = Vee -0.2V - - 100 VOH Output High Voltage IOH = -400JlA 2.4 - - VOL Output Low Voltage IOL = 2.1mA - - 0.4 IpP1 Vpp Current Vpp = 0 - Vee + 0.3V - - ±10 ILO Output.Leakage Current VOUT = O.4V- Vee - - ±10 A.C. cHARACTERISTICS (Ta = -40 - 85 D C, Vee = 5V ±5%, Vpp = 2.0V - Vee + 0.3V) SYMBOL PARAMETER TEST CONDITION TC57256D-20 TC57256D-25 tAee Address Access Time teE CE to Output Valid tOE OE to Output Valid tOF1 CE to Output in High-Z tOF2 OE to Output in High-Z tOH Output Data Hold Time , A:'C.TEST COND'TONS Output Load Input Pulse Rise and Fall Times Input Pulse Levels Timing Mesurement Reference LeVel MIN. CE = OE = VIL - OE = VIL - CE = VIL - OE = VIL 0 CE = VIL 0 CE = OE = VIL 0

1 TT L Gate and CL = 100pF

10 ns Max. 0,45 - 2,4V MAX. MIN. 200 - 200 - 70 - 60 0 60 0 - 0 Inputs 0.8V and 2.0V, Outputs 0.8V and 2.0V - 0-66 - MAX. 250 250 100 UNIT V V V V W DC· sec DC DC UNIT V V V V UNIT JlA mA mA mA J).A V V JlA JlA UNIT ns ns ns ns ns ns

.cApAcfrANcif'*(Ta = 25°C, f = 1MHz) SYMBOL PARAMETER TEST CONDITION CIN Input Capacitance 'VIN = OV COUT Output Capacitance VOUT = OV *This parameter is periodically sampled and is not 100% tested. tOE ; PROGRAM',OPERATION l D.C. RECOMMENDED OPERATING CONDITONS SYMBOL PARAMETER VJH Input High Voltage VIL I nput Low Voltage Vec Vce Power Supply Voltage Vpp Vpp Power Supply Voltage MIN. TYP. - 4 - 8 MIN. TYP. 2.2 - -0.3 - 5.75 6.0 20.5 21.0 TC57Z56D-ZU TC57256D-25 MAX. UNIT 6 pF 12 pF MAX. UNIT Vee + 0.3 V 0.8 V 6.25 V 21.5 V D.C. and OPERATING CHARACTERISTICS (Ta = 25 ±5°C, Vee = 6V ±O.25V, Vpp = 21V ±O.5) SYMBOL PARAMETER TEST CONDITION MIN. TYP. MAX. UNIT III Input Current VIN = 0 '" Vee - - ±10 /lA VOH Output High Voltage IOH = -400/lA 2.4 - - V VOL Output Low Voltage IOL = 2.1mA - - 0.4 V . lec Vee Supply Current - - - 30 mA IpP2 Vpp Supply Current Vpp = 21.5V - - 30 mA :'A::C.'PROGRAMrrfING"?fi'ARActEfHstlcS (Ta = 25 ± 5°C, Vee = 6V ±O.25V, Vpp = 21V ±O.5) SYMBOL PARAMETER TEST CONDITION MIN. TYP. MAX. UNIT tAS Address Setup Time - 2 - - /ls tAl-! Address Hold Time - 2 - - /lS teEs CE Setup Time - 2 - - J,l.S tCEH CE Hold Time - 2 - - /lS tOES OE Setup Time - 2 - - ~s tOEH OE Hold Time - 2 - - /lS tos Data Setup Time - 2 - - /lS tOH Data Hold Time - 2 - - J,l.S tvs Vpp Setup Time - 2 - - /ls tPN Initial Program Pulse Width CE = VIL, OE = VIH 0.95 1 1.05 ms toPN Overprogram Pulse Width Note 1 0.95 1 21 ms tov CE to Output Valid OE = VIL - - 1 /lS tOF1 CE to Output in High-Z OE = VIL - - 150 ns - 0-67 -

A.C. TEST CONDITIONS Output Load Input Pulse Rise and Fall Times Input Pulse Levels Timing Measurement Reference Level

1 TTL Gate and CL (100pF)

10 ns Max. 0.45'" 2.4V Input 0.8V and 2.0V, Output 0.8V and 2.0V Note 1: The length of the overprogram pulle may vllry III function of the counter value X. TIMING WAVEFORMS (PROGRAM) (Vee = 6V ±O.25V, Vpp = 21V ± O.5V) vpp tvs PROGRAM INITIAL PROGRAM PROGRAM VERIFY PROGRAM OVER PROGRAM Note: (1) Vee must be applied simultaneously with or before Vpp and cut off simultaneously with or after Vpp. (2) Removing the device from socket and setting the device in socket with Vpp=21 V may cause permanent damage to the device. (3) The Vpp supply voltage is permitted up to 22V for program operation; voltages over 22V should not be applied to the Vpp terminal. When the switching pulse voltage is applied to the Vpp terminal, the overshoot voltage of its pulse should not exceed 22V. - 0-68 -

The TC57256D's erasure is achieved by applying shortwave ultraviolet light which has a wavelength of

2537 A (Angstroms) through the chips transparent

window. The integrated dose (ultraviolet light intensity [w/cm2] X exposure time [sec.]) for erasure should be a minimum of 15 [w· sec/cm2] When the Toshiba GL-15 sterilizing lamp is used and the device is exposed at a distance of 1 cm from the lamp surface, the erasure will be achieved within 60 minutes. OPERATION INFORMATION The TC57256D's six operation modes are listed in the following table. Mode selection can be achieved CE OE Read Operation Read L (Ta';' -40 _ 85°(:) Output Deselect * Standby H Program Operation Program L (Ta = 25 ±5°C) Program1nhibit H Program Verify L READ MODE The TC57256D has two control functions. The chip enable (CE) controls the operation power and should be used for device selection. The output enable (OE) controls the output buffers, independent of device selection. Assuming that CE=OE=VIL, the output data is valid L H H L TC57256D-20 TC57256D-25 And using commercial lamps with an ultraviolet light intensity of 12000 [p.w/cm2] will reduce the exposure time to about 20 minutes. (In this case, the integrated dose is 12000 [p.w/cm2] X (20X60) [sec] ~ 15 [w· sec/cm2] .) The TC57256D's erasure begins to occur when exposed to light with wavelength shorter than 4000A. Both sunlight and flourescent lamps include 3000-4000A wavelength components. Therefore when used under such lighting for extended periods of time, opaque seals-Toshiba EPROM Protect Seal AC901-are available by applying TTL level signal to all inputs. Vpp vee 0 0 -07 Data Out Active 5V 5V High Impedance Active High Impedance Standby Data In Active 21V 6V High Impedance Active Data Out Active at the outputs after the address access _ time from stabilizing of all addressess. The CE to output valid (tCE) time is equal to the address access time (tACC). Assuming that CE=VIL and all addresses are valid, the output data is valid at the outputs after tOE from the falling edge of CEo - 0-69 -

With CE=VIH or OE=VIH, the outputs will be in high impedance state. Therefore two or more TC57256D's can be connected STANDBY MODE The TC57256D has a low power standby mode controlled by the CE signal. By applying a high level to the CE input, the TC57256D is placed in the standby mode which PROGRAM MODE Initially, when received by customers, all bits of the TC57256D are in the "1" state which is the erased state. The programming operation introduces "Os" data into the desired bit locations by electrical program­ ming. PROGRAM VERIFY MODE The verify mode is to check that desired data is correctly programmed on the programmed bits. PROGRAM INHIBIT MODE Under the condition that the program voltage (+21 V) is applied to Vpp terminal, a high level CE input inhibits the TC57256D from being programmed. Programming two or more TC57256D's in parallel with different data is easily accomplished: All inputs HIGH SPEED PROGRAMMING MODE The program time can be greatly decreased by using a high speed programming mode. The device is set up in the high speed programming mode. The device is set up in the high speed programming mode when the programming voltage (+21 V) is applied to the Vpp terminal with VCC=6V. Programming .is achieved by applying a single TIL low level 1 ms pulse to the CE input after addresses and data are stable. Then the programmed data is verified in the Program Verify Mode. If the programmed data is not correct, another program pulse of 1 ms is applied and the programmed together on a common bus line. When CE is decoded for device selection, all deselected devices are in low power standby mode. reduces the operating current to 1 00,uA. The outputs will be in a high impedence state, independent of the OEinputs. The TC57256D is in the programming mode when . the Vpp input is at 21 V and CE is at TIL-Low OE=VIH. The TC57256D can be programmed at any location, anytime - either individually, sequentially or at ran­ domly. The verify is accomplished with OE and CE at VI L· except for CE may be commonly connected, a TIL low level program pulse is applied to the CE of the desired device only, and TIL high level signal is applied to the other devices. data is verified. This should be repeated until the program operates correctly (max. 20 times). After correctly programming the selected address, an additional program pulse with a width equal to that needed for initial programming is applied. When programming has been completed, the data in all addresses should be verified with VCC=Vpp=5V. This high speed program algorithm allows the programming of the TC57256D to be accomplished within one and a half minutes (typ.) - 0-70 -

HIGH SPEED PROGRAM MODE FLOW CHART ADDRESS .. NEXT ADDRESS OVERPROGRAM X PULSES OF 1msec OR ONE PULSE OF Xmsec DURATION - 0-71 - TC57256D-20 TC57256D-25

Electric signature mode allows a code to be read from the TC57256D which identifies its manufacture and device type. The programming equipment may be used to read the manufacturer code and device code from the TC57256D by using this mode before program operation and automatically set program voltage (Vpp) and algorithm. Electric Signature mode is set up when 12V is applied to Ao 07 06 05 ~ SIGNATURE (10) (19) (18) (17) Manufacture Code VIL 1 0 0 Device Code VIH 0 0 0 Notes: A9 c 12V ± 0.5V Al - As. AlO - AI4 • CEo OE = VIL OUTLINE DRAWINGS 37.7 MAX. 8.9 TYP. AO.64 address line Ag and the rest of address lines are set to VIL in read operation. Data output under these conditions is the manufacturer code. Device code is identified when address AO is set to VIH. These two codes possess an odd parity with the parity bit of MSB (07)' The following table shows electric signature of TC57256D. 04 03 02 01 00 HEX. 1 1 0 0 0 98 0 0 1 0 0 04 Unit in mm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ,.... ci C'I M Note 1 1 '5.24+0.3 ~ I 0.25.:g.~g I . 17.4 MAX. . Note 2 Note: (1) Each lead pitch 2.54mm. All leads are located within 0.25mm of their true longitudinal position with respect to No.1 and No. 28 leads. (2) This value is measured at the end of leads. (3) The dimensions are in millimeters. D-72 -