TC514100J/Z-10 | DigiCamel IC Datasheet

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TC5141001 TOSHIBA | Alldatasheet

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Technical content

FEEL LTT LESAN aT Ee NE TET * This is advanced information and specifications 4,194,304 WORD x 1 BIT DYNAMIC RAM are subject to change without notice.

DESCRIPTION

The TC514100J/2 is the new generation dynamic RAM organized 4,194,304 words by 1 bit. The TC514100J/Z utilizes TOSHIBA's CMOS Silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and to the system user. Multiplexed address inputs permit the TC514100J/Z to be packaged in a standard 26/20 pin plastic SOJ and 20. pin plastic ZIP. The package size pro- vides high system bit densities and is compatible with widely available automated testing and insertion equipment. System oriented features include single power supply of 5V#10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL.

FEATURES

+ 4,194,304 word. by 1 bit organization + Low Power + Fast access time and cycle time 550aW Operating (TC51410CJ/2~-80) [oo SS™S~SCSS; ©5141 00/Z-80/~10 468nW Operating (TCS14100J/2--10) FRACTRAS Access Time| 80ns [ 100ns | 5+ 9miW MAX. Standby Jean |Sozum Address + Output unlatched at cycle end allows two- aa |Reeees Mine dimensional chip select fon + Connon 1/0 capability using "EARLY WRITE" Cycle Time operation =e — fre [eet size" | sms | Gone |” iisonly reftesh, Hidden reftesh, Fast PC |Gyele Time eons 60ns RAS-only refresh, Hidden refresh, Fast + Single power supply of 5V+10% with a Page Mode and Test Mode capability built-in Vay generator + All inputs and output TTL compatible + 1024 refresh cycles/léms PIN CONNECTION (TOP VIEW) + Package Plastic S0J: TC514100J a. Plastic ZIP: TC514100z Plastic SOJ \\Plastic ZIP asenc Dinf?” 26h Vss a9lD rs ‘WRITEY?2 D Door gy Io TaSHS «Bab ORS eng. (aes BLOCK DIAGRAM N.C.d4 23D N.C. wasps (ierre WRITE Aogs 22D as *3 fe] aio 4 aoqs 18 a8 AOBL TA ay Wo.2 OL0ck BUFFER Alfio ivf a7 a2 as GENERATOR 3 “aii? hae vec BAAS — A3g12 15D a5 ashi fs — Vecqis 4p aa artis Bal4e COLUMN HI Blas noo apprsss =[_ SY SOLMN PIN NAMES rer ee SENSE AMP. IK0~ ALO [Address Inputs 450 . Row Address Strobe ato ASO REFRESH

460 CouNTER(E) Loy

SuBOE RATING | UNITS | NOTE Input Voltage Output Voltage Your Power Supply Voltage Operating Tenperature [Torr { ow70 | ec | 1 _| [Storage Temperature | ‘Tsre | -ssaiso_|*c | 1 | Soldering Temperature - Time | Tsorper | 260 - 10 [ *cesec | 1 ‘| Power Dissipation a Short Circuit Output Current [Tour [50k RECOMMENDED DC OPERATING CONDITIONS (Ta=0~ 70°C) PARAMETER Laan. TP [aOR [NOTE] Supply Voltage [45 5.0 | 5.5 |v [2 _| Tnput High Voltage [24 [- | 6s |v [2 _| Tnput Low Voltage a DC ELECTRICAL CHARACTERISTICS (Vcc=5V+10%, Ta=0~ 70°C) SYMBOL] PARAMETER rw. [ax.] uvrts|NorEs | I¢c,_| Average Power Supply Operating Current 70814100772" 80 100 34,5 (RAS, CAS, Address Cycling: ‘Rc=RC MIN.) | resisro0zz-10 | - | 35 | STANDBY CURRENT Iccg | Power Supply Standby Current 2 (RAS=CAS=VzH) RAS ONLY REFRESH CURRENT [200 | Tcc3 | Average Power Supply Current, RAS Only Mode $200772-60 [= 200 3,5 FAST PAGE MODE CURRENT [ res1s10072-00 | 8 Iccg | Average Power Supply Current, Fast Page Mode: } 70524100%. o [=| 60 | 34,5 (RAS=Vz_, CAS, Address Cycling: tpo=tpc uin.)| resreio0s/z-10 | | 50 | STANDBY CURRENT Ices |Power Supply Standby Current 1 ¥ (RAS=CAS=Vcc-0. 2V) CAS BEFORE RAS REFRESH CURRENT Tecg |Average Power Supply Current, CAS Before [= | TAS Mode (RAS, CAS cycling: tRo-tno MIN.) | T2s1eiooa7z10 | - [5 | INPUT LEAKAGE CURRENT | — Txy(L) |Input Leakage Current, any input (OVS Vyy S 6.5V, All Other -10/ 10 Pins Not Under Test=0V) . OUTPUT LEAKAGE CURRENT Fort) | Popre seer oe BS ours 5.50) j20] 20] oa || OUTPUT LEVEL vi Vou |Ovceut "H" Level Voltage (Iour=-5mA) fesf-[v [| OUTPUT LEVEL AQ

ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Vec=5V#10%, Ta=0~ 70°C) (Notes 6, 7, 8) ome] names eTocs | [FRe [Rando Read oF Weite Gele ise [a0 - [aso - | = | | [trMW [Read-Modify-Write Cycle Time [a75 | - [aol - [sf | fie [iar te tte Gute ee ef Fast Page Mode Read-Modify-Write |] = [=| | FRAC [access Tine Fos BSS [=o ae Fae _|ascess tine trom GAS | = [20 | =| 25] m= [onan] ee ee ch Frora__|accese Tine fron GAS Precharge | - | 6s | = | 55 [ m= [9 _| Faiz [ens eo ovtpor in tows | 0 | - | 0] -] = [> Fore Joucput nutter turmoft belay [0 [2 | o| 0 [mw] | FaasP”[RA8 Bulse wiaeh (Gast Page Hous) [00 [200,000] 100 | 200,000 | ne_| | Fash [ems Wola Tine ST | oe | esi [CaS vole tine of =f a0 | | FRuCP [Gas Precharge to MAS wid Hee [as | - | ss|_- | = | | eas [GAS Potse wigeh _——_—~—*d: a 10,000 | 2s | 10,000 | ae | Rca |RaS co G18 Delay Time i 20 | oo | as] sp we Je Fab [FAS eo coluan Address Delay Tine [is | «0 | 20 | 0 | we [as | Fear [CaS to FAS Precharge Time | _s | - | a0} - [| Fer |S Prectarge Tine Sd | Po] | Fast” [Row Address See-Up Tine |_| - | of =] |] Fai |fow Address wold Tine | a0. [ =P s|_- | |_| Fase_|ootvan Agrees Seep tine |_| - [0] =} = |] Fai [column Address Wold Tine Pas | - [ [= [|_| pe egress fe [Pal [ol | to RAS FRAC [coluen Murase vo WS teed tine |= sep Face [Rest comand Set-Up Tine fo | - | 0] > P|] Faci [Read tomand oid Tine | 0] =| of - | |n_| fase [tage eens oT | of = fa | [Fuck [write Connand Hold Time | us [= Tao = is AS

TC514100J/Z—-80 TC514100J/Z—10 ; ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS SYMBOL PARAMETER ~80 -10 UNITS|NOTES [an oa [ens | | rere fe [To [eT [hie __|weice Command Pelee man fs | = | 20] - | |_| [Fnit__|Weite Comand to TAS Lead Tine | a0 | - | 2 | - |» |_| [Foi |write Command to CAS bead time | 20 | - | 2 | - [es] | [fos [Baca set-up tine ———S~s SY | | os [ids Joata void time ———SSSSCSC~ | 2 a [foim [Date Hota Tine referenced oS | 60 | - | 75] - |] _| finsr [Refresh Period ———SSSSSCSC~s Sd | ed fives |ieite oman Sectp eC | OP [Sow [CAS to WRITE Delay Time | 20 S| - fs | - [ns fas | | t CAS Precharge to WRITE Delay Time 4 CPD | (Fast Page Mode) 5 13 [EcSR [CRS Ser-vp Tine (CE before MSGi) | 5 | - | 5) - |] | |tcun [CAS Hold Time (CAS before RAS cycle) | 15 | - [| 20 | = | ns] | [resc AS to CHS Precharge Tine | _© = | O| - pm] | for [ittnnst Goce mecan | [1 =| -[*{ . (CAS before RAS Counter Test Cycle) [fins _[ursee Command Ser-Up Tine(Test Mode T=) 10 [> | 20] - [ws] | [Fit |irice Conend Hoid Tine (lest Yode Ta) | 10] - | 0] - [as] | t WRITE to RAS Precharge Time 10 10 WRP | (CAS before RAS Cycle) too, |WRITE to RAS Hold Time 10 10 WRH | (CAS before RAS Cycle) . A-4

NOTES: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. 2. All voltages are referenced to Vgs. 3. Ic¢c1, Icc3, Icc4, Icc6 depend on cycle rate. 4. Iccrs Icca depend on output loading. Specified values are obtained with the output open. 5. Column address can be changed once or less while RAS=Vyzz, and CAS=Vzy. 6. An initial pause of 200us is required after power-up followed by 8 RAS only refresh cycles before proper device ‘operation is achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh cycles are required. 7. AC measurements assume t7=5ns. 8. Vyy(min.) and Vy,(max.) are reference levels for measuring timing of input signals. Also, transition times are measured between Vyq and Vy. 9. Measured with a load equivalent to 2 TTL loads and 100pF. 10. torr(max.) defines the time at which the output achieves the open circuit con- dition and is not referenced to output voltage levels. ll. Either troy or tary must be satisfied for a read cycle. 12, These parameters are referenced to CAS leading edge in early write cycles and to WRITE leading edge in read-modify-write. cycles. 13. tycs, trwo» town» tawp and tcpyp are not restrictive operating parameters. They are included in the data sheet at electrical characteristics only. If tycs2twcs » (min.), the cycle is an early write cycle and data out pin will remain open cir- cuit (high impedance) through the entire cycle; If tryp2tryp (min.), tow 2 tewp(min.), tayp2 tayp (min.) and topup & tcpwp (min.) (Fast Page Mode), the cycle is a read-modify-write cycle and the data out will contain data read from the selected cell: If neither of the above sets of conditions is satisfied, the condition of the data out (at access time) is indeterminate. + 14, Operation within the tpep(max.) limit insures that tpa;(max.) can be met, trcp(max.) is specified as a reference point only: br trop is greater than the specified tpcp(max.) limit, then access time is controlled by tcac. 15. Operation within the tpap(max.) limit insures that tpac(max.) can be met. trap(max.) is specified as a reference point only: If t. is greater than the specified tpan(max.) limit, then access time is controllet by tAa.

™C514100J/Z—80 TC514100J/Z—10 . me ry A = ae eed | ee tasR) ey et a ‘us [7 trac pe | torr: . 2 "H" or "L"

TC514100J/Z—80 TC514100J/Z—10 : WRITE CYCLE (EARLY WRITE’ oo a, _ ace | somue ey ee wer | [| | oy Ly, RE

TC514100J/Z—80 7C514100J/Z-10 - —_ [| bed) : cu cor . 2 "R" or "L"

TC514100J/Z—10 , FAST PAGE MODE READ CYCLE ss jYiIE— trasP 8 in oF worse UTR 2 WOM coe > WO cs WD 2m « WLLL | tRaD troH | ; ; tRRy von — TI i Tr pe ~ bel ea SoLz | torr toLz| torr ew tore! , : "H" or "uN A-10

TC514100J/Z—80 TC514100J/Z-—10 - FAST PAGE MODE WRITE CYCLE (EARLY WRITE) os EAS oun “fom KOE = WON = WO =) | sere" kk * Z: "q" or wpe

7TC514100J/Z—80 TC514100J/Z—10 | Dour _ > ove SM

TC514100J/Z—80 TC514100J/Z-10 : Ore al = : oe Ct vr LLL LLL Dour i — p open NOTE: AO’ Al0="H" or "L" 2H" or "LY

TC514100J/Z—80 TC514100J/Z—10 HIDDEN REFRESH CYCLE (READ) IESE

TC514100J/Z—80 TC514100J/Z—10 : HIDDEN REFRESH CYCLE (WRITE) sons ™ “TYE vor WO come KIM | co ct | [om von T+ =U) MM 2H" or "LN

TC514100J/Z—80 7TC514100J/Z-10 . CAS BEFORE RAS REFRESH COUNTER TEST CYCLE ar =o ‘ soome J — TLL TTT READ CYCLE RAL t | poe Ey Dout You — OPEN ae) aoe OUT Yo. — Hl = OPEN | ae), TN =I TILL You — _| mia = y eee) a | _AT ZZ: "RH" or "L" 7s - A-17

TC514100J/Z—10 , won = TNL

TC514100J/Z—80 TC514100J/Z-10 . tcp, i .. mee MMMM WL. tox [| trac eau | tor i: "8" or"

TC514100J/Z-10 | et _| = | sao om 7 ULE wea f [ ~BS | tpn

TC514100J/Z—80 TC514100J/Z-10 . I FAST PAGE MODE READ CYCLE IN THE TEST MODE ‘a — sus ms vu —_ om Le tet vw — RCS i} lt RCS RCH. mm im RCH L, * ve | dl WZ: "H" or "LY A-21

TC514100J/Z—80 TC514100J/Z-—10 . TOO 0 FAST PAGE MODE WRITE CYCLE (EARLY WRITE) IN THE TEST MODE vn snare a = sous" “TY now Opi ca. Neon Ceo 4 sare TY : ZA: "H" or "LY

TC514100J/Z—80 TC514100J/Z—10 a TEST MODE The TC5141003/Z is the RAM organized 4,194,304 words by 1 bit, it is internally organized 524,288 words by 8 bits. In “Test Mode", data are written into 8 secotrs in parallel and retrieved the same way. Agr» A10c and Agc are not used. If, upon reading, all bits are equal (all "1"s or "Q"s), the data output pin indicates a "1". If any of the bits differed, the data output pin would indicate a "0". Fig. 1 show. the block diagram of TC514100J/Z. In "Test Mode", the 4M DRAM can be tested as if it were a 512K DRAM. . “WRITE, CAS Before RAS Refresh Cycle" puts the device into "Test Mode". And "CAS Before RAS Refresh Cycel" or "RAS Only Refresh Cycle" puts it back into "Normal Mode". In the Test Mode, "WRITE, CAS Before RAS Refresh Cycle" performs the refresh operation with the internal refresh address counter. The "Test Mode" function reduces test times (1/8 in case of N test pattern).. A-23

TC514100J/Z—80 TC514100J/Z—10 ; eee BLOCK DIAGRAM IN THE TEST NODE Veo jor, A100, 4oc ? tor, A100, Aoc A ” | Norma ira ml 5 aS arms > t (Se el : So S Normal | FAR, Ato, Ao zg |} eae Er eee Ul || WE U5 se ATI re Aor, 4100, 40c o 4 ae, ——e | rere ie er H Fig. 1 A-24

Product Information

TC514100J/Z-10 specifications and overview.

Summary

4,194,304 WORD x 1 BIT DYNAMIC RAM

Description

4,194,304 WORD x 1 BIT DYNAMIC RAM

Source title TC514100J/Z-10 Datasheet(PDF) - Toshiba Semiconductor

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