TC4405MJA

TC4404 TELCOM | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 6

Technical content

4-219TELCOM SEMICONDUCTOR, INC. TC4404 TC4405 INPUT GND EFFECTIVE INPUT C 12 pF 300 mV VDD PULL UP PULL DOWN 2 (3) A (B) 8 (6) 7 (5) TC4404 INVERTING TC4405 NONINVERTING4.7V

FEATURES

n Independently-Programmable Rise and Fall Times Reverse Current (Either Polarity) n Input Withstands Negative Swings Up to –5V

APPLICATIONS

n Driving Bipolar Transistors n Driver for Nonoverlapping Totem Poles n Reach-Up/Reach-Down Driver 1.5A DUAL OPEN-DRAIN MOSFET DRIVERS GENERAL DESCRIPTION The TC4404 and TC4405 are CMOS buffer-drivers constructed with complementary MOS outputs, where the drains of the totem-pole output have been left separated so that individual connections can be made to the pull-up and pull-down sections of the output. This allows the insertion of drain-current-limiting resistors in the pull-up and/or pull- down sections, allowing the user to define the rates of rise and fall for a capacitive load; or a reduced output swing, if driving a resistive load, or to limit base current, when driving a bipolar transistor. Minimum rise and fall times, with no resistors, will be less than 30 nsec for a 1000-pF load. There is no upper limit. For driving MOSFETs in motor-control applications, where slow-ON/fast-OFF operation is desired, these de- vices are superior to the previously-used technique of add- ing a diode-resistor combination between the driver output and the MOSFET, because they allow accurate control of turn-ON, while maintaining fast turn-OFF and maximum noise immunity for an OFF device. When used to drive bipolar transistors, these drivers maintain the high speeds common to other TelCom driv- ers. They allow insertion of a base current-limiting resistor, while providing a separate half-output for fast turn-OFF. By proper positioning of the resistor, either npn or pnp transis- tors can be driven. For driving many loads in low-power regimes, these drivers, because they eliminate shoot-through currents in the output stage, require significantly less power at higher frequencies, and can be helpful in meeting low-power budgets. Because neither drain in an output is dependent on the other, these devices can also be used as open-drain buffer/drivers where both drains are available in one device,

ORDERING INFORMATION

Part No. Package Temperature Range TC4404COA 8-Pin SOIC 0 °C to +70°C TC4404CPA 8-Pin PDIP 0 °C to +70°C TC4404EOA 8-Pin SOIC – 40 °C to +85°C TC4404EPA 8-Pin PDIP – 40 °C to +85°C TC4404MJA 8-Pin CerDIP – 55 °C to +125°C TC4405COA 8-Pin SOIC 0 °C to +70°C TC4405CPA 8-Pin PDIP 0 °C to +70°C TC4405EOA 8-Pin SOIC – 40 °C to +85°C TC4405EPA 8-Pin PDIP – 40 °C to +85°C TC4405MJA 8-Pin CerDIP – 55 °C to +125°C FUNCTIONAL BLOCK DIAGRAM TC4404/5-6 10/21/96

4-220 TELCOM SEMICONDUCTOR, INC. ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS: Specifications measured at TA = +25°C with 4.5V ≤ VDD ≤ 18V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Input VIH Logic 1 High Input Voltage 2.4 — — V VIL Logic 0 Low Input Voltage — — 0.8 V IIN Input Current – 0V ≤ VIN ≤ VDD – 1 — 1 µA Output VOH High Output Voltage V DD – 0.025 — — V VOL Low Output Voltage — — 0.025 V R O Output Resistance I OUT = 10 mA, VDD = 18V; Any Drain — 7 10 Ω IPK Peak Output Current (Any Drain) Duty cycle < 2%, t ≤ 300µsec — 1.5 — A IDC Continuous Output Current (Any Drain) — — 100 mA IR Latch-Up Protection (Any Drain) Duty cycle < 2%, t ≤ 300µsec > 500 — — mA Withstand Reverse Current Switching Time (Note 1) tR Rise Time Figure 1, C L = 1000 pF — 25 30 nsec tF Fall Time Figure 1, C L = 1000 pF — 25 30 nsec tD1 Delay Time Figure 1, C L = 1000 pF — 15 30 nsec tD2 Delay Time Figure 1, C L = 1000 pF — 32 50 nsec Power Supply IS Power Supply Current V IN = 3V (Both Inputs) — — 4.5 mA VIN = 0V (Both Inputs) — — 0.4 NOTE: 1. Switching times guaranteed by design. thus minimizing chip count. Unused open drains should be returned to the supply rail that their device sources are connected to (pull-downs to ground, pull-ups to V DD ), to prevent static damage. In addition, in situations where timing resistors or other means of limiting crossover currents are used, like drains may be paralleled for greater current carrying capacity. These devices are built to operate in the most de- manding electrical environments. They will not latch up under any conditions within their power and voltage rat- ings; they are not subject to damage when up to 5V of noise spiking of either polarity occurs on their ground pin; and they can accept, without damage or logic upset, up to 1/2 amp of reverse current (of either polarity) being forced back into their outputs. All terminals are fully protected against up to 2 kV of electrostatic discharge. Package Thermal Resistance CerDIP R Operating Temperature Range Package Power Dissipation (TA ≤ 70°C) *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. TC4404 TC4405 1.5A DUAL OPEN-DRAIN MOSFET DRIVERS

4-221TELCOM SEMICONDUCTOR, INC. ELECTRICAL CHARACTERISTICS: Specifications measured over operating temperature range with 4.5V ≤ VDD ≤ 18V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Input VIH Logic 1 High Input Voltage 2.4 — — V VIL Logic 0 Low Input Voltage — — 0.8 V IIN Input Current – 0V ≤ VIN ≤ VDD – 10 — 10 µA Output VOH High Output Voltage V DD – 0.025 — — V VOL Low Output Voltage — — 0.025 V R O Output Resistance I OUT = 10 mA, VDD = 18V; Any Drain — 9 12 Ω IPK Peak Output Current (Any Drain) Duty cycle <2%, t ≤ 300µsec — 1.5 — A IDC Continuous Output Current (Any Drain) — — 100 mA IR Latch-Up Protection (Any Drain) Duty cycle <2%, t ≤ 300µsec >500 — — mA Withstand Reverse Current Switching Time (Note 1) tR Rise Time Figure 1, C L = 1000 pF — — 40 nsec tF Fall Time Figure 1, C L = 1000 pF — — 40 nsec tD1 Delay Time Figure 1, C L = 1000 pF — — 40 nsec tD2 Delay Time Figure 1, C L = 1000 pF — — 60 nsec Power Supply IS Power Supply Current V IN = 3V (Both Inputs) — — 8 mA VIN = 0V (Both Inputs) — — 0.6 NOTE 1. Switching times guaranteed by design. PIN CONFIGURATIONS (DIP AND SOIC) Circuit Layout Guidelines Avoid long power supply and ground traces (added inductance causes unwanted voltage transients). Use power and ground planes wherever possible. In addition, it is advisable that low ESR bypass capacitors (4.7µF or 10µF TC4405 B BOTTOMCOM IN B IN A VDD B TOP A BOTTOM A TOP TC4405 B BOTTOMCOM IN B IN A VDD B TOP A BOTTOM A TOP TC4404 B BOTTOMCOM IN B IN A VDD B TOP A BOTTOM A TOP TC4404 B BOTTOMCOM IN B IN A VDD B TOP A BOTTOM A TOP tantalum) be placed as close to the driver as possible. The driver should be physically located as close to the device it is driving as possible to minimize the length of the output trace. TC4404 TC4405 1.5A DUAL OPEN-DRAIN MOSFET DRIVERS

4-222 TELCOM SEMICONDUCTOR, INC. Figure 1. Switching Time Test Circuit

4-223TELCOM SEMICONDUCTOR, INC. TYPICAL CHARACTERISTICS Rise and Fall Times vs. Temperature Propagation Delay vs. Supply Voltage Fall Time vs. Supply VoltageRise Time vs. Supply Voltage Fall Time vs. Capacitive Load 468 1 0 1 2 14 16 18 DELAY TIME (nsec) tD2 tD1 C LOAD = 1000 pF VDD tRISE (nsec) 468 1 0 1 2 14 16 18 VDD 100 pF 470 pF 2200 pF 1500 pF 100 1000 pF TA = +25°C TIME (nsec) tRISE TEMPERATURE ( °C) C LOAD = 1000 pF –55 –35 5 25 45 65 85 105 125–15 tFALL VDD = 17.5V tFALL (nsec) 468 1 0 1 2 14 16 18 100 pF 470 pF 1000 pF 2200 pF 1500 pF 100 VDD TA = +25°C Rise TIme vs. Capacitive Load 100 1000 10,000 C LOAD (pF) VDD = 5V 10V 15V tRISE (nsec) 100 TA = +25°C tFALL (nsec) 100 1000 10,000 100 C LOAD (pF) VDD = 5VTA = +25°C 10V 15V TA = +25°C Quiescent Supply Current vs. Voltage TEMPERATURE ( °C) IQUIESCENT (mA) 186 8 10 12 14 16 DELAY TIME (nsec) VDRIVE (V) DELAY TIME (nsec) Effect of Input Amplitude on Delay Time Propagation Delay Time vs. Temperature –55 –35 –15 5 25 45 65 85 105 125 C LOAD = 1000 pF VDD = 10V TA = +25°C VLOAD = 1000 pF VDD = 17.5V tD2 tD2 tD1 BOTH INPUTS = 1 BOTH INPUTS = 0 02468 1 0 tD1 VDD TA = +25°C 0.1 TC4404 TC4405 1.5A DUAL OPEN-DRAIN MOSFET DRIVERS

4-224 TELCOM SEMICONDUCTOR, INC. TYPICAL CHARACTERISTICS (Cont.) Pull-Up Output Resistance TEMPERATURE ( °C) IQUIESCENT (mA) 4.0 3.5 3.0 2.5 2.0 –55 –35 –15 5 25 45 65 85 105 125 Quiescent Supply Current vs. Temperature R (DS(ON) (Ω ) 468 1 0 1 2 14 16 18 468 1 0 1 2 14 16 18 Pull-Down Output Resistance VDD = 18V BOTH INPUTS = 1 WORST CASE @ TJ = +150°C TYP @ +25 °CTYP @ +25 °C VDD WORST CASE @ TJ = +150°C R DS(ON) (Ω ) VDD TYPICAL APPLICATIONS R T R T VDD (4.5V–18V) FROM TTL GND VOUTTC4404 R IB R IB VDD (4.5V – 18V) GND FROM TTL TC4405 Zero Crossover Current Totem-Pole Switch Driving Bipolar Transistors Servo Motor Control 47 kΩ 47 kΩ 0.1 µF 0.1 µF 15V 15V R T R T ISENSE +24V +12V DIRECTION (TTL LEVEL) SPEED (PWM) MOTOR TC4404TC4469 GND FROM TTL –12V +12V +5V GND –12V +12V +5V GND SWITCHED +12V SWITCHED –12V TC4404 REACH-UP AND REACH-DOWN DRIVING TC4404 TC4405 1.5A DUAL OPEN-DRAIN MOSFET DRIVERS