T555711M01-DBW

T5557 ATMEL | Alldatasheet

Document overview

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Technical content

Features

• Contactless Read/Write Data Transmission
• Radio Frequency fRF from 100 kHz to 150 kHz
• e5550 Binary Compatible or T5557 Extended Mode
• Small Size, Configurable for ISO/IEC 11784/785 Compatibility
• 75 pF On-chip Resonant Capacitor (Mask Option)
• 7 x 32-bit EEPROM Data Memory Including 32-bit Password
• Separate 64-bit memory for Traceability Data
• 32-bit Configuration Register in EEPROM to Setup: –D a t a R a t e - RF/2 to RF/128, Binary Selectable or - Fixed e5550 Data Rates – Modulation/Coding - FSK, PSK, Manchester, Biphase, NRZ – Other Options - Password Mode - Max Block Feature - Answer-On-Request (AOR) Mode - Inverse Data Output - Direct Access Mode - Sequence Terminator(s) - Write Protection (Through Lock-bit per Block) - Fast Write Method (5 kbps versus 2 kbps) - OTP Functionality - POR Delay up to 67 ms

Description

The T5557 is a contactless R/W IDentification IC (IDIC /g226) for applications in the 125 kHz frequency range. A single coil, connected to the chip, serves as the IC’s power supply and bi-directional communication interface. The antenna and chip together form a transponder or tag. The on-chip 330-bit EEPROM (10 blocks, 33 bits each) can be read and written block- wise from a reader. Block 0 is reserved for setting the operation modes of the T5557 tag. Block 7 may contain a password to prevent unauthorized writing. Data is transmitted from the IDIC /g32using load modulation. This is achieved by damping the RF field with a resistive load between the two terminals Coil 1 and Coil 2. The IC receives and decodes 100% amplitude modulated (OOK) pulse interval encoded bit streams from the base station or reader. System Block Diagram Figure 1. RFID System Using T5557 Tag

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Figure 2. Block Diagram

• Rectifier to generate a DC supply voltage from the AC coil voltage
• Clock extractor
• Switchable load between Coil 1/Coil 2 for data transmission from tag to the reader
• Field gap detector for data transmission from the base station to the tag
• ESD protection circuitry Data-rate Generator The data rate is binary programmable to operate at any data rate between RF/2 and RF/128 or equal to any of the fixed e5550/e5551 and T5554 bitrates (RF/8, RF/16, RF/32, RF/40, RF/50, RF/64, RF/100 and RF/128). Write Decoder This function decodes the write gaps and verifies the validity of the data stream according to the Atmel e555x write method (pulse interval encoding). HV Generator This on-chip charge pump circuit generates the high voltage required for programming of the EEPROM. DC Supply Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and regulates this RF source and uses it to generate its supply voltage. * Mask option Coil 1 Coil 2 Modulator Analog front end POR Input register W rite decoder Bit-rate generator Memory (330 bit EEPROM) Controller Test logic Mode register HV generator

Clock Extraction The clock extraction circuit uses the external RF signal as its internal clock source.

• Load-mode register with configuration data from EEPROM block 0 after power-on and also during reading
• Control memory access (read, write)
• Handle write data transmission and write error modes
• The first two bits of the reader to tag data stream are the opcode, e.g., write, direct access or reset
• In password mode, the 32 bits received after the opcode are compared with the password stored in memory block 7 Mode Register The mode register stores the configuration data from the EEPROM block 0. It is continually refreshed at the start of ev ery block read and (re-)loaded after any POR event or reset command. On delivery the mode register is preprogrammed with the value ‘0014 8000’h which corresponds to continuous read of block 0, Manchester coded, RF/64.

Figure 3. Block 0 Configuration Mapping – e5550 Compatibility Mode

0 Unlocked

1 Locked Lock Bit

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Table 1. Types of e5550-compatible Modulation Modes Notes: 1. A common multiple of bitrate and FSK frequencies is recommended.

1. In PSK mode the selected data rate has to be an integer multiple of the PSK

bits of a block, including the lock bit, are programmed simultaneously. regular-read operations. Block 7 of page 0 may be used as a write protection password. lock bit itself) is not re-programmable through the RF field again. Figure 4. Memory Map

ers as tag issuer identification. Figure 5. T5557 Traceability Data Structure state until 8190 internal field clocks have elapsed.

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tion starts automatically using the parameters defined in the configuration register. addressed by MAXBLK has been read, data transmission restarts with block 1, bit 1. 0 or 1, regular-read mode can not be distinguished from block-read mode. Figure 6. Examples for Different MAXBLK Settings and cycles continuously if in regular-read mode . match with the contents of block 7, the T5557 tag returns to the regular-read mode. Note: A direct access to block 0 of page 1 will read the configuration data of block 0, page 0. A direct access to bock 3 .. 7 of page 1 reads all data bits as zero. bination with the sequence terminator to be identified reliable.

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Figure 9. Start of Reader to Tag Communication Table 2. Write Data Decoding Scheme

• The opcodes ‘10’ and ‘11’ precede all block write and direct access operations for page 0 and page 1
• The RESET opcode ‘00’ initiates a POR cycle
• The opcode ‘01’ precedes all test mode write operations. Any test mode access is ignored after master key (bits 1..4) in block 0 has been set to ‘6’. Any further modifications of the master key are prohibited by setting the lock bit of block 0 or the OTP bit. Writing has to follow these rules:
• Standard write needs the opcode, the lock bit, 32 data bits and the 3-bit address (38 bits total)
• Protected write (PWD bit set) requires a valid 32-bit password between opcode and data, address bits
• For the AOR wake-up command an opcode and a valid password are necessary to select and activate a specific tag Note: The data bits are read in the same order as written. If the transmitted command sequence is invalid, the T5557 enters regular-read mode with the previously selected page (by former opcode ‘10’ or ‘11’). Parameters Remark Symbol Min. Max. Unit Start gap S gap 10 50 FC Write gap Normal write mode W gap 83 0 F C Write data in normal mode ‘0’ data d 0 16 31 FC ‘1’ data d 1 48 63 FC Write modeRead mode d0d1 WgapSgap

Figure 10. Complete Writing Sequence Figure 11. T5557 Command Formats it will restart in regular-read mode once the command transmission is finished. from being transmitted by the T5557. (about 4.3 billion) takes about two years. transmitted which may address another tag in the RF field.

1 Password 32 L 1 Data 32 2 Addr 0

1 Password 32 2 Addr 0

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Table 3. T5557 — Modes of Operation Figure 12. Answer-On-Request (AOR) Mode Figure 13. Coil Voltage after Programming of a Memory Block

Figure 14. Anticollision Procedure Using AOR Mode

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4517E–RFID–02/03 Programming When all necessary information has been received by the T5557, programming may proceed. There is a clock delay between the end of the writing sequence and the start of programming. Typical programming time is 5.6 ms. This cycle includes a data verification read to grant secure and correct programming. After programming was executed successfully, the T5557 enters block-read mode transmitting the block just programmed (see Figure 13). Note: This timing and behavior is different from the e555x-family predecessors. Error Handling Several error conditions can be detected to ensure that only valid bits are programmed into the EEPROM. There are two error types, which lead to two different actions. Errors During Writing The following detectable errors could occur during writing data into the T5557:

• Wrong number of field clocks between two gaps (i.e., not a valid ‘1’ or ‘0’ pulse stream)
• Password mode is activated and the password does not match the contents of block 7
• The number of bits received in the command sequence is incorrect Valid bit counts accepted by the T5557 are: If any of these erroneous conditions were detected, the T5557 enters regular-read mode, starting with block 1 of the page defined in the command sequence. Errors Before/During Programming If the command sequence was received successfully, the following error could still prevent programming:
• The lock bit of the addressed block is set already
• In case of a locked block, programming mode will not be entered. The T5557 reverts to block-read mode continuously transmitting the currently addressed block. If the command sequence is validated and the addressed block is not write protected, the new data will be programmed into the EEPROM memory. The new state of the block write protection bit (lock bit) will be programmed at the same time accordingly. Each programming cycle consists of 4 consecutive steps: erase block, erase verification (data = ‘0’), programming, write verification (corresponding data bits = ‘1’).
• If a data verification error is detected after an executed data block programming, the tag will stop modulation (modulation defeat) until a new command is transmitted. Password write 70 bits (PWD = 1) Standard write 38 bits (PWD = 0) AOR wake up 34 bits (PWD = 1) Direct access with PWD 38 bits (PWD = 1) Direct access 6 bits (PWD = 0) Reset command 2 bits Page 0/1 regular-read 2 bits

Figure 15. T5557 Functional Diagram together with the X-mode bit will enable the extended mode functions.

• Master key = ‘9’: Test mode access and extended mode are both enabled.
• Master key = ‘6’: Any test mode access will be denied but the extended mode is still enabled. Any other master key setting will prevent the activation of the T5557 extended mode options, even when the X-mode bit is set. Binary Bit-rate Generator In extended mode the data rate is binary programmable to operate at any data rate between RF/2 and RF/128 as given in the formula below. Data rate = RF/(2n+2) Setup modes Command decode Write Number of bits Password check Lock bit check Program & Verify Modulation defeat fail data = old ok data = newData verification failed fail data = old gap command mode fail data = old Power-on reset OP(00) Write OP(1p)* OP(01) Start Gap Regular-read mode addr = 1 .. maxblk Block-read mode addr = current gap single gap AOR modeAOR = 1 AOR = 0 Page 0 or 1 * p = page selector Direct access OP (1p)* Page 0 OP (1p)* OP(10..) OP(11..) Page 1 Page 0 Test-mode if master key <> 6 Reset to page 0

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is locked forever (= OTP functionality). Figure 16. Block 0 — Configuration Map in Extended Mode (X-mode) Table 4. T5557 Types of Modulation in Extended Mode Notes: 1. A common multiple of bitrate and FSK frequencies is recommended.

1. In PSK mode the selected data rate has to be an integer multiple of the PSK sub-carrier frequency.

(see Table 4). This function is supported for all basic types of encoding. Figure 18. Data Encoder for Inverse Data Output a previous gap, the T5557 will exit the write mode. Please refer to Table 5 and Figure 8. Table 5. Fast Write Data Decoding Schemes

10 Block n 01 Block n 10 Block n 01 Block n 10 Block n 01

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Figure 19. Example of Manchester Coding with Data Figure 20. Example of Biphase Coding with Data Rate

16 Field Clocks (FC)

Figure 21. Example: FSK1a Coding with Data Rate Figure 22. Example of PSK1 Coding with Data Rate

40 Field Clocks (FC)

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Figure 23. Example of PSK2 Coding with Data Rate Figure 24. Example of PSK3 Coding with Data Rate

4517E–RFID–02/03 Absolute Maximum Ratings Parameters Symbol Value Unit Maximum DC current into Coil 1/Coil 2 I coil 20 mA Maximum AC current into Coil 1/Coil 2 f = 125 kHz Icoil p 20 mA Power dissipation (dice) (free-air condition, time of application: 1 s) Ptot 100 mW Electrostatic discharge maximum to MIL-Standard 883 C method 3015 Vmax 4000 V Operating ambient temperature range T amb -40 to +85 °C Storage temperature range (data retention reduced) T stg -40 to +150 °C

Electrical Characteristics

Tamb = +25°C; fcoil = 125 kHz; unless otherwise specified No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Type*

1 RF frequency range f RF 100 125 150 kHz

2.1 Supply current (without current consumed by the external LC tank circuit) Tamb = 25°C (1) (see Figure 24) IDD 1.5 3 /g109AT

2.2 Read – full temperature

2.3 Programming full

temperature range 25 40 /g109AQ 3.1 Coil voltage (AC supply) POR threshold (50 mV hysteresis) Vcoil pp 3.2 3.6 4.0 V Q

3.2 Read mode and write

(2) 6V clamp VQ

3.3 Program EEPROM (2) 8V clamp VQ

4 Start-up time V coil pp = 6 V t startup 2.5 3 ms Q

5 Clamp voltage 10 mA current into

6.1 Modulation parameters Vcoilpp = 6 V on test circuit generator and modulation ON (3) V mod pp 4.2 4.8 V T

6.2 I mod pp 400 600 /g109AT

6.3 Thermal stability V mod/Tamb -6 mV/ °CQ

*) Type means: T: directly or indirectly tested during production; Q: guaranteed based on initial product qualification data Notes: 1. I DD measurement setup R = 100 k; VCLK = Vcoil = 5 V: EEPROM programmed to 00 ... 000 (erase all); chip in modulation defeat. IDD = (VOUTmax - VCLK)/R 2. Current into Coil 1/Coil 2 is limited to 10 mA. The damping circuitry has the same structure as the e5550. The damping characteristics are defined by the internally limited supply voltage (= minimum AC coil voltage) 3. V mod measurement setup: R = 2.3 k; VCLK = 3 V; setup with modulation enabled (see Figure 25). 4. Since EEPROM performance is influenced by assembly processes, Atmel confirms the parameters for DOW (tested dice on uncutted wafer) delivery. 5. The tolerance of the on-chip resonance capacitor C r is ±10% at 3 /g115 over whole production. The capacitor tolerance is ±3% at 3/g115/g32on a wafer basis. 6. The tolerance of the microcodule resonance capacitor C r is ±5% at 3/g115 over whole production.

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4517E–RFID–02/03 Figure 25. Measurement Setup for IDD and Vmod

7 Programming time

8 Endurance Erase all / Write all (4) ncycle 100000 Cycles Q

9.2 Top = 150 /g176C (4) tretention 96 hrs T

9.3 Top = 250 /g176C (4) tretention 24 hrs Q

10 Resonance capacitor Mask option (5) C r 70 78 86 pF T

11.2 Temperature coefficient TBD TBD TBD TBD TBD TBD

11.3 TBD TBD TBD TBD TBD TBD

Tamb = +25°C; fcoil = 125 kHz; unless otherwise specified No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Type* *) Type means: T: directly or indirectly tested during production; Q: guaranteed based on initial product qualification data Notes: 1. I DD measurement setup R = 100 k; VCLK = Vcoil = 5 V: EEPROM programmed to 00 ... 000 (erase all); chip in modulation defeat. IDD = (VOUTmax - VCLK)/R 2. Current into Coil 1/Coil 2 is limited to 10 mA. The damping circuitry has the same structure as the e5550. The damping characteristics are defined by the internally limited supply voltage (= minimum AC coil voltage) 3. V mod measurement setup: R = 2.3 k; VCLK = 3 V; setup with modulation enabled (see Figure 25). 4. Since EEPROM performance is influenced by assembly processes, Atmel confirms the parameters for DOW (tested dice on uncutted wafer) delivery. 5. The tolerance of the on-chip resonance capacitor C r is ±10% at 3 /g115 over whole production. The capacitor tolerance is ±3% at 3/g115/g32on a wafer basis. 6. The tolerance of the microcodule resonance capacitor C r is ±5% at 3/g115 over whole production. Coil 1 T5557 Coil 2 Substrate V CLK VOUTmax R 750 750 BAT68 BAT68

4517E–RFID–02/03 Ordering Information (2) Notes: 1. Unique customer ID code programming according to Figure 5 is linked to a minimum order quantity of 1 Mio parts per year. 2. For available order codes refer to Atmel Sales/Marketing. Ordering Examples (Recommended) T555711-DDW Tested dice on unsawn 6” wafer, thickness 300 /g109m, no on-chip capacitor, no damping during POR initialisation; especially for ISO 11784/785 and access control applications Available Order Codes T555711-DDW, DDT, TAS, PP T555714-DDW, DBW, TAS T555715-PAE 11 - 2 Pads without on-chip C see Figure 26 14 - 4 Pads with on-chip 75 pF see Figure 27 15 - Micro - Module with 330 pF see Figure 29 01 - 2 Pads without C; Damping during initialisation see Figure 26 Customer ID (1) - Atmel standard (corresponds to “00") M01 - Customer ’X’ unique ID code (1) - DDW - Dice on wafer, 6" un-sawn wafer, thickness 300 µm - DDT - Dice in Tray (waffle pack), thickness 300 µm - DBW - Dice on solder bumped wafer, thickness 390 µm see Figure 27 Sn63Pb37 on 5 µm Ni/Au, height 70 µm see Figure 28 - TAS - SO8 Package see Figure 31 - PAE - MOA2 Micro-Module see Figure 29 - PP - Plastic Transponder see Figure 33 x x x T 5 5 5 7 a b M c c - Package Drawing

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4517E–RFID–02/03

Package Information

Figure 26. 2 Pad Layout for Wire Bonding

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Figure 29. Wafer Map Failed Die Identification Every die on the wafer not passing Atmel test sequence is marked with inch.

• dot size: 200 µm
• position: center of die
• color: black

Figure 30. NOA2 Micromodule

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Figure 31. Shipping Reel

28 T5557

Figure 34. Plastic Transponder

4517E–RFID–02/03 Operating Characteristics Plastic Transponder Tamb = 25°C, fres = 125 kHz unless otherwise specified; For all other parameters please refer to IC characteristics No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Typ Inductance L 4.0 mH Capacitor C 386.1 390 393.9 pF Resonance frequency H pp = 20 A/m f res 120 125 130 kHz Quality factor Q LC 13 Q Assembly temperature t < 5 min T ass 175 °C Magnetic Field Strength (H) Max. field strength where transponder does not modulate No influence to other transponders in the field H pp not 4A / m T Field strength for operation Tamb = -40/g176CH pp -40 30 A/m Q Tamb = 25/g176CH pp 25 18 A/m T Tamb = 85/g176CH pp 85 17 A/m Q Programming mode T amb = 25/g176CH pp 50 A/m T Maximum field strength H pp max 600 A/m Q Modulation Range (see also H-DV curve) Modulation range H pp = 20 A/m Hpp = 30 A/m Hpp = 50 A/m Hpp = 100 A/m DV 4.0 6.0 8.0 8.0 V

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